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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_AT91SAM3U256_IAR/] [system/] [board_cstartup_iar.c] - Blame information for rev 580

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Line No. Rev Author Line
1 580 jeremybenn
/* ----------------------------------------------------------------------------
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 *         ATMEL Microcontroller Software Support
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 * ----------------------------------------------------------------------------
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 * Copyright (c) 2008, Atmel Corporation
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 *
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions are met:
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 *
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 * - Redistributions of source code must retain the above copyright notice,
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 * this list of conditions and the disclaimer below.
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 *
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 * Atmel's name may not be used to endorse or promote products derived from
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 * this software without specific prior written permission.
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 *
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 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * ----------------------------------------------------------------------------
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 */
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//------------------------------------------------------------------------------
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//         Headers
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//------------------------------------------------------------------------------
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#include "board.h"
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#include "exceptions.h"
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#include "board_lowlevel.h"
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//------------------------------------------------------------------------------
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//         Types
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//------------------------------------------------------------------------------
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typedef union { IntFunc __fun; void * __ptr; } IntVector;
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//------------------------------------------------------------------------------
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//         ProtoTypes
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//------------------------------------------------------------------------------
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extern void __iar_program_start( void );
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extern void xPortPendSVHandler(void);
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extern void xPortSysTickHandler(void);
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extern void vPortSVCHandler(void);
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extern void vSerialISR( void );
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int __low_level_init( void );
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//------------------------------------------------------------------------------
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//         Variables
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//------------------------------------------------------------------------------
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extern unsigned int __ICFEDIT_vector_start__;
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//------------------------------------------------------------------------------
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//         Exception Table
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//------------------------------------------------------------------------------
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#pragma language=extended
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#pragma segment="CSTACK"
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// The name "__vector_table" has special meaning for C-SPY:
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// it is where the SP start value is found, and the NVIC vector
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// table register (VTOR) is initialized to this address if != 0.
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#pragma section = ".vectors"
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#pragma location = ".vectors"
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const IntVector __vector_table[] =
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{
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    { .__ptr = __sfe( "CSTACK" ) },
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    __iar_program_start,
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    NMI_Handler,
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    HardFault_Handler,
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    MemManage_Handler,
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    BusFault_Handler,
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    UsageFault_Handler,
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    0, 0, 0, 0,             // Reserved
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    vPortSVCHandler,        // SVCall handler
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    DebugMon_Handler,
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    0,                      // Reserved
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    xPortPendSVHandler,     // The PendSV handler
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    xPortSysTickHandler,    // The SysTick handler
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    // Configurable interrupts
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    SUPC_IrqHandler,    // 0  SUPPLY CONTROLLER
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    RSTC_IrqHandler,    // 1  RESET CONTROLLER
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    RTC_IrqHandler,     // 2  REAL TIME CLOCK
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    RTT_IrqHandler,     // 3  REAL TIME TIMER
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    WDT_IrqHandler,     // 4  WATCHDOG TIMER
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    PMC_IrqHandler,     // 5  PMC
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    EFC0_IrqHandler,    // 6  EFC0
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    EFC1_IrqHandler,    // 7  EFC1
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    DBGU_IrqHandler,    // 8  DBGU
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    HSMC4_IrqHandler,   // 9  HSMC4
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    PIOA_IrqHandler,    // 10 Parallel IO Controller A
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    PIOB_IrqHandler,    // 11 Parallel IO Controller B
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    PIOC_IrqHandler,    // 12 Parallel IO Controller C
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    USART0_IrqHandler,  // 13 USART 0
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    vSerialISR,                 // 14 USART 1
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    USART2_IrqHandler,  // 15 USART 2
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    USART3_IrqHandler,  // 16 USART 3
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    MCI0_IrqHandler,    // 17 Multimedia Card Interface
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    TWI0_IrqHandler,    // 18 TWI 0
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    TWI1_IrqHandler,    // 19 TWI 1
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    SPI0_IrqHandler,    // 20 Serial Peripheral Interface
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    SSC0_IrqHandler,    // 21 Serial Synchronous Controller 0
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    TC0_IrqHandler,     // 22 Timer Counter 0
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    TC1_IrqHandler,     // 23 Timer Counter 1
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    TC2_IrqHandler,     // 24 Timer Counter 2
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    PWM_IrqHandler,     // 25 Pulse Width Modulation Controller
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    ADCC0_IrqHandler,   // 26 ADC controller0
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    ADCC1_IrqHandler,   // 27 ADC controller1
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    HDMA_IrqHandler,    // 28 HDMA
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    UDPD_IrqHandler,   // 29 USB Device High Speed UDP_HS
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    IrqHandlerNotUsed   // 30 not used
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};
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//------------------------------------------------------------------------------
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//         Exported functions
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//------------------------------------------------------------------------------
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//------------------------------------------------------------------------------
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/// This is the code that gets called on processor reset. To initialize the
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/// device.
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//------------------------------------------------------------------------------
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int __low_level_init( void )
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{
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    unsigned int * src = __section_begin(".vectors");
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    LowLevelInit();
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    AT91C_BASE_NVIC->NVIC_VTOFFR = ((unsigned int)(src)) | (0x0 << 7);
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    return 1; // if return 0, the data sections will not be initialized.
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}

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