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jeremybenn |
/**************************************************************************//**
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* @file
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* @brief CMSIS Cortex-M3 Peripheral Access Layer for EFM32 devices
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*
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* @author Energy Micro AS
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* @version 1.0.2
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******************************************************************************
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* @section License
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* <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
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******************************************************************************
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*
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* This source code is the property of Energy Micro AS. The source and compiled
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* code may only be used on Energy Micro "EFM32" microcontrollers.
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*
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* This copyright notice may not be removed from the source code nor changed.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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*****************************************************************************/
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#include <stdint.h>
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#include "efm32.h"
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uint32_t SystemCoreClock; /**< System Clock Frequency (Core Clock) */
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#ifndef EFM32_HFXO_FREQ
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#define EFM32_HFXO_FREQ 32000000
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#endif
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#ifndef EFM32_LFXO_FREQ
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#define EFM32_LFXO_FREQ 32768
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#endif
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#ifndef EFM32_LFRCO_FREQ
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#define EFM32_LFRCO_FREQ 32768
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#endif
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/**************************************************************************//**
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* @brief Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System and update the SystemCoreClock variable.
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*****************************************************************************/
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void SystemInit(void)
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{
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#if EFM32_AUXHFROCO_ENABLE
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CMU_TypeDef *cmu = CMU;
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/* Enable clocks to debug modules in Cortex */
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/* This will enable Debug Trace and MSC Flash programming clocks */
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cmu->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
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#endif
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}
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/**************************************************************************//**
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* @brief Update SystemCoreClock variable
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*
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* @param none
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* @return none
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*
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* @brief Updates the SystemCoreClock with current core Clock
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* retrieved from cpu registers.
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*****************************************************************************/
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void SystemCoreClockUpdate(void)
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{
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CMU_TypeDef *cmu = CMU;
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uint32_t inputClock;
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/* Check source for core clock */
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switch (cmu->STATUS &
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(CMU_STATUS_HFRCOSEL |
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CMU_STATUS_HFXOSEL |
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CMU_STATUS_LFRCOSEL |
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CMU_STATUS_LFXOSEL))
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{
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case CMU_STATUS_HFXOSEL:
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inputClock = EFM32_HFXO_FREQ;
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break;
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case CMU_STATUS_LFRCOSEL:
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inputClock = EFM32_LFRCO_FREQ;
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break;
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case CMU_STATUS_LFXOSEL:
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inputClock = EFM32_LFXO_FREQ;
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break;
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case CMU_STATUS_HFRCOSEL:
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default:
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switch ((cmu->HFRCOCTRL & _CMU_HFRCOCTRL_BAND_MASK) >> _CMU_HFRCOCTRL_BAND_SHIFT)
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{
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case _CMU_HFRCOCTRL_BAND_28MHZ:
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inputClock = 28000000;
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break;
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case _CMU_HFRCOCTRL_BAND_21MHZ:
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inputClock = 21000000;
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break;
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case _CMU_HFRCOCTRL_BAND_14MHZ:
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inputClock = 14000000;
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break;
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case _CMU_HFRCOCTRL_BAND_11MHZ:
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inputClock = 11000000;
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break;
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case _CMU_HFRCOCTRL_BAND_7MHZ:
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inputClock = 7000000;
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break;
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case _CMU_HFRCOCTRL_BAND_1MHZ:
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inputClock = 1500000;
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break;
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default:
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inputClock = 0;
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break;
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}
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break;
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}
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/* Adjust according to clock divisor */
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SystemCoreClock = inputClock / (1<<((cmu->HFCORECLKDIV & _CMU_HFCORECLKDIV_MASK)>>_CMU_HFCORECLKDIV_HFCORECLKDIV_SHIFT));
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}
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