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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LM3S102_GCC/] [hw_include/] [hw_ints.h] - Blame information for rev 581

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1 581 jeremybenn
//*****************************************************************************
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//
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// hw_ints.h - Macros that define the interrupt assignment on Stellaris.
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//
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// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
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//
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// Software License Agreement
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//
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// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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// exclusively on LMI's Stellaris Family of microcontroller products.
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//
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// The software is owned by LMI and/or its suppliers, and is protected under
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// applicable copyright laws.  All rights are reserved.  Any use in violation
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// of the foregoing restrictions may subject the user to criminal sanctions
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// under applicable laws, as well as to civil liability for the breach of the
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// terms and conditions of this license.
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//
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// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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//
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// This is part of revision 523 of the Stellaris Driver Library.
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//
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//*****************************************************************************
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#ifndef __HW_INTS_H__
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#define __HW_INTS_H__
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//*****************************************************************************
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//
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// The following define the fault assignments.
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//
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//*****************************************************************************
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#define FAULT_NMI               2           // NMI fault
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#define FAULT_HARD              3           // Hard fault
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#define FAULT_MPU               4           // MPU fault
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#define FAULT_BUS               5           // Bus fault
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#define FAULT_USAGE             6           // Usage fault
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#define FAULT_SVCALL            11          // SVCall
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#define FAULT_DEBUG             12          // Debug monitor
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#define FAULT_PENDSV            14          // PendSV
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#define FAULT_SYSTICK           15          // System Tick
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//*****************************************************************************
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//
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// The following define the interrupt assignments.
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//
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//*****************************************************************************
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#define INT_GPIOA               16          // GPIO Port A
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#define INT_GPIOB               17          // GPIO Port B
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#define INT_GPIOC               18          // GPIO Port C
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#define INT_UART0               21          // UART0 Rx and Tx
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#define INT_SSI                 23          // SSI Rx and Tx
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#define INT_I2C                 24          // I2C Master and Slave
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#define INT_WATCHDOG            34          // Watchdog timer
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#define INT_TIMER0A             35          // Timer 0 subtimer A
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#define INT_TIMER0B             36          // Timer 0 subtimer B
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#define INT_TIMER1A             37          // Timer 1 subtimer A
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#define INT_TIMER1B             38          // Timer 1 subtimer B
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#define INT_COMP0               41          // Analog Comparator 0
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#define INT_COMP1               42          // Analog Comparator 1
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#define INT_SYSCTL              44          // System Control (PLL, OSC, BO)
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#define INT_FLASH               45          // FLASH Control
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//*****************************************************************************
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//
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// The total number of interrupts.
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//
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//*****************************************************************************
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#define NUM_INTERRUPTS          46
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//*****************************************************************************
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//
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// The total number of priority levels.
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//
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//*****************************************************************************
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#define NUM_PRIORITY            8
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#define NUM_PRIORITY_BITS       3
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#endif // __HW_INTS_H__

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