OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LM3S102_Rowley/] [hw_include/] [hw_flash.h] - Blame information for rev 581

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 581 jeremybenn
//*****************************************************************************
2
//
3
// hw_flash.h - Macros used when accessing the flash controller.
4
//
5
// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
6
//
7
// Software License Agreement
8
//
9
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
10
// exclusively on LMI's Stellaris Family of microcontroller products.
11
//
12
// The software is owned by LMI and/or its suppliers, and is protected under
13
// applicable copyright laws.  All rights are reserved.  Any use in violation
14
// of the foregoing restrictions may subject the user to criminal sanctions
15
// under applicable laws, as well as to civil liability for the breach of the
16
// terms and conditions of this license.
17
//
18
// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
22
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23
//
24
// This is part of revision 523 of the Stellaris Driver Library.
25
//
26
//*****************************************************************************
27
 
28
#ifndef __HW_FLASH_H__
29
#define __HW_FLASH_H__
30
 
31
//*****************************************************************************
32
//
33
// The following define the offsets of the FLASH registers.
34
//
35
//*****************************************************************************
36
#define FLASH_FMA               0x400FD000  // Memory address register
37
#define FLASH_FMD               0x400FD004  // Memory data register
38
#define FLASH_FMC               0x400FD008  // Memory control register
39
#define FLASH_FCRIS             0x400FD00c  // Raw interrupt status register
40
#define FLASH_FCIM              0x400FD010  // Interrupt mask register
41
#define FLASH_FCMISC            0x400FD014  // Interrupt status register
42
#define FLASH_FMPRE             0x400FE130  // FLASH read protect register
43
#define FLASH_FMPPE             0x400FE134  // FLASH program protect register
44
#define FLASH_USECRL            0x400FE140  // uSec reload register
45
 
46
//*****************************************************************************
47
//
48
// The following define the bit fields in the FLASH_FMC register.
49
//
50
//*****************************************************************************
51
#define FLASH_FMC_WRKEY_MASK    0xFFFF0000  // FLASH write key mask
52
#define FLASH_FMC_WRKEY         0xA4420000  // FLASH write key
53
#define FLASH_FMC_REG_MASK      0x00000F00  // Register select mask
54
#define FLASH_FMC_REG_UDFP      0x00000000  // Select FLASH protection register
55
#define FLASH_FMC_COMT          0x00000008  // Commit user register
56
#define FLASH_FMC_MERASE        0x00000004  // Mass erase FLASH
57
#define FLASH_FMC_ERASE         0x00000002  // Erase FLASH page
58
#define FLASH_FMC_WRITE         0x00000001  // Write FLASH word
59
 
60
//*****************************************************************************
61
//
62
// The following define the bit fields in the FLASH_FCRIS register.
63
//
64
//*****************************************************************************
65
#define FLASH_FCRIS_PROGRAM     0x00000002  // Programming status
66
#define FLASH_FCRIS_ACCESS      0x00000001  // Invalid access status
67
 
68
//*****************************************************************************
69
//
70
// The following define the bit fields in the FLASH_FCIM register.
71
//
72
//*****************************************************************************
73
#define FLASH_FCIM_PROGRAM      0x00000002  // Programming mask
74
#define FLASH_FCIM_ACCESS       0x00000001  // Invalid access mask
75
 
76
//*****************************************************************************
77
//
78
// The following define the bit fields in the FLASH_FMIS register.
79
//
80
//*****************************************************************************
81
#define FLASH_FCMISC_PROGRAM    0x00000002  // Programming status
82
#define FLASH_FCMISC_ACCESS     0x00000001  // Invalid access status
83
 
84
//*****************************************************************************
85
//
86
// The following define the bit fields in the FLASH_FMPRE and FLASH_FMPPE
87
// registers.
88
//
89
//*****************************************************************************
90
#define FLASH_FMP_BLOCK_31      0x80000000  // Enable for block 31
91
#define FLASH_FMP_BLOCK_30      0x40000000  // Enable for block 30
92
#define FLASH_FMP_BLOCK_29      0x20000000  // Enable for block 29
93
#define FLASH_FMP_BLOCK_28      0x10000000  // Enable for block 28
94
#define FLASH_FMP_BLOCK_27      0x08000000  // Enable for block 27
95
#define FLASH_FMP_BLOCK_26      0x04000000  // Enable for block 26
96
#define FLASH_FMP_BLOCK_25      0x02000000  // Enable for block 25
97
#define FLASH_FMP_BLOCK_24      0x01000000  // Enable for block 24
98
#define FLASH_FMP_BLOCK_23      0x00800000  // Enable for block 23
99
#define FLASH_FMP_BLOCK_22      0x00400000  // Enable for block 22
100
#define FLASH_FMP_BLOCK_21      0x00200000  // Enable for block 21
101
#define FLASH_FMP_BLOCK_20      0x00100000  // Enable for block 20
102
#define FLASH_FMP_BLOCK_19      0x00080000  // Enable for block 19
103
#define FLASH_FMP_BLOCK_18      0x00040000  // Enable for block 18
104
#define FLASH_FMP_BLOCK_17      0x00020000  // Enable for block 17
105
#define FLASH_FMP_BLOCK_16      0x00010000  // Enable for block 16
106
#define FLASH_FMP_BLOCK_15      0x00008000  // Enable for block 15
107
#define FLASH_FMP_BLOCK_14      0x00004000  // Enable for block 14
108
#define FLASH_FMP_BLOCK_13      0x00002000  // Enable for block 13
109
#define FLASH_FMP_BLOCK_12      0x00001000  // Enable for block 12
110
#define FLASH_FMP_BLOCK_11      0x00000800  // Enable for block 11
111
#define FLASH_FMP_BLOCK_10      0x00000400  // Enable for block 10
112
#define FLASH_FMP_BLOCK_9       0x00000200  // Enable for block 9
113
#define FLASH_FMP_BLOCK_8       0x00000100  // Enable for block 8
114
#define FLASH_FMP_BLOCK_7       0x00000080  // Enable for block 7
115
#define FLASH_FMP_BLOCK_6       0x00000040  // Enable for block 6
116
#define FLASH_FMP_BLOCK_5       0x00000020  // Enable for block 5
117
#define FLASH_FMP_BLOCK_4       0x00000010  // Enable for block 4
118
#define FLASH_FMP_BLOCK_3       0x00000008  // Enable for block 3
119
#define FLASH_FMP_BLOCK_2       0x00000004  // Enable for block 2
120
#define FLASH_FMP_BLOCK_1       0x00000002  // Enable for block 1
121
#define FLASH_FMP_BLOCK_0       0x00000001  // Enable for block 0
122
 
123
//*****************************************************************************
124
//
125
// The following define the bit fields in the FLASH_USECRL register.
126
//
127
//*****************************************************************************
128
#define FLASH_USECRL_MASK       0x000000FF  // Clock per uSec
129
#define FLASH_USECRL_SHIFT      0
130
 
131
//*****************************************************************************
132
//
133
// The erase size is the size of the FLASH block that is erased by an erase
134
// operation, and the protect size is the size of the FLASH block that is
135
// protected by each protection register.
136
//
137
//*****************************************************************************
138
#define FLASH_ERASE_SIZE        0x00000400
139
#define FLASH_PROTECT_SIZE      0x00000800
140
 
141
#endif // __HW_FLASH_H__

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.