OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LM3S811_GCC/] [hw_include/] [ssi.h] - Blame information for rev 810

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 581 jeremybenn
//*****************************************************************************
2
//
3
// ssi.h - Prototypes for the Synchronous Serial Interface Driver.
4
//
5
// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
6
//
7
// Software License Agreement
8
//
9
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
10
// exclusively on LMI's Stellaris Family of microcontroller products.
11
//
12
// The software is owned by LMI and/or its suppliers, and is protected under
13
// applicable copyright laws.  All rights are reserved.  Any use in violation
14
// of the foregoing restrictions may subject the user to criminal sanctions
15
// under applicable laws, as well as to civil liability for the breach of the
16
// terms and conditions of this license.
17
//
18
// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
22
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23
//
24
// This is part of revision 991 of the Stellaris Driver Library.
25
//
26
//*****************************************************************************
27
 
28
#ifndef __SSI_H__
29
#define __SSI_H__
30
 
31
#ifdef __cplusplus
32
extern "C"
33
{
34
#endif
35
 
36
//*****************************************************************************
37
//
38
// Values that can be passed to SSIIntEnable, SSIIntDisable, and SSIIntClear
39
// as the ulIntFlags parameter, and returned by SSIIntStatus.
40
//
41
//*****************************************************************************
42
#define SSI_TXFF                0x00000008  // TX FIFO half empty or less
43
#define SSI_RXFF                0x00000004  // RX FIFO half full or less
44
#define SSI_RXTO                0x00000002  // RX timeout
45
#define SSI_RXOR                0x00000001  // RX overrun
46
 
47
//*****************************************************************************
48
//
49
// Values that can be passed to SSIConfig.
50
//
51
//*****************************************************************************
52
#define SSI_FRF_MOTO_MODE_0     0x00000000  // Moto fmt, polarity 0, phase 0
53
#define SSI_FRF_MOTO_MODE_1     0x00000002  // Moto fmt, polarity 0, phase 1
54
#define SSI_FRF_MOTO_MODE_2     0x00000001  // Moto fmt, polarity 1, phase 0
55
#define SSI_FRF_MOTO_MODE_3     0x00000003  // Moto fmt, polarity 1, phase 1
56
#define SSI_FRF_TI              0x00000010  // TI frame format
57
#define SSI_FRF_NMW             0x00000020  // National MicroWire frame format
58
 
59
#define SSI_MODE_MASTER         0x00000000  // SSI master
60
#define SSI_MODE_SLAVE          0x00000001  // SSI slave
61
#define SSI_MODE_SLAVE_OD       0x00000002  // SSI slave with output disabled
62
 
63
//*****************************************************************************
64
//
65
// Prototypes for the APIs.
66
//
67
//*****************************************************************************
68
extern void SSIConfig(unsigned long ulBase, unsigned long ulProtocol,
69
                      unsigned long ulMode, unsigned long ulBitRate,
70
                      unsigned long ulDataWidth);
71
extern void SSIDataGet(unsigned long ulBase, unsigned long *pulData);
72
extern long SSIDataNonBlockingGet(unsigned long ulBase,
73
                                  unsigned long *pulData);
74
extern void SSIDataPut(unsigned long ulBase, unsigned long ulData);
75
extern long SSIDataNonBlockingPut(unsigned long ulBase, unsigned long ulData);
76
extern void SSIDisable(unsigned long ulBase);
77
extern void SSIEnable(unsigned long ulBase);
78
extern void SSIIntClear(unsigned long ulBase, unsigned long ulIntFlags);
79
extern void SSIIntDisable(unsigned long ulBase, unsigned long ulIntFlags);
80
extern void SSIIntEnable(unsigned long ulBase, unsigned long ulIntFlags);
81
extern void SSIIntRegister(unsigned long ulBase, void(*pfnHandler)(void));
82
extern unsigned long SSIIntStatus(unsigned long ulBase, tBoolean bMasked);
83
extern void SSIIntUnregister(unsigned long ulBase);
84
 
85
#ifdef __cplusplus
86
}
87
#endif
88
 
89
#endif // __SSI_H__

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.