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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LM3S811_IAR/] [LuminaryCode/] [sysctl.h] - Blame information for rev 581

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1 581 jeremybenn
//*****************************************************************************
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//
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// sysctl.h - Prototypes for the system control driver.
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//
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// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
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//
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// Software License Agreement
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//
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// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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// exclusively on LMI's Stellaris Family of microcontroller products.
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//
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// The software is owned by LMI and/or its suppliers, and is protected under
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// applicable copyright laws.  All rights are reserved.  Any use in violation
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// of the foregoing restrictions may subject the user to criminal sanctions
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// under applicable laws, as well as to civil liability for the breach of the
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// terms and conditions of this license.
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//
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// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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//
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// This is part of revision 991 of the Stellaris Driver Library.
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//
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//*****************************************************************************
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#ifndef __SYSCTL_H__
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#define __SYSCTL_H__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//*****************************************************************************
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//
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// The following are values that can be passed to the
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// SysCtlPeripheralPresent(), SysCtlPeripheralEnable(),
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// SysCtlPeripheralDisable(), and SysCtlPeripheralReset() APIs as the
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// ulPeripheral parameter.  The peripherals in the fourth group (upper nibble
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// is 3) can only be used with the SysCtlPeripheralPresent() API.
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//
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//*****************************************************************************
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#define SYSCTL_PERIPH_PWM       0x00100000  // PWM
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#define SYSCTL_PERIPH_ADC       0x00010000  // ADC
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#define SYSCTL_PERIPH_WDOG      0x00000008  // Watchdog
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#define SYSCTL_PERIPH_UART0     0x10000001  // UART 0
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#define SYSCTL_PERIPH_UART1     0x10000002  // UART 1
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#define SYSCTL_PERIPH_SSI       0x10000010  // SSI
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#define SYSCTL_PERIPH_QEI       0x10000100  // QEI
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#define SYSCTL_PERIPH_I2C       0x10001000  // I2C
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#define SYSCTL_PERIPH_TIMER0    0x10010000  // Timer 0
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#define SYSCTL_PERIPH_TIMER1    0x10020000  // Timer 1
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#define SYSCTL_PERIPH_TIMER2    0x10040000  // Timer 2
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#define SYSCTL_PERIPH_COMP0     0x11000000  // Analog comparator 0
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#define SYSCTL_PERIPH_COMP1     0x12000000  // Analog comparator 1
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#define SYSCTL_PERIPH_COMP2     0x14000000  // Analog comparator 2
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#define SYSCTL_PERIPH_GPIOA     0x20000001  // GPIO A
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#define SYSCTL_PERIPH_GPIOB     0x20000002  // GPIO B
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#define SYSCTL_PERIPH_GPIOC     0x20000004  // GPIO C
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#define SYSCTL_PERIPH_GPIOD     0x20000008  // GPIO D
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#define SYSCTL_PERIPH_GPIOE     0x20000010  // GPIO E
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#define SYSCTL_PERIPH_MPU       0x30000080  // Cortex M3 MPU
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#define SYSCTL_PERIPH_TEMP      0x30000020  // Temperature sensor
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#define SYSCTL_PERIPH_PLL       0x30000010  // PLL
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//*****************************************************************************
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//
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// The following are values that can be passed to the SysCtlPinPresent() API
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// as the ulPin parameter.
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//
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//*****************************************************************************
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#define SYSCTL_PIN_PWM0         0x00000001  // PWM0 pin
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#define SYSCTL_PIN_PWM1         0x00000002  // PWM1 pin
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#define SYSCTL_PIN_PWM2         0x00000004  // PWM2 pin
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#define SYSCTL_PIN_PWM3         0x00000008  // PWM3 pin
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#define SYSCTL_PIN_PWM4         0x00000010  // PWM4 pin
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#define SYSCTL_PIN_PWM5         0x00000020  // PWM5 pin
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#define SYSCTL_PIN_C0MINUS      0x00000040  // C0- pin
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#define SYSCTL_PIN_C0PLUS       0x00000080  // C0+ pin
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#define SYSCTL_PIN_C0O          0x00000100  // C0o pin
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#define SYSCTL_PIN_C1MINUS      0x00000200  // C1- pin
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#define SYSCTL_PIN_C1PLUS       0x00000400  // C1+ pin
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#define SYSCTL_PIN_C1O          0x00000800  // C1o pin
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#define SYSCTL_PIN_C2MINUS      0x00001000  // C2- pin
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#define SYSCTL_PIN_C2PLUS       0x00002000  // C2+ pin
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#define SYSCTL_PIN_C2O          0x00004000  // C2o pin
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#define SYSCTL_PIN_ADC0         0x00010000  // ADC0 pin
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#define SYSCTL_PIN_ADC1         0x00020000  // ADC1 pin
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#define SYSCTL_PIN_ADC2         0x00040000  // ADC2 pin
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#define SYSCTL_PIN_ADC3         0x00080000  // ADC3 pin
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#define SYSCTL_PIN_ADC4         0x00100000  // ADC4 pin
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#define SYSCTL_PIN_ADC5         0x00200000  // ADC5 pin
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#define SYSCTL_PIN_ADC6         0x00400000  // ADC6 pin
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#define SYSCTL_PIN_ADC7         0x00800000  // ADC7 pin
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#define SYSCTL_PIN_CCP0         0x01000000  // CCP0 pin
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#define SYSCTL_PIN_CCP1         0x02000000  // CCP1 pin
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#define SYSCTL_PIN_CCP2         0x04000000  // CCP2 pin
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#define SYSCTL_PIN_CCP3         0x08000000  // CCP3 pin
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#define SYSCTL_PIN_CCP4         0x10000000  // CCP4 pin
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#define SYSCTL_PIN_CCP5         0x20000000  // CCP5 pin
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#define SYSCTL_PIN_32KHZ        0x80000000  // 32kHz pin
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//*****************************************************************************
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//
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// The following are values that can be passed to the SysCtlLDOSet() API as
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// the ulVoltage value, or returned by the SysCtlLDOGet() API.
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//
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//*****************************************************************************
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#define SYSCTL_LDO_2_25V        0x00000005  // LDO output of 2.25V
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#define SYSCTL_LDO_2_30V        0x00000004  // LDO output of 2.30V
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#define SYSCTL_LDO_2_35V        0x00000003  // LDO output of 2.35V
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#define SYSCTL_LDO_2_40V        0x00000002  // LDO output of 2.40V
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#define SYSCTL_LDO_2_45V        0x00000001  // LDO output of 2.45V
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#define SYSCTL_LDO_2_50V        0x00000000  // LDO output of 2.50V
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#define SYSCTL_LDO_2_55V        0x0000001f  // LDO output of 2.55V
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#define SYSCTL_LDO_2_60V        0x0000001e  // LDO output of 2.60V
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#define SYSCTL_LDO_2_65V        0x0000001d  // LDO output of 2.65V
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#define SYSCTL_LDO_2_70V        0x0000001c  // LDO output of 2.70V
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#define SYSCTL_LDO_2_75V        0x0000001b  // LDO output of 2.75V
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//*****************************************************************************
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//
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// The following are values that can be passed to the SysCtlLDOConfigSet() API.
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//
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//*****************************************************************************
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#define SYSCTL_LDOCFG_ARST      0x00000001  // Allow LDO failure to reset
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#define SYSCTL_LDOCFG_NORST     0x00000000  // Do not reset on LDO failure
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//*****************************************************************************
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//
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// The following are values that can be passed to the SysCtlIntEnable(),
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// SysCtlIntDisable(), and SysCtlIntClear() APIs, or returned in the bit mask
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// by the SysCtlIntStatus() API.
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//
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//*****************************************************************************
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#define SYSCTL_INT_PLL_LOCK     0x00000040  // PLL lock interrupt
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#define SYSCTL_INT_CUR_LIMIT    0x00000020  // Current limit interrupt
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#define SYSCTL_INT_IOSC_FAIL    0x00000010  // Internal oscillator failure int
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#define SYSCTL_INT_MOSC_FAIL    0x00000008  // Main oscillator failure int
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#define SYSCTL_INT_POR          0x00000004  // Power on reset interrupt
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#define SYSCTL_INT_BOR          0x00000002  // Brown out interrupt
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#define SYSCTL_INT_PLL_FAIL     0x00000001  // PLL failure interrupt
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//*****************************************************************************
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//
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// The following are values that can be passed to the SysCtlResetCauseClear()
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// API or returned by the SysCtlResetCauseGet() API.
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//
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//*****************************************************************************
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#define SYSCTL_CAUSE_LDO        0x00000020  // LDO power not OK reset
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#define SYSCTL_CAUSE_SW         0x00000010  // Software reset
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#define SYSCTL_CAUSE_WDOG       0x00000008  // Watchdog reset
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#define SYSCTL_CAUSE_BOR        0x00000004  // Brown-out reset
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#define SYSCTL_CAUSE_POR        0x00000002  // Power on reset
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#define SYSCTL_CAUSE_EXT        0x00000001  // External reset
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//*****************************************************************************
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//
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// The following are values that can be passed to the SysCtlBrownOutConfigSet()
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// API as the ulConfig parameter.
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//
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//*****************************************************************************
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#define SYSCTL_BOR_RESET        0x00000002  // Reset instead of interrupting
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#define SYSCTL_BOR_RESAMPLE     0x00000001  // Resample BOR before asserting
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//*****************************************************************************
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//
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// The following are values that can be passed to the SysCtlPWMClockSet() API
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// as the ulConfig parameter, and can be returned by the SysCtlPWMClockGet()
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// API.
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//
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//*****************************************************************************
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#define SYSCTL_PWMDIV_1         0x00000000  // PWM clock is processor clock /1
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#define SYSCTL_PWMDIV_2         0x00100000  // PWM clock is processor clock /2
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#define SYSCTL_PWMDIV_4         0x00120000  // PWM clock is processor clock /4
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#define SYSCTL_PWMDIV_8         0x00140000  // PWM clock is processor clock /8
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#define SYSCTL_PWMDIV_16        0x00160000  // PWM clock is processor clock /16
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#define SYSCTL_PWMDIV_32        0x00180000  // PWM clock is processor clock /32
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#define SYSCTL_PWMDIV_64        0x001A0000  // PWM clock is processor clock /64
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//*****************************************************************************
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//
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// The following are values that can be passed to the SysCtlADCSpeedSet() API
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// as the ulSpeed parameter, and can be returned by the SyCtlADCSpeedGet()
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// API.
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//
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//*****************************************************************************
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#define SYSCTL_ADCSPEED_1MSPS   0x00000300  // 1,000,000 samples per second
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#define SYSCTL_ADCSPEED_500KSPS 0x00000200  // 500,000 samples per second
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#define SYSCTL_ADCSPEED_250KSPS 0x00000100  // 250,000 samples per second
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#define SYSCTL_ADCSPEED_125KSPS 0x00000000  // 125,000 samples per second
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//*****************************************************************************
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//
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// The following are values that can be passed to the SysCtlClockSet() API as
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// the ulConfig parameter.
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//
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//*****************************************************************************
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#define SYSCTL_SYSDIV_1         0x07800000  // Processor clock is osc/pll /1
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#define SYSCTL_SYSDIV_2         0x00C00000  // Processor clock is osc/pll /2
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#define SYSCTL_SYSDIV_3         0x01400000  // Processor clock is osc/pll /3
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#define SYSCTL_SYSDIV_4         0x01C00000  // Processor clock is osc/pll /4
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#define SYSCTL_SYSDIV_5         0x02400000  // Processor clock is osc/pll /5
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#define SYSCTL_SYSDIV_6         0x02C00000  // Processor clock is osc/pll /6
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#define SYSCTL_SYSDIV_7         0x03400000  // Processor clock is osc/pll /7
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#define SYSCTL_SYSDIV_8         0x03C00000  // Processor clock is osc/pll /8
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#define SYSCTL_SYSDIV_9         0x04400000  // Processor clock is osc/pll /9
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#define SYSCTL_SYSDIV_10        0x04C00000  // Processor clock is osc/pll /10
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#define SYSCTL_SYSDIV_11        0x05400000  // Processor clock is osc/pll /11
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#define SYSCTL_SYSDIV_12        0x05C00000  // Processor clock is osc/pll /12
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#define SYSCTL_SYSDIV_13        0x06400000  // Processor clock is osc/pll /13
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#define SYSCTL_SYSDIV_14        0x06C00000  // Processor clock is osc/pll /14
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#define SYSCTL_SYSDIV_15        0x07400000  // Processor clock is osc/pll /15
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#define SYSCTL_SYSDIV_16        0x07C00000  // Processor clock is osc/pll /16
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#define SYSCTL_USE_PLL          0x00000000  // System clock is the PLL clock
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#define SYSCTL_USE_OSC          0x00003800  // System clock is the osc clock
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#define SYSCTL_XTAL_3_57MHZ     0x00000100  // External crystal is 3.579545MHz
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#define SYSCTL_XTAL_3_68MHZ     0x00000140  // External crystal is 3.6864MHz
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#define SYSCTL_XTAL_4MHZ        0x00000180  // External crystal is 4MHz
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#define SYSCTL_XTAL_4_09MHZ     0x000001C0  // External crystal is 4.096MHz
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#define SYSCTL_XTAL_4_91MHZ     0x00000200  // External crystal is 4.9152MHz
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#define SYSCTL_XTAL_5MHZ        0x00000240  // External crystal is 5MHz
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#define SYSCTL_XTAL_5_12MHZ     0x00000280  // External crystal is 5.12MHz
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#define SYSCTL_XTAL_6MHZ        0x000002C0  // External crystal is 6MHz
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#define SYSCTL_XTAL_6_14MHZ     0x00000300  // External crystal is 6.144MHz
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#define SYSCTL_XTAL_7_37MHZ     0x00000340  // External crystal is 7.3728MHz
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#define SYSCTL_XTAL_8MHZ        0x00000380  // External crystal is 8MHz
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#define SYSCTL_XTAL_8_19MHZ     0x000003C0  // External crystal is 8.192MHz
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#define SYSCTL_OSC_MAIN         0x00000000  // Oscillator source is main osc
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#define SYSCTL_OSC_INT          0x00000010  // Oscillator source is int. osc
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#define SYSCTL_OSC_INT4         0x00000020  // Oscillator source is int. osc /4
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#define SYSCTL_INT_OSC_DIS      0x00000002  // Disable internal oscillator
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#define SYSCTL_MAIN_OSC_DIS     0x00000001  // Disable main oscillator
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//*****************************************************************************
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//
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// Prototypes for the APIs.
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//
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//*****************************************************************************
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extern unsigned long SysCtlSRAMSizeGet(void);
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extern unsigned long SysCtlFlashSizeGet(void);
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extern tBoolean SysCtlPinPresent(unsigned long ulPin);
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extern tBoolean SysCtlPeripheralPresent(unsigned long ulPeripheral);
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extern void SysCtlPeripheralReset(unsigned long ulPeripheral);
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extern void SysCtlPeripheralEnable(unsigned long ulPeripheral);
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extern void SysCtlPeripheralDisable(unsigned long ulPeripheral);
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extern void SysCtlPeripheralSleepEnable(unsigned long ulPeripheral);
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extern void SysCtlPeripheralSleepDisable(unsigned long ulPeripheral);
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extern void SysCtlPeripheralDeepSleepEnable(unsigned long ulPeripheral);
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extern void SysCtlPeripheralDeepSleepDisable(unsigned long ulPeripheral);
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extern void SysCtlPeripheralClockGating(tBoolean bEnable);
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extern void SysCtlIntRegister(void (*pfnHandler)(void));
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extern void SysCtlIntUnregister(void);
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extern void SysCtlIntEnable(unsigned long ulInts);
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extern void SysCtlIntDisable(unsigned long ulInts);
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extern void SysCtlIntClear(unsigned long ulInts);
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extern unsigned long SysCtlIntStatus(tBoolean bMasked);
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extern void SysCtlLDOSet(unsigned long ulVoltage);
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extern unsigned long SysCtlLDOGet(void);
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extern void SysCtlLDOConfigSet(unsigned long ulConfig);
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extern void SysCtlReset(void);
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extern void SysCtlSleep(void);
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extern void SysCtlDeepSleep(void);
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extern unsigned long SysCtlResetCauseGet(void);
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extern void SysCtlResetCauseClear(unsigned long ulCauses);
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extern void SysCtlBrownOutConfigSet(unsigned long ulConfig,
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                                    unsigned long ulDelay);
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extern void SysCtlClockSet(unsigned long ulConfig);
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extern unsigned long SysCtlClockGet(void);
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extern void SysCtlPWMClockSet(unsigned long ulConfig);
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extern unsigned long SysCtlPWMClockGet(void);
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extern void SysCtlADCSpeedSet(unsigned long ulSpeed);
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extern unsigned long SysCtlADCSpeedGet(void);
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extern void SysCtlIOSCVerificationSet(tBoolean bEnable);
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extern void SysCtlMOSCVerificationSet(tBoolean bEnable);
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extern void SysCtlPLLVerificationSet(tBoolean bEnable);
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extern void SysCtlClkVerificationClear(void);
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#ifdef __cplusplus
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}
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#endif
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#endif // __SYSCTL_H__

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