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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LM3S811_IAR/] [startup.c] - Blame information for rev 592

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1 581 jeremybenn
//*****************************************************************************
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//
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// startup_ewarm.c - Boot code for Stellaris.
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//
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// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
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//
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// Software License Agreement
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//
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// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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// exclusively on LMI's Stellaris Family of microcontroller products.
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//
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// The software is owned by LMI and/or its suppliers, and is protected under
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// applicable copyright laws.  All rights are reserved.  Any use in violation
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// of the foregoing restrictions may subject the user to criminal sanctions
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// under applicable laws, as well as to civil liability for the breach of the
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// terms and conditions of this license.
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//
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// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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//
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// This is part of revision 991 of the Stellaris Driver Library.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// Enable the IAR extensions for this source file.
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//
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//*****************************************************************************
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#pragma language=extended
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//*****************************************************************************
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//
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// Forward declaration of the default fault handlers.
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//
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//*****************************************************************************
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static void NmiSR(void);
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static void FaultISR(void);
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static void IntDefaultHandler(void);
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//*****************************************************************************
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//
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// The entry point for the application.
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//
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//*****************************************************************************
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extern void __iar_program_start(void);
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//*****************************************************************************
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//
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// External declaration for the interrupt handler used by the application.
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//
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//*****************************************************************************
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extern void xPortPendSVHandler(void);
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extern void xPortSysTickHandler(void);
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extern void vGPIO_ISR(void);
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extern void vUART_ISR(void);
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extern void vPortSVCHandler( void );
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//*****************************************************************************
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//
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// Reserve space for the system stack.
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//
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//*****************************************************************************
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#ifndef STACK_SIZE
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#define STACK_SIZE                              64
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#endif
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static unsigned long pulStack[STACK_SIZE] @ ".noinit";
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//*****************************************************************************
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//
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// A union that describes the entries of the vector table.  The union is needed
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// since the first entry is the stack pointer and the remainder are function
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// pointers.
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//
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//*****************************************************************************
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typedef union
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{
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    void (*pfnHandler)(void);
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    unsigned long ulPtr;
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}
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uVectorEntry;
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//*****************************************************************************
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//
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// The minimal vector table for a Cortex M3.  Note that the proper constructs
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// must be placed on this to ensure that it ends up at physical address
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// 0x0000.0000.
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//
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//*****************************************************************************
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__root const uVectorEntry __vector_table[] @ ".intvec" =
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{
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    { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) },
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                                            // The initial stack pointer
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    __iar_program_start,                    // The reset handler
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    NmiSR,                                  // The NMI handler
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    FaultISR,                               // The hard fault handler
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    IntDefaultHandler,                      // The MPU fault handler
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    IntDefaultHandler,                      // The bus fault handler
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    IntDefaultHandler,                      // The usage fault handler
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    0,                                      // Reserved
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    vPortSVCHandler,                        // SVCall handler
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    IntDefaultHandler,                      // Debug monitor handler
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    0,                                      // Reserved
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    xPortPendSVHandler,                     // The PendSV handler
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    xPortSysTickHandler,                    // The SysTick handler
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    IntDefaultHandler,                      // GPIO Port A
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    IntDefaultHandler,                      // GPIO Port B
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    vGPIO_ISR,                              // GPIO Port C
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    IntDefaultHandler,                      // GPIO Port D
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    IntDefaultHandler,                      // GPIO Port E
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    vUART_ISR,                              // UART0 Rx and Tx
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    IntDefaultHandler,                      // UART1 Rx and Tx
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    IntDefaultHandler,                      // SSI Rx and Tx
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    IntDefaultHandler,                      // I2C Master and Slave
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    IntDefaultHandler,                      // PWM Fault
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    IntDefaultHandler,                      // PWM Generator 0
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    IntDefaultHandler,                      // PWM Generator 1
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    IntDefaultHandler,                      // PWM Generator 2
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    IntDefaultHandler,                      // Quadrature Encoder
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    IntDefaultHandler,                      // ADC Sequence 0
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    IntDefaultHandler,                      // ADC Sequence 1
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    IntDefaultHandler,                      // ADC Sequence 2
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    IntDefaultHandler,                      // ADC Sequence 3
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    IntDefaultHandler,                      // Watchdog timer
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    IntDefaultHandler,                      // Timer 0 subtimer A
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    IntDefaultHandler,                      // Timer 0 subtimer B
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    IntDefaultHandler,                      // Timer 1 subtimer A
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    IntDefaultHandler,                      // Timer 1 subtimer B
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    IntDefaultHandler,                      // Timer 2 subtimer A
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    IntDefaultHandler,                      // Timer 2 subtimer B
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    IntDefaultHandler,                      // Analog Comparator 0
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    IntDefaultHandler,                      // Analog Comparator 1
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    IntDefaultHandler,                      // Analog Comparator 2
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    IntDefaultHandler,                      // System Control (PLL, OSC, BO)
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    IntDefaultHandler                       // FLASH Control
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};
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives a NMI.  This
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// simply enters an infinite loop, preserving the system state for examination
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// by a debugger.
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//
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//*****************************************************************************
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static void
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NmiSR(void)
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{
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    //
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    // Enter an infinite loop.
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    //
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    while(1)
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    {
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    }
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}
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives a fault
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// interrupt.  This simply enters an infinite loop, preserving the system state
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// for examination by a debugger.
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//
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//*****************************************************************************
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static void
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FaultISR(void)
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{
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    //
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    // Enter an infinite loop.
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    //
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    while(1)
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    {
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    }
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}
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//*****************************************************************************
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//
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// This is the code that gets called when the processor receives an unexpected
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// interrupt.  This simply enters an infinite loop, preserving the system state
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// for examination by a debugger.
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//
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//*****************************************************************************
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static void
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IntDefaultHandler(void)
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{
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    //
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    // Go into an infinite loop.
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    //
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    while(1)
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    {
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    }
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}

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