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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LM3S811_KEIL/] [LuminaryCode/] [hw_memmap.h] - Blame information for rev 581

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1 581 jeremybenn
//*****************************************************************************
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//
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// hw_memmap.h - Macros defining the memory map of Stellaris.
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//
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// Copyright (c) 2005,2006 Luminary Micro, Inc.  All rights reserved.
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//
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// Software License Agreement
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//
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// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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// exclusively on LMI's Stellaris Family of microcontroller products.
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//
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// The software is owned by LMI and/or its suppliers, and is protected under
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// applicable copyright laws.  All rights are reserved.  Any use in violation
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// of the foregoing restrictions may subject the user to criminal sanctions
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// under applicable laws, as well as to civil liability for the breach of the
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// terms and conditions of this license.
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//
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// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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//
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// This is part of revision 816 of the Stellaris Driver Library.
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//
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//*****************************************************************************
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#ifndef __HW_MEMMAP_H__
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#define __HW_MEMMAP_H__
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//*****************************************************************************
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//
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// The following define the base address of the memories and peripherals.
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//
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//*****************************************************************************
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#define FLASH_BASE              0x00000000  // FLASH memory
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#define SRAM_BASE               0x20000000  // SRAM memory
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#define WATCHDOG_BASE           0x40000000  // Watchdog
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#define GPIO_PORTA_BASE         0x40004000  // GPIO Port A
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#define GPIO_PORTB_BASE         0x40005000  // GPIO Port B
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#define GPIO_PORTC_BASE         0x40006000  // GPIO Port C
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#define GPIO_PORTD_BASE         0x40007000  // GPIO Port D
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#define SSI_BASE                0x40008000  // SSI
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#define UART0_BASE              0x4000C000  // UART0
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#define UART1_BASE              0x4000D000  // UART1
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#define I2C_MASTER_BASE         0x40020000  // I2C Master
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#define I2C_SLAVE_BASE          0x40020800  // I2C Slave
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#define GPIO_PORTE_BASE         0x40024000  // GPIO Port E
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#define PWM_BASE                0x40028000  // PWM
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#define QEI_BASE                0x4002C000  // QEI
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#define TIMER0_BASE             0x40030000  // Timer0
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#define TIMER1_BASE             0x40031000  // Timer1
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#define TIMER2_BASE             0x40032000  // Timer2
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#define ADC_BASE                0x40038000  // ADC
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#define COMP_BASE               0x4003C000  // Analog comparators
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#define FLASH_CTRL_BASE         0x400FD000  // FLASH Controller
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#define SYSCTL_BASE             0x400FE000  // System Control
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#define ITM_BASE                0xE0000000  // Instrumentation Trace Macrocell
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#define DWT_BASE                0xE0001000  // Data Watchpoint and Trace
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#define FPB_BASE                0xE0002000  // FLASH Patch and Breakpoint
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#define NVIC_BASE               0xE000E000  // Nested Vectored Interrupt Ctrl
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#define TPIU_BASE               0xE0040000  // Trace Port Interface Unit
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#endif // __HW_MEMMAP_H__

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