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//*****************************************************************************

//

// startup_ewarm.c - Boot code for Stellaris.

//

// Copyright (c) 2006-2007 Luminary Micro, Inc.  All rights reserved.

//

// Software License Agreement

//

// Luminary Micro, Inc. (LMI) is supplying this software for use solely and

// exclusively on LMI's microcontroller products.

//

// The software is owned by LMI and/or its suppliers, and is protected under

// applicable copyright laws.  All rights are reserved.  Any use in violation

// of the foregoing restrictions may subject the user to criminal sanctions

// under applicable laws, as well as to civil liability for the breach of the

// terms and conditions of this license.

//

// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED

// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF

// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.

// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR

// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

//

// This is part of revision 100 of the Stellaris Ethernet

// Applications Library.

//

//*****************************************************************************

//*****************************************************************************

//

// Enable the IAR extensions for this source file.

//

//*****************************************************************************

#pragma language=extended

//*****************************************************************************

//

// Forward declaration of the default fault handlers.

//

//*****************************************************************************

static void NmiSR(void);

static void FaultISR(void);

static void IntDefaultHandler(void);

//*****************************************************************************

//

// External declaration for the interrupt handler used by the application.

//

//*****************************************************************************

//*****************************************************************************

//

// The entry point for the application.

//

//*****************************************************************************

extern void __iar_program_start(void);

extern void xPortPendSVHandler(void);

extern void xPortSysTickHandler(void);

extern void vPortSVCHandler(void);

extern void vT2InterruptHandler( void );

extern void vT3InterruptHandler( void );

extern void vEMAC_ISR( void );

extern void Timer0IntHandler( void );

//*****************************************************************************

//

// Reserve space for the system stack.

//

//*****************************************************************************

#ifndef STACK_SIZE

#define STACK_SIZE                              120

#endif

static unsigned long pulStack[STACK_SIZE] @ ".noinit";

//*****************************************************************************

//

// A union that describes the entries of the vector table.  The union is needed

// since the first entry is the stack pointer and the remainder are function

// pointers.

//

//*****************************************************************************

typedef union

{

    void (*pfnHandler)(void);

    unsigned long ulPtr;

}

uVectorEntry;

//*****************************************************************************

//

// The minimal vector table for a Cortex M3.  Note that the proper constructs

// must be placed on this to ensure that it ends up at physical address

// 0x0000.0000.

//

//*****************************************************************************

__root const uVectorEntry __vector_table[] @ ".intvec" =

{

    { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) },

                                            // The initial stack pointer

    __iar_program_start,                    // The reset handler

    NmiSR,                                  // The NMI handler

    FaultISR,                               // The hard fault handler

    IntDefaultHandler,                      // The MPU fault handler

    IntDefaultHandler,                      // The bus fault handler

    IntDefaultHandler,                      // The usage fault handler

    0,                                      // Reserved

    0,                                      // Reserved

    0,                                      // Reserved

    0,                                      // Reserved

    vPortSVCHandler,                        // SVCall handler

    IntDefaultHandler,                      // Debug monitor handler

    0,                                      // Reserved

    xPortPendSVHandler,                     // The PendSV handler

    xPortSysTickHandler,                    // The SysTick handler

    IntDefaultHandler,                      // GPIO Port A

    IntDefaultHandler,                      // GPIO Port B

    IntDefaultHandler,                      // GPIO Port C

    IntDefaultHandler,                      // GPIO Port D

    IntDefaultHandler,                      // GPIO Port E

    IntDefaultHandler,                      // UART0 Rx and Tx

    IntDefaultHandler,                      // UART1 Rx and Tx

    IntDefaultHandler,                      // SSI Rx and Tx

    IntDefaultHandler,                      // I2C Master and Slave

    IntDefaultHandler,                      // PWM Fault

    IntDefaultHandler,                      // PWM Generator 0

    IntDefaultHandler,                      // PWM Generator 1

    IntDefaultHandler,                      // PWM Generator 2

    IntDefaultHandler,                      // Quadrature Encoder

    IntDefaultHandler,                      // ADC Sequence 0

    IntDefaultHandler,                      // ADC Sequence 1

    IntDefaultHandler,                      // ADC Sequence 2

    IntDefaultHandler,                      // ADC Sequence 3

    IntDefaultHandler,                      // Watchdog timer

    Timer0IntHandler,                       // Timer 0 subtimer A

    IntDefaultHandler,                      // Timer 0 subtimer B

    IntDefaultHandler,                      // Timer 1 subtimer A

    IntDefaultHandler,                      // Timer 1 subtimer B

    vT2InterruptHandler,                      // Timer 2 subtimer A

    IntDefaultHandler,                      // Timer 2 subtimer B

    IntDefaultHandler,                      // Analog Comparator 0

    IntDefaultHandler,                      // Analog Comparator 1

    IntDefaultHandler,                      // Analog Comparator 2

    IntDefaultHandler,                      // System Control (PLL, OSC, BO)

    IntDefaultHandler,                      // FLASH Control

    IntDefaultHandler,                      // GPIO Port F

    IntDefaultHandler,                      // GPIO Port G

    IntDefaultHandler,                      // GPIO Port H

    IntDefaultHandler,                      // UART2 Rx and Tx

    IntDefaultHandler,                      // SSI1 Rx and Tx

    vT3InterruptHandler,                    // Timer 3 subtimer A

    IntDefaultHandler,                      // Timer 3 subtimer B

    IntDefaultHandler,                      // I2C1 Master and Slave

    IntDefaultHandler,                      // Quadrature Encoder 1

    IntDefaultHandler,                      // CAN0

    IntDefaultHandler,                      // CAN1

    IntDefaultHandler,                      // CAN2

    vEMAC_ISR,                                          // Ethernet

    IntDefaultHandler,                      // Hibernate

    IntDefaultHandler,                      // USB0

    IntDefaultHandler,                      // PWM Generator 3

    IntDefaultHandler,                      // uDMA Software Transfer

    IntDefaultHandler                       // uDMA Error

};

//*****************************************************************************

//

// This is the code that gets called when the processor receives a NMI.  This

// simply enters an infinite loop, preserving the system state for examination

// by a debugger.

//

//*****************************************************************************

static void

NmiSR(void)

{

    //

    // Enter an infinite loop.

    //

    while(1)

    {

    }

}

//*****************************************************************************

//

// This is the code that gets called when the processor receives a fault

// interrupt.  This simply enters an infinite loop, preserving the system state

// for examination by a debugger.

//

//*****************************************************************************

static void

FaultISR(void)

{

    //

    // Enter an infinite loop.

    //

    while(1)

    {

    }

}

//*****************************************************************************

//

// This is the code that gets called when the processor receives an unexpected

// interrupt.  This simply enters an infinite loop, preserving the system state

// for examination by a debugger.

//

//*****************************************************************************

static void

IntDefaultHandler(void)

{

    //

    // Go into an infinite loop.

    //

    while(1)

    {

    }

}