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jeremybenn |
/*****************************************************************************
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* Copyright (c) 2006 Rowley Associates Limited. *
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* *
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* This file may be distributed under the terms of the License Agreement *
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* provided with this software. *
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* *
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* THIS FILE IS PROVIDED AS IS WITH NO WARRANTY OF ANY KIND, INCLUDING THE *
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* WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
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*****************************************************************************/
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/*****************************************************************************
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* Preprocessor Definitions
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* ------------------------
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*
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* STARTUP_FROM_RESET
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*
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* If defined, the program will startup from power-on/reset. If not defined
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* the program will just loop endlessly from power-on/reset.
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*
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* This definition is not defined by default on this target because the
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* debugger is unable to reset this target and maintain control of it over the
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* JTAG interface. The advantage of doing this is that it allows the debugger
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* to reset the CPU and run programs from a known reset CPU state on each run.
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* It also acts as a safety net if you accidently download a program in FLASH
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* that crashes and prevents the debugger from taking control over JTAG
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* rendering the target unusable over JTAG. The obvious disadvantage of doing
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* this is that your application will not startup without the debugger.
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*
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* We advise that on this target you keep STARTUP_FROM_RESET undefined whilst
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* you are developing and only define STARTUP_FROM_RESET when development is
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* complete.
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*
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*****************************************************************************/
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.extern xPortPendSVHandler
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.extern xPortSysTickHandler
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.extern vPortSVCHandler
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.extern Timer0IntHandler
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.extern vT2InterruptHandler
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.extern vT3InterruptHandler
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.extern vEMAC_ISR
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.global reset_handler
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.macro DEFAULT_ISR_HANDLER name=
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.thumb_func
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.weak \name
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\name:
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1: b 1b /* endless loop */
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.endm
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.section .vectors, "ax"
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.code 16
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.align 0
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.global _vectors
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_vectors:
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.word __stack_end__
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#ifdef STARTUP_FROM_RESET
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.word reset_handler
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#else
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.word reset_wait
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#endif /* STARTUP_FROM_RESET */
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.word Nmi_ISR
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.word Fault_ISR
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.word MPU_Fault_ISR
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.word 0 /* Populate if using Bus fault */
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.word 0 /* Populate if using Usage fault */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word vPortSVCHandler
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.word 0 /* Populate if using a debug monitor */
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.word 0 /* Reserved */
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.word xPortPendSVHandler
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.word xPortSysTickHandler
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.word GPIO_Port_A_ISR
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.word GPIO_Port_B_ISR
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.word GPIO_Port_C_ISR
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.word GPIO_Port_D_ISR
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.word GPIO_Port_E_ISR
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.word UART0_ISR
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.word UART1_ISR
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.word SSI_ISR
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.word I2C_ISR
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.word PWM_Fault_ISR
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.word PWM_Generator_0_ISR
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.word PWM_Generator_1_ISR
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.word PWM_Generator_2_ISR
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.word QEI_ISR
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.word ADC_Sequence_0_ISR
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.word ADC_Sequence_1_ISR
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.word ADC_Sequence_2_ISR
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.word ADC_Sequence_3_ISR
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.word Watchdog_Timer_ISR
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.word Timer0IntHandler
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.word Timer0B_ISR
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.word Timer1A_ISR
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.word Timer1B_ISR
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.word vT2InterruptHandler
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.word Timer2B_ISR
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.word Analog_Comparator_0_ISR
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.word Analog_Comparator_1_ISR
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.word Analog_Comparator_2_ISR
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.word System_Control_ISR
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.word FLASH_Control_ISR
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.word GPIO_Port_F_ISR
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.word GPIO_Port_G_ISR
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.word GPIO_Port_H_ISR
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.word UART2_ISR
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.word SSI1_ISR
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.word vT3InterruptHandler
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.word Timer3B_ISR
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.word I2C1_ISR
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.word QEI1_ISR
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.word CAN0_ISR
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.word CAN1_ISR
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.word CAN2_ISR
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.word vEMAC_ISR
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.word HIBERNATE_ISR
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.word USB0_ISR
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.word PWM_Generator_3_ISR
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.word uDMA_Software_Transfer_ISR
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.word uDMA_Error_ISR
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_vectors_end:
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.section .init, "ax"
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.thumb_func
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reset_handler:
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#ifdef __RAM_BUILD
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/* If this is a RAM build, configure vector table offset register to point
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to the RAM vector table. */
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ldr r0, =0xE000ED08
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ldr r1, =_vectors
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str r1, [r0]
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#endif
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b _start
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DEFAULT_ISR_HANDLER Nmi_ISR
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DEFAULT_ISR_HANDLER Fault_ISR
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DEFAULT_ISR_HANDLER MPU_Fault_ISR
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DEFAULT_ISR_HANDLER SVCall_ISR
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DEFAULT_ISR_HANDLER SysTick_ISR
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DEFAULT_ISR_HANDLER PendSV_ISR
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DEFAULT_ISR_HANDLER GPIO_Port_A_ISR
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DEFAULT_ISR_HANDLER GPIO_Port_B_ISR
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DEFAULT_ISR_HANDLER GPIO_Port_C_ISR
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DEFAULT_ISR_HANDLER GPIO_Port_D_ISR
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DEFAULT_ISR_HANDLER GPIO_Port_E_ISR
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DEFAULT_ISR_HANDLER UART0_ISR
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DEFAULT_ISR_HANDLER UART1_ISR
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DEFAULT_ISR_HANDLER SSI_ISR
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DEFAULT_ISR_HANDLER I2C_ISR
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DEFAULT_ISR_HANDLER PWM_Fault_ISR
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DEFAULT_ISR_HANDLER PWM_Generator_0_ISR
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DEFAULT_ISR_HANDLER PWM_Generator_1_ISR
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DEFAULT_ISR_HANDLER PWM_Generator_2_ISR
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DEFAULT_ISR_HANDLER QEI_ISR
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DEFAULT_ISR_HANDLER ADC_Sequence_0_ISR
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DEFAULT_ISR_HANDLER ADC_Sequence_1_ISR
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DEFAULT_ISR_HANDLER ADC_Sequence_2_ISR
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DEFAULT_ISR_HANDLER ADC_Sequence_3_ISR
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DEFAULT_ISR_HANDLER Watchdog_Timer_ISR
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DEFAULT_ISR_HANDLER Timer0A_ISR
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DEFAULT_ISR_HANDLER Timer0B_ISR
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DEFAULT_ISR_HANDLER Timer1A_ISR
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DEFAULT_ISR_HANDLER Timer1B_ISR
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DEFAULT_ISR_HANDLER Timer2A_ISR
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DEFAULT_ISR_HANDLER Timer2B_ISR
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DEFAULT_ISR_HANDLER Analog_Comparator_0_ISR
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DEFAULT_ISR_HANDLER Analog_Comparator_1_ISR
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DEFAULT_ISR_HANDLER Analog_Comparator_2_ISR
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DEFAULT_ISR_HANDLER System_Control_ISR
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DEFAULT_ISR_HANDLER FLASH_Control_ISR
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DEFAULT_ISR_HANDLER GPIO_Port_F_ISR
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DEFAULT_ISR_HANDLER GPIO_Port_G_ISR
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DEFAULT_ISR_HANDLER GPIO_Port_H_ISR
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DEFAULT_ISR_HANDLER UART2_ISR
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DEFAULT_ISR_HANDLER SSI1_ISR
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DEFAULT_ISR_HANDLER Timer3A_ISR
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DEFAULT_ISR_HANDLER Timer3B_ISR
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DEFAULT_ISR_HANDLER I2C1_ISR
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DEFAULT_ISR_HANDLER QEI1_ISR
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DEFAULT_ISR_HANDLER CAN0_ISR
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DEFAULT_ISR_HANDLER CAN1_ISR
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DEFAULT_ISR_HANDLER CAN2_ISR
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DEFAULT_ISR_HANDLER ETHERNET_ISR
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DEFAULT_ISR_HANDLER HIBERNATE_ISR
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DEFAULT_ISR_HANDLER USB0_ISR
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DEFAULT_ISR_HANDLER PWM_Generator_3_ISR
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DEFAULT_ISR_HANDLER uDMA_Software_Transfer_ISR
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DEFAULT_ISR_HANDLER uDMA_Error_ISR
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#ifndef STARTUP_FROM_RESET
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DEFAULT_ISR_HANDLER reset_wait
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#endif /* STARTUP_FROM_RESET */
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