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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LPC1768_GCC_RedSuite/] [src/] [rtosdemo_rdb1768_Debug.ld] - Blame information for rev 581

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/*
 * GENERATED FILE - DO NOT EDIT
 * (C) Code Red Technologies Ltd, 2008-9
 * Generated C linker script file for LPC1768
 * (created from nxp_lpc13_c.ld (v2.0.11 (200907061347)) on Thu Jul 09 12:44:31 BST 2009)
*/
 
GROUP(libgcc.a libc.a)
 
MEMORY
{
     FLASH (rx) : ORIGIN = 0x0 LENGTH = 0x80000
     SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000
         AHBRAM0   : ORIGIN = 0x2007c000, LENGTH = 0x4000
         AHBRAM1   : ORIGIN = 0x20080000, LENGTH = 0x4000
}
 
_vRamTop = 0x10000000 + 0x8000;
 
ENTRY(ResetISR)
 
SECTIONS
{
        .text :
        {
                KEEP(*(.isr_vector))
                *(.text*)
                *(.rodata*)
 
        } > FLASH
 
 
        /* for exception handling/unwind - some Newlib functions (in common with C++ and STDC++) use this. */
 
        .ARM.extab :
        {
                *(.ARM.extab* .gnu.linkonce.armextab.*)
        } > FLASH
 
        __exidx_start = .;
        .ARM.exidx :
        {
                *(.ARM.exidx* .gnu.linkonce.armexidx.*)
        } > FLASH
        __exidx_end = .;
 
        _etext = .;
 
        .data : AT (__exidx_end)
        {
                _data = .;
                *(vtable)
                *(.data*)
                _edata = .;
        } > SRAM
 
        /* zero initialized data */
        .bss :
        {
                _bss = .;
                *(.bss*)
                *(COMMON)
                _ebss = .;
        } > SRAM
 
        /* Where we put the heap with cr_clib */
        .cr_heap :
        {
                end = .;
                _pvHeapStart = .;
        } > SRAM
 
/*
        Note: (ref: M0000066)
        Moving the stack down by 16 is to work around a GDB bug.
        This space can be reclaimed for Production Builds.
*/
        _vStackTop = _vRamTop - 16;
 
        .ETHRAM :
        {
        } > AHBRAM0
 
        .USBRAM :
        {
        } > AHBRAM1
}

Line No.	Rev	Author	Line
1	581	jeremybenn	`/*`
2			`* GENERATED FILE - DO NOT EDIT`
3			`* (C) Code Red Technologies Ltd, 2008-9`
4			`* Generated C linker script file for LPC1768`
5			`* (created from nxp_lpc13_c.ld (v2.0.11 (200907061347)) on Thu Jul 09 12:44:31 BST 2009)`
6			`*/`
7
8			`GROUP(libgcc.a libc.a)`
9
10			`MEMORY`
11			`{`
12			`FLASH (rx) : ORIGIN = 0x0 LENGTH = 0x80000`
13			`SRAM (rwx) : ORIGIN = 0x10000000, LENGTH = 0x8000`
14			`AHBRAM0 : ORIGIN = 0x2007c000, LENGTH = 0x4000`
15			`AHBRAM1 : ORIGIN = 0x20080000, LENGTH = 0x4000`
16			`}`
17
18			`_vRamTop = 0x10000000 + 0x8000;`
19
20			`ENTRY(ResetISR)`
21
22			`SECTIONS`
23			`{`
24			`.text :`
25			`{`
26			`KEEP(*(.isr_vector))`
27			`(.text)`
28			`(.rodata)`
29
30			`} > FLASH`
31
32
33			`/* for exception handling/unwind - some Newlib functions (in common with C++ and STDC++) use this. */`
34
35			`.ARM.extab :`
36			`{`
37			`(.ARM.extab .gnu.linkonce.armextab.*)`
38			`} > FLASH`
39
40			`__exidx_start = .;`
41			`.ARM.exidx :`
42			`{`
43			`(.ARM.exidx .gnu.linkonce.armexidx.*)`
44			`} > FLASH`
45			`__exidx_end = .;`
46
47			`_etext = .;`
48
49			`.data : AT (__exidx_end)`
50			`{`
51			`_data = .;`
52			`*(vtable)`
53			`(.data)`
54			`_edata = .;`
55			`} > SRAM`
56
57			`/* zero initialized data */`
58			`.bss :`
59			`{`
60			`_bss = .;`
61			`(.bss)`
62			`*(COMMON)`
63			`_ebss = .;`
64			`} > SRAM`
65
66			`/* Where we put the heap with cr_clib */`
67			`.cr_heap :`
68			`{`
69			`end = .;`
70			`_pvHeapStart = .;`
71			`} > SRAM`
72
73			`/*`
74			`Note: (ref: M0000066)`
75			`Moving the stack down by 16 is to work around a GDB bug.`
76			`This space can be reclaimed for Production Builds.`
77			`*/`
78			`_vStackTop = _vRamTop - 16;`
79
80			`.ETHRAM :`
81			`{`
82			`} > AHBRAM0`
83
84			`.USBRAM :`
85			`{`
86			`} > AHBRAM1`
87			`}`

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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LPC1768_GCC_RedSuite/] [src/] [rtosdemo_rdb1768_Debug.ld] - Blame information for rev 581