OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LPC1768_IAR/] [settings/] [RTOSDemo.dni] - Blame information for rev 581

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 581 jeremybenn 
[DebugChecksum]
2 
Checksum=-1523643934
3 
[DisAssemblyWindow]
4 
NumStates=_ 1
5 
State 1=_ 1
6 
[InstructionProfiling]
7 
Enabled=_ 0
8 
[CodeCoverage]
9 
Enabled=_ 0
10 
[Profiling]
11 
Enabled=0
12 
[StackPlugin]
13 
Enabled=1
14 
OverflowWarningsEnabled=1
15 
WarningThreshold=90
16 
SpWarningsEnabled=1
17 
WarnHow=0
18 
UseTrigger=1
19 
TriggerName=main
20 
LimitSize=0
21 
ByteLimit=50
22 
[Interrupts]
23 
Enabled=1
24 
[MemoryMap]
25 
Enabled=0
26 
Base=0
27 
UseAuto=0
28 
TypeViolation=1
29 
UnspecRange=1
30 
ActionState=1
31 
[TraceHelper]
32 
Enabled=0
33 
ShowSource=1
34 
[Log file]
35 
LoggingEnabled=_ 0
36 
LogFile=_ ""
37 
Category=_ 0
38 
[TermIOLog]
39 
LoggingEnabled=_ 0
40 
LogFile=_ ""
41 
[DriverProfiling]
42 
Enabled=0
43 
Source=2
44 
Graph=0
45 
[Disassemble mode]
46 
mode=0
47 
[Breakpoints]
48 
Count=0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.