OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_LPC1768_IAR/] [settings/] [RTOSDemo_Debug.jlink] - Blame information for rev 581

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 581 jeremybenn
[FLASH]
2
SkipProgOnCRCMatch = 1
3
VerifyDownload = 1
4
AllowCaching = 1
5
EnableFlashDL = 2
6
Override = 0
7
Device="ADUC7020X62"
8
[BREAKPOINTS]
9
ShowInfoWin = 1
10
EnableFlashBP = 2
11
BPDuringExecution = 0
12
[CPU]
13
OverrideMemMap = 0
14
AllowSimulation = 1

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.