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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_STM32F103_GCC_Rowley/] [ST Library/] [inc/] [stm32f10x_nvic.h] - Blame information for rev 582

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1 582 jeremybenn 
/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
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* File Name          : stm32f10x_nvic.h
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* Author             : MCD Application Team
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* Version            : V2.0.1
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* Date               : 06/13/2008
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* Description        : This file contains all the functions prototypes for the
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*                      NVIC firmware library.
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********************************************************************************
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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17 
/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F10x_NVIC_H
19 
#define __STM32F10x_NVIC_H
20 
 
21 
/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_map.h"
23 
 
24 
/* Exported types ------------------------------------------------------------*/
25 
/* NVIC Init Structure definition */
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typedef struct
27 
{
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  u8 NVIC_IRQChannel;
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  u8 NVIC_IRQChannelPreemptionPriority;
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  u8 NVIC_IRQChannelSubPriority;
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  FunctionalState NVIC_IRQChannelCmd;
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} NVIC_InitTypeDef;
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34 
/* Exported constants --------------------------------------------------------*/
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/* IRQ Channels --------------------------------------------------------------*/
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#define WWDG_IRQChannel              ((u8)0x00)  /* Window WatchDog Interrupt */
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#define PVD_IRQChannel               ((u8)0x01)  /* PVD through EXTI Line detection Interrupt */
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#define TAMPER_IRQChannel            ((u8)0x02)  /* Tamper Interrupt */
39 
#define RTC_IRQChannel               ((u8)0x03)  /* RTC global Interrupt */
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#define FLASH_IRQChannel             ((u8)0x04)  /* FLASH global Interrupt */
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#define RCC_IRQChannel               ((u8)0x05)  /* RCC global Interrupt */
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#define EXTI0_IRQChannel             ((u8)0x06)  /* EXTI Line0 Interrupt */
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#define EXTI1_IRQChannel             ((u8)0x07)  /* EXTI Line1 Interrupt */
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#define EXTI2_IRQChannel             ((u8)0x08)  /* EXTI Line2 Interrupt */
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#define EXTI3_IRQChannel             ((u8)0x09)  /* EXTI Line3 Interrupt */
46 
#define EXTI4_IRQChannel             ((u8)0x0A)  /* EXTI Line4 Interrupt */
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#define DMA1_Channel1_IRQChannel     ((u8)0x0B)  /* DMA1 Channel 1 global Interrupt */
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#define DMA1_Channel2_IRQChannel     ((u8)0x0C)  /* DMA1 Channel 2 global Interrupt */
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#define DMA1_Channel3_IRQChannel     ((u8)0x0D)  /* DMA1 Channel 3 global Interrupt */
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#define DMA1_Channel4_IRQChannel     ((u8)0x0E)  /* DMA1 Channel 4 global Interrupt */
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#define DMA1_Channel5_IRQChannel     ((u8)0x0F)  /* DMA1 Channel 5 global Interrupt */
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#define DMA1_Channel6_IRQChannel     ((u8)0x10)  /* DMA1 Channel 6 global Interrupt */
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#define DMA1_Channel7_IRQChannel     ((u8)0x11)  /* DMA1 Channel 7 global Interrupt */
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#define ADC1_2_IRQChannel            ((u8)0x12)  /* ADC1 et ADC2 global Interrupt */
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#define USB_HP_CAN_TX_IRQChannel     ((u8)0x13)  /* USB High Priority or CAN TX Interrupts */
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#define USB_LP_CAN_RX0_IRQChannel    ((u8)0x14)  /* USB Low Priority or CAN RX0 Interrupts */
57 
#define CAN_RX1_IRQChannel           ((u8)0x15)  /* CAN RX1 Interrupt */
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#define CAN_SCE_IRQChannel           ((u8)0x16)  /* CAN SCE Interrupt */
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#define EXTI9_5_IRQChannel           ((u8)0x17)  /* External Line[9:5] Interrupts */
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#define TIM1_BRK_IRQChannel          ((u8)0x18)  /* TIM1 Break Interrupt */
61 
#define TIM1_UP_IRQChannel           ((u8)0x19)  /* TIM1 Update Interrupt */
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#define TIM1_TRG_COM_IRQChannel      ((u8)0x1A)  /* TIM1 Trigger and Commutation Interrupt */
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#define TIM1_CC_IRQChannel           ((u8)0x1B)  /* TIM1 Capture Compare Interrupt */
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#define TIM2_IRQChannel              ((u8)0x1C)  /* TIM2 global Interrupt */
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#define TIM3_IRQChannel              ((u8)0x1D)  /* TIM3 global Interrupt */
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#define TIM4_IRQChannel              ((u8)0x1E)  /* TIM4 global Interrupt */
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#define I2C1_EV_IRQChannel           ((u8)0x1F)  /* I2C1 Event Interrupt */
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#define I2C1_ER_IRQChannel           ((u8)0x20)  /* I2C1 Error Interrupt */
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#define I2C2_EV_IRQChannel           ((u8)0x21)  /* I2C2 Event Interrupt */
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#define I2C2_ER_IRQChannel           ((u8)0x22)  /* I2C2 Error Interrupt */
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#define SPI1_IRQChannel              ((u8)0x23)  /* SPI1 global Interrupt */
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#define SPI2_IRQChannel              ((u8)0x24)  /* SPI2 global Interrupt */
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#define USART1_IRQChannel            ((u8)0x25)  /* USART1 global Interrupt */
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#define USART2_IRQChannel            ((u8)0x26)  /* USART2 global Interrupt */
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#define USART3_IRQChannel            ((u8)0x27)  /* USART3 global Interrupt */
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#define EXTI15_10_IRQChannel         ((u8)0x28)  /* External Line[15:10] Interrupts */
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#define RTCAlarm_IRQChannel          ((u8)0x29)  /* RTC Alarm through EXTI Line Interrupt */
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#define USBWakeUp_IRQChannel         ((u8)0x2A)  /* USB WakeUp from suspend through EXTI Line Interrupt */
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#define TIM8_BRK_IRQChannel          ((u8)0x2B)  /* TIM8 Break Interrupt */
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#define TIM8_UP_IRQChannel           ((u8)0x2C)  /* TIM8 Update Interrupt */
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#define TIM8_TRG_COM_IRQChannel      ((u8)0x2D)  /* TIM8 Trigger and Commutation Interrupt */
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#define TIM8_CC_IRQChannel           ((u8)0x2E)  /* TIM8 Capture Compare Interrupt */
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#define ADC3_IRQChannel              ((u8)0x2F)  /* ADC3 global Interrupt */
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#define FSMC_IRQChannel              ((u8)0x30)  /* FSMC global Interrupt */
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#define SDIO_IRQChannel              ((u8)0x31)  /* SDIO global Interrupt */
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#define TIM5_IRQChannel              ((u8)0x32)  /* TIM5 global Interrupt */
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#define SPI3_IRQChannel              ((u8)0x33)  /* SPI3 global Interrupt */
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#define UART4_IRQChannel             ((u8)0x34)  /* UART4 global Interrupt */
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#define UART5_IRQChannel             ((u8)0x35)  /* UART5 global Interrupt */
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#define TIM6_IRQChannel              ((u8)0x36)  /* TIM6 global Interrupt */
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#define TIM7_IRQChannel              ((u8)0x37)  /* TIM7 global Interrupt */
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#define DMA2_Channel1_IRQChannel     ((u8)0x38)  /* DMA2 Channel 1 global Interrupt */
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#define DMA2_Channel2_IRQChannel     ((u8)0x39)  /* DMA2 Channel 2 global Interrupt */
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#define DMA2_Channel3_IRQChannel     ((u8)0x3A)  /* DMA2 Channel 3 global Interrupt */
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#define DMA2_Channel4_5_IRQChannel   ((u8)0x3B)  /* DMA2 Channel 4 and DMA2 Channel 5 global Interrupt */
96 
 
97 
 
98 
#define IS_NVIC_IRQ_CHANNEL(CHANNEL) (((CHANNEL) == WWDG_IRQChannel) || \
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                                      ((CHANNEL) == PVD_IRQChannel) || \
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                                      ((CHANNEL) == TAMPER_IRQChannel) || \
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                                      ((CHANNEL) == RTC_IRQChannel) || \
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                                      ((CHANNEL) == FLASH_IRQChannel) || \
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                                      ((CHANNEL) == RCC_IRQChannel) || \
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                                      ((CHANNEL) == EXTI0_IRQChannel) || \
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                                      ((CHANNEL) == EXTI1_IRQChannel) || \
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                                      ((CHANNEL) == EXTI2_IRQChannel) || \
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                                      ((CHANNEL) == EXTI3_IRQChannel) || \
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                                      ((CHANNEL) == EXTI4_IRQChannel) || \
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                                      ((CHANNEL) == DMA1_Channel1_IRQChannel) || \
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                                      ((CHANNEL) == DMA1_Channel2_IRQChannel) || \
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                                      ((CHANNEL) == DMA1_Channel3_IRQChannel) || \
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                                      ((CHANNEL) == DMA1_Channel4_IRQChannel) || \
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                                      ((CHANNEL) == DMA1_Channel5_IRQChannel) || \
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                                      ((CHANNEL) == DMA1_Channel6_IRQChannel) || \
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                                      ((CHANNEL) == DMA1_Channel7_IRQChannel) || \
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                                      ((CHANNEL) == ADC1_2_IRQChannel) || \
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                                      ((CHANNEL) == USB_HP_CAN_TX_IRQChannel) || \
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                                      ((CHANNEL) == USB_LP_CAN_RX0_IRQChannel) || \
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                                      ((CHANNEL) == CAN_RX1_IRQChannel) || \
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                                      ((CHANNEL) == CAN_SCE_IRQChannel) || \
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                                      ((CHANNEL) == EXTI9_5_IRQChannel) || \
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                                      ((CHANNEL) == TIM1_BRK_IRQChannel) || \
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                                      ((CHANNEL) == TIM1_UP_IRQChannel) || \
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                                      ((CHANNEL) == TIM1_TRG_COM_IRQChannel) || \
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                                      ((CHANNEL) == TIM1_CC_IRQChannel) || \
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                                      ((CHANNEL) == TIM2_IRQChannel) || \
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                                      ((CHANNEL) == TIM3_IRQChannel) || \
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                                      ((CHANNEL) == TIM4_IRQChannel) || \
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                                      ((CHANNEL) == I2C1_EV_IRQChannel) || \
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                                      ((CHANNEL) == I2C1_ER_IRQChannel) || \
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                                      ((CHANNEL) == I2C2_EV_IRQChannel) || \
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                                      ((CHANNEL) == I2C2_ER_IRQChannel) || \
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                                      ((CHANNEL) == SPI1_IRQChannel) || \
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                                      ((CHANNEL) == SPI2_IRQChannel) || \
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                                      ((CHANNEL) == USART1_IRQChannel) || \
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                                      ((CHANNEL) == USART2_IRQChannel) || \
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                                      ((CHANNEL) == USART3_IRQChannel) || \
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                                      ((CHANNEL) == EXTI15_10_IRQChannel) || \
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                                      ((CHANNEL) == RTCAlarm_IRQChannel) || \
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                                      ((CHANNEL) == USBWakeUp_IRQChannel) || \
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                                      ((CHANNEL) == TIM8_BRK_IRQChannel) || \
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                                      ((CHANNEL) == TIM8_UP_IRQChannel) || \
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                                      ((CHANNEL) == TIM8_TRG_COM_IRQChannel) || \
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                                      ((CHANNEL) == TIM8_CC_IRQChannel) || \
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                                      ((CHANNEL) == ADC3_IRQChannel) || \
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                                      ((CHANNEL) == FSMC_IRQChannel) || \
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                                      ((CHANNEL) == SDIO_IRQChannel) || \
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                                      ((CHANNEL) == TIM5_IRQChannel) || \
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                                      ((CHANNEL) == SPI3_IRQChannel) || \
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                                      ((CHANNEL) == UART4_IRQChannel) || \
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                                      ((CHANNEL) == UART5_IRQChannel) || \
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                                      ((CHANNEL) == TIM6_IRQChannel) || \
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                                      ((CHANNEL) == TIM7_IRQChannel) || \
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                                      ((CHANNEL) == DMA2_Channel1_IRQChannel) || \
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                                      ((CHANNEL) == DMA2_Channel2_IRQChannel) || \
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                                      ((CHANNEL) == DMA2_Channel3_IRQChannel) || \
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                                      ((CHANNEL) == DMA2_Channel4_5_IRQChannel))
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160 
/* System Handlers -----------------------------------------------------------*/
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#define SystemHandler_NMI            ((u32)0x00001F) /* NMI Handler */
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#define SystemHandler_HardFault      ((u32)0x000000) /* Hard Fault Handler */
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#define SystemHandler_MemoryManage   ((u32)0x043430) /* Memory Manage Handler */
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#define SystemHandler_BusFault       ((u32)0x547931) /* Bus Fault Handler */
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#define SystemHandler_UsageFault     ((u32)0x24C232) /* Usage Fault Handler */
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#define SystemHandler_SVCall         ((u32)0x01FF40) /* SVCall Handler */
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#define SystemHandler_DebugMonitor   ((u32)0x0A0080) /* Debug Monitor Handler */
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#define SystemHandler_PSV            ((u32)0x02829C) /* PSV Handler */
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#define SystemHandler_SysTick        ((u32)0x02C39A) /* SysTick Handler */
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#define IS_CONFIG_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
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                                           ((HANDLER) == SystemHandler_BusFault) || \
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                                           ((HANDLER) == SystemHandler_UsageFault))
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#define IS_PRIORITY_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
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                                             ((HANDLER) == SystemHandler_BusFault) || \
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                                             ((HANDLER) == SystemHandler_UsageFault) || \
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                                             ((HANDLER) == SystemHandler_SVCall) || \
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                                             ((HANDLER) == SystemHandler_DebugMonitor) || \
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                                             ((HANDLER) == SystemHandler_PSV) || \
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                                             ((HANDLER) == SystemHandler_SysTick))
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#define IS_GET_PENDING_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
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                                                ((HANDLER) == SystemHandler_BusFault) || \
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                                                ((HANDLER) == SystemHandler_SVCall))
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#define IS_SET_PENDING_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_NMI) || \
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                                                ((HANDLER) == SystemHandler_PSV) || \
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                                                ((HANDLER) == SystemHandler_SysTick))
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191 
#define IS_CLEAR_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_PSV) || \
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                                          ((HANDLER) == SystemHandler_SysTick))
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#define IS_GET_ACTIVE_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
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                                               ((HANDLER) == SystemHandler_BusFault) || \
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                                               ((HANDLER) == SystemHandler_UsageFault) || \
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                                               ((HANDLER) == SystemHandler_SVCall) || \
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                                               ((HANDLER) == SystemHandler_DebugMonitor) || \
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                                               ((HANDLER) == SystemHandler_PSV) || \
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                                               ((HANDLER) == SystemHandler_SysTick))
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202 
#define IS_FAULT_SOURCE_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_HardFault) || \
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                                                 ((HANDLER) == SystemHandler_MemoryManage) || \
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                                                 ((HANDLER) == SystemHandler_BusFault) || \
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                                                 ((HANDLER) == SystemHandler_UsageFault) || \
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                                                 ((HANDLER) == SystemHandler_DebugMonitor))
207 
 
208 
#define IS_FAULT_ADDRESS_SYSTEM_HANDLER(HANDLER) (((HANDLER) == SystemHandler_MemoryManage) || \
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                                                  ((HANDLER) == SystemHandler_BusFault))
210 
 
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212 
/* Vector Table Base ---------------------------------------------------------*/
213 
#define NVIC_VectTab_RAM             ((u32)0x20000000)
214 
#define NVIC_VectTab_FLASH           ((u32)0x08000000)
215 
 
216 
#define IS_NVIC_VECTTAB(VECTTAB) (((VECTTAB) == NVIC_VectTab_RAM) || \
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                                  ((VECTTAB) == NVIC_VectTab_FLASH))
218 
 
219 
/* System Low Power ----------------------------------------------------------*/
220 
#define NVIC_LP_SEVONPEND            ((u8)0x10)
221 
#define NVIC_LP_SLEEPDEEP            ((u8)0x04)
222 
#define NVIC_LP_SLEEPONEXIT          ((u8)0x02)
223 
 
224 
#define IS_NVIC_LP(LP) (((LP) == NVIC_LP_SEVONPEND) || \
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                        ((LP) == NVIC_LP_SLEEPDEEP) || \
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                        ((LP) == NVIC_LP_SLEEPONEXIT))
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/* Preemption Priority Group -------------------------------------------------*/
229 
#define NVIC_PriorityGroup_0         ((u32)0x700) /* 0 bits for pre-emption priority
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                                                     4 bits for subpriority */
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#define NVIC_PriorityGroup_1         ((u32)0x600) /* 1 bits for pre-emption priority
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                                                     3 bits for subpriority */
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#define NVIC_PriorityGroup_2         ((u32)0x500) /* 2 bits for pre-emption priority
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                                                     2 bits for subpriority */
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#define NVIC_PriorityGroup_3         ((u32)0x400) /* 3 bits for pre-emption priority
236 
                                                     1 bits for subpriority */
237 
#define NVIC_PriorityGroup_4         ((u32)0x300) /* 4 bits for pre-emption priority
238 
 
239 
 
240 
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PriorityGroup_0) || \
241 
                                       ((GROUP) == NVIC_PriorityGroup_1) || \
242 
                                       ((GROUP) == NVIC_PriorityGroup_2) || \
243 
                                       ((GROUP) == NVIC_PriorityGroup_3) || \
244 
                                       ((GROUP) == NVIC_PriorityGroup_4))
245 
 
246 
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10)
247 
#define IS_NVIC_SUB_PRIORITY(PRIORITY)  ((PRIORITY) < 0x10)
248 
#define IS_NVIC_OFFSET(OFFSET)  ((OFFSET) < 0x0007FFFF)
249 
#define IS_NVIC_BASE_PRI(PRI)   ((PRI) < 0x10)
250 
 
251 
/* Exported macro ------------------------------------------------------------*/
252 
/* Exported functions ------------------------------------------------------- */
253 
void NVIC_DeInit(void);
254 
void NVIC_SCBDeInit(void);
255 
void NVIC_PriorityGroupConfig(u32 NVIC_PriorityGroup);
256 
void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct);
257 
void NVIC_StructInit(NVIC_InitTypeDef* NVIC_InitStruct);
258 
void NVIC_SETPRIMASK(void);
259 
void NVIC_RESETPRIMASK(void);
260 
void NVIC_SETFAULTMASK(void);
261 
void NVIC_RESETFAULTMASK(void);
262 
void NVIC_BASEPRICONFIG(u32 NewPriority);
263 
u32 NVIC_GetBASEPRI(void);
264 
u16 NVIC_GetCurrentPendingIRQChannel(void);
265 
ITStatus NVIC_GetIRQChannelPendingBitStatus(u8 NVIC_IRQChannel);
266 
void NVIC_SetIRQChannelPendingBit(u8 NVIC_IRQChannel);
267 
void NVIC_ClearIRQChannelPendingBit(u8 NVIC_IRQChannel);
268 
u16 NVIC_GetCurrentActiveHandler(void);
269 
ITStatus NVIC_GetIRQChannelActiveBitStatus(u8 NVIC_IRQChannel);
270 
u32 NVIC_GetCPUID(void);
271 
void NVIC_SetVectorTable(u32 NVIC_VectTab, u32 Offset);
272 
void NVIC_GenerateSystemReset(void);
273 
void NVIC_GenerateCoreReset(void);
274 
void NVIC_SystemLPConfig(u8 LowPowerMode, FunctionalState NewState);
275 
void NVIC_SystemHandlerConfig(u32 SystemHandler, FunctionalState NewState);
276 
void NVIC_SystemHandlerPriorityConfig(u32 SystemHandler, u8 SystemHandlerPreemptionPriority,
277 
                                      u8 SystemHandlerSubPriority);
278 
ITStatus NVIC_GetSystemHandlerPendingBitStatus(u32 SystemHandler);
279 
void NVIC_SetSystemHandlerPendingBit(u32 SystemHandler);
280 
void NVIC_ClearSystemHandlerPendingBit(u32 SystemHandler);
281 
ITStatus NVIC_GetSystemHandlerActiveBitStatus(u32 SystemHandler);
282 
u32 NVIC_GetFaultHandlerSources(u32 SystemHandler);
283 
u32 NVIC_GetFaultAddress(u32 SystemHandler);
284 
 
285 
#endif /* __STM32F10x_NVIC_H */
286 
 
287 
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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