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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_STM32F103_GCC_Rowley/] [ST Library/] [inc/] [stm32f10x_spi.h] - Blame information for rev 582

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1 582 jeremybenn
/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
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* File Name          : stm32f10x_spi.h
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* Author             : MCD Application Team
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* Version            : V2.0.1
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* Date               : 06/13/2008
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* Description        : This file contains all the functions prototypes for the
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*                      SPI firmware library.
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********************************************************************************
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F10x_SPI_H
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#define __STM32F10x_SPI_H
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_map.h"
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/* Exported types ------------------------------------------------------------*/
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/* SPI Init structure definition */
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typedef struct
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{
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  u16 SPI_Direction;
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  u16 SPI_Mode;
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  u16 SPI_DataSize;
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  u16 SPI_CPOL;
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  u16 SPI_CPHA;
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  u16 SPI_NSS;
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  u16 SPI_BaudRatePrescaler;
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  u16 SPI_FirstBit;
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  u16 SPI_CRCPolynomial;
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}SPI_InitTypeDef;
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/* I2S Init structure definition */
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typedef struct
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{
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  u16 I2S_Mode;
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  u16 I2S_Standard;
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  u16 I2S_DataFormat;
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  u16 I2S_MCLKOutput;
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  u16 I2S_AudioFreq;
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  u16 I2S_CPOL;
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}I2S_InitTypeDef;
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/* Exported constants --------------------------------------------------------*/
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#define IS_SPI_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == SPI1_BASE) || \
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                                   ((*(u32*)&(PERIPH)) == SPI2_BASE) || \
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                                   ((*(u32*)&(PERIPH)) == SPI3_BASE))
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#define IS_SPI_23_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == SPI2_BASE) || \
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                                  ((*(u32*)&(PERIPH)) == SPI3_BASE))
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/* SPI data direction mode */
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#define SPI_Direction_2Lines_FullDuplex ((u16)0x0000)
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#define SPI_Direction_2Lines_RxOnly     ((u16)0x0400)
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#define SPI_Direction_1Line_Rx          ((u16)0x8000)
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#define SPI_Direction_1Line_Tx          ((u16)0xC000)
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#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
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                                     ((MODE) == SPI_Direction_2Lines_RxOnly) || \
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                                     ((MODE) == SPI_Direction_1Line_Rx) || \
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                                     ((MODE) == SPI_Direction_1Line_Tx))
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/* SPI master/slave mode */
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#define SPI_Mode_Master                 ((u16)0x0104)
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#define SPI_Mode_Slave                  ((u16)0x0000)
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#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
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                           ((MODE) == SPI_Mode_Slave))
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/* SPI data size */
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#define SPI_DataSize_16b                ((u16)0x0800)
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#define SPI_DataSize_8b                 ((u16)0x0000)
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#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
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                                   ((DATASIZE) == SPI_DataSize_8b))
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/* SPI Clock Polarity */
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#define SPI_CPOL_Low                    ((u16)0x0000)
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#define SPI_CPOL_High                   ((u16)0x0002)
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#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
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                           ((CPOL) == SPI_CPOL_High))
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/* SPI Clock Phase */
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#define SPI_CPHA_1Edge                  ((u16)0x0000)
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#define SPI_CPHA_2Edge                  ((u16)0x0001)
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#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
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                           ((CPHA) == SPI_CPHA_2Edge))
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/* SPI Slave Select management */
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#define SPI_NSS_Soft                    ((u16)0x0200)
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#define SPI_NSS_Hard                    ((u16)0x0000)
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#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
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                         ((NSS) == SPI_NSS_Hard))
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/* SPI BaudRate Prescaler  */
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#define SPI_BaudRatePrescaler_2         ((u16)0x0000)
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#define SPI_BaudRatePrescaler_4         ((u16)0x0008)
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#define SPI_BaudRatePrescaler_8         ((u16)0x0010)
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#define SPI_BaudRatePrescaler_16        ((u16)0x0018)
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#define SPI_BaudRatePrescaler_32        ((u16)0x0020)
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#define SPI_BaudRatePrescaler_64        ((u16)0x0028)
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#define SPI_BaudRatePrescaler_128       ((u16)0x0030)
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#define SPI_BaudRatePrescaler_256       ((u16)0x0038)
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#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
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                                              ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
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                                              ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
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                                              ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
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                                              ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
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                                              ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
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                                              ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
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                                              ((PRESCALER) == SPI_BaudRatePrescaler_256))
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/* SPI MSB/LSB transmission */
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#define SPI_FirstBit_MSB                ((u16)0x0000)
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#define SPI_FirstBit_LSB                ((u16)0x0080)
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#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
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                               ((BIT) == SPI_FirstBit_LSB))
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/* I2S Mode */
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#define I2S_Mode_SlaveTx                ((u16)0x0000)
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#define I2S_Mode_SlaveRx                ((u16)0x0100)
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#define I2S_Mode_MasterTx               ((u16)0x0200)
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#define I2S_Mode_MasterRx               ((u16)0x0300)
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#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
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                           ((MODE) == I2S_Mode_SlaveRx) || \
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                           ((MODE) == I2S_Mode_MasterTx) || \
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                           ((MODE) == I2S_Mode_MasterRx) )
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/* I2S Standard */
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#define I2S_Standard_Phillips           ((u16)0x0000)
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#define I2S_Standard_MSB                ((u16)0x0010)
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#define I2S_Standard_LSB                ((u16)0x0020)
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#define I2S_Standard_PCMShort           ((u16)0x0030)
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#define I2S_Standard_PCMLong            ((u16)0x00B0)
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#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
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                                   ((STANDARD) == I2S_Standard_MSB) || \
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                                   ((STANDARD) == I2S_Standard_LSB) || \
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                                   ((STANDARD) == I2S_Standard_PCMShort) || \
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                                   ((STANDARD) == I2S_Standard_PCMLong))
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/* I2S Data Format */
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#define I2S_DataFormat_16b              ((u16)0x0000)
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#define I2S_DataFormat_16bextended      ((u16)0x0001)
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#define I2S_DataFormat_24b              ((u16)0x0003)
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#define I2S_DataFormat_32b              ((u16)0x0005)
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#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
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                                    ((FORMAT) == I2S_DataFormat_16bextended) || \
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                                    ((FORMAT) == I2S_DataFormat_24b) || \
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                                    ((FORMAT) == I2S_DataFormat_32b))
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/* I2S MCLK Output */
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#define I2S_MCLKOutput_Enable           ((u16)0x0200)
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#define I2S_MCLKOutput_Disable          ((u16)0x0000)
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#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
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                                    ((OUTPUT) == I2S_MCLKOutput_Disable))
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/* I2S Audio Frequency */
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#define I2S_AudioFreq_48k                ((u16)48000)
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#define I2S_AudioFreq_44k                ((u16)44100)
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#define I2S_AudioFreq_22k                ((u16)22050)
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#define I2S_AudioFreq_16k                ((u16)16000)
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#define I2S_AudioFreq_8k                 ((u16)8000)
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#define I2S_AudioFreq_Default            ((u16)2)
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#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_48k) || \
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                                 ((FREQ) == I2S_AudioFreq_44k) || \
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                                 ((FREQ) == I2S_AudioFreq_22k) || \
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                                 ((FREQ) == I2S_AudioFreq_16k) || \
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                                 ((FREQ) == I2S_AudioFreq_8k)  || \
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                                 ((FREQ) == I2S_AudioFreq_Default))
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/* I2S Clock Polarity */
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#define I2S_CPOL_Low                    ((u16)0x0000)
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#define I2S_CPOL_High                   ((u16)0x0008)
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#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
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                           ((CPOL) == I2S_CPOL_High))
194
 
195
/* SPI_I2S DMA transfer requests */
196
#define SPI_I2S_DMAReq_Tx               ((u16)0x0002)
197
#define SPI_I2S_DMAReq_Rx               ((u16)0x0001)
198
 
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#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (u16)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
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/* SPI NSS internal software mangement */
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#define SPI_NSSInternalSoft_Set         ((u16)0x0100)
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#define SPI_NSSInternalSoft_Reset       ((u16)0xFEFF)
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#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
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                                       ((INTERNAL) == SPI_NSSInternalSoft_Reset))
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208
/* SPI CRC Transmit/Receive */
209
#define SPI_CRC_Tx                      ((u8)0x00)
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#define SPI_CRC_Rx                      ((u8)0x01)
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212
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
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/* SPI direction transmit/receive */
215
#define SPI_Direction_Rx                ((u16)0xBFFF)
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#define SPI_Direction_Tx                ((u16)0x4000)
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#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
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                                     ((DIRECTION) == SPI_Direction_Tx))
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/* SPI_I2S interrupts definition */
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#define SPI_I2S_IT_TXE                  ((u8)0x71)
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#define SPI_I2S_IT_RXNE                 ((u8)0x60)
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#define SPI_I2S_IT_ERR                  ((u8)0x50)
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#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
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                                 ((IT) == SPI_I2S_IT_RXNE) || \
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                                 ((IT) == SPI_I2S_IT_ERR))
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#define SPI_I2S_IT_OVR                  ((u8)0x56)
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#define SPI_IT_MODF                     ((u8)0x55)
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#define SPI_IT_CRCERR                   ((u8)0x54)
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#define I2S_IT_UDR                      ((u8)0x53)
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#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_I2S_IT_OVR) || \
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                                 ((IT) == SPI_IT_MODF) || \
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                                 ((IT) == SPI_IT_CRCERR) || \
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                                 ((IT) == I2S_IT_UDR))
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#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
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                               ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
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                               ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
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/* SPI_I2S flags definition */
245
#define SPI_I2S_FLAG_RXNE               ((u16)0x0001)
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#define SPI_I2S_FLAG_TXE                ((u16)0x0002)
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#define I2S_FLAG_CHSIDE                 ((u16)0x0004)
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#define I2S_FLAG_UDR                    ((u16)0x0008)
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#define SPI_FLAG_CRCERR                 ((u16)0x0010)
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#define SPI_FLAG_MODF                   ((u16)0x0020)
251
#define SPI_I2S_FLAG_OVR                ((u16)0x0040)
252
#define SPI_I2S_FLAG_BSY                ((u16)0x0080)
253
 
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#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_OVR) || ((FLAG) == SPI_FLAG_MODF) || \
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                                     ((FLAG) == SPI_FLAG_CRCERR) || ((FLAG) == I2S_FLAG_UDR))
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#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
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                                   ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
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                                   ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
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                                   ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
260
 
261
/* SPI CRC polynomial --------------------------------------------------------*/
262
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
263
 
264
/* Exported macro ------------------------------------------------------------*/
265
/* Exported functions ------------------------------------------------------- */
266
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
267
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
268
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
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void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
270
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
271
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
273
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, u8 SPI_I2S_IT, FunctionalState NewState);
274
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, u16 SPI_I2S_DMAReq, FunctionalState NewState);
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void SPI_I2S_SendData(SPI_TypeDef* SPIx, u16 Data);
276
u16 SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
277
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, u16 SPI_NSSInternalSoft);
278
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
279
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, u16 SPI_DataSize);
280
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
281
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
282
u16 SPI_GetCRC(SPI_TypeDef* SPIx, u8 SPI_CRC);
283
u16 SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
284
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, u16 SPI_Direction);
285
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG);
286
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG);
287
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, u8 SPI_I2S_IT);
288
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, u8 SPI_I2S_IT);
289
 
290
#endif /*__STM32F10x_SPI_H */
291
 
292
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/

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