1 |
582 |
jeremybenn |
/******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
|
2 |
|
|
* File Name : stm32f10x_spi.h
|
3 |
|
|
* Author : MCD Application Team
|
4 |
|
|
* Version : V2.0.1
|
5 |
|
|
* Date : 06/13/2008
|
6 |
|
|
* Description : This file contains all the functions prototypes for the
|
7 |
|
|
* SPI firmware library.
|
8 |
|
|
********************************************************************************
|
9 |
|
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
10 |
|
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
|
11 |
|
|
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
|
12 |
|
|
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
|
13 |
|
|
* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
|
14 |
|
|
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
15 |
|
|
*******************************************************************************/
|
16 |
|
|
|
17 |
|
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
18 |
|
|
#ifndef __STM32F10x_SPI_H
|
19 |
|
|
#define __STM32F10x_SPI_H
|
20 |
|
|
|
21 |
|
|
/* Includes ------------------------------------------------------------------*/
|
22 |
|
|
#include "stm32f10x_map.h"
|
23 |
|
|
|
24 |
|
|
/* Exported types ------------------------------------------------------------*/
|
25 |
|
|
/* SPI Init structure definition */
|
26 |
|
|
typedef struct
|
27 |
|
|
{
|
28 |
|
|
u16 SPI_Direction;
|
29 |
|
|
u16 SPI_Mode;
|
30 |
|
|
u16 SPI_DataSize;
|
31 |
|
|
u16 SPI_CPOL;
|
32 |
|
|
u16 SPI_CPHA;
|
33 |
|
|
u16 SPI_NSS;
|
34 |
|
|
u16 SPI_BaudRatePrescaler;
|
35 |
|
|
u16 SPI_FirstBit;
|
36 |
|
|
u16 SPI_CRCPolynomial;
|
37 |
|
|
}SPI_InitTypeDef;
|
38 |
|
|
|
39 |
|
|
/* I2S Init structure definition */
|
40 |
|
|
typedef struct
|
41 |
|
|
{
|
42 |
|
|
u16 I2S_Mode;
|
43 |
|
|
u16 I2S_Standard;
|
44 |
|
|
u16 I2S_DataFormat;
|
45 |
|
|
u16 I2S_MCLKOutput;
|
46 |
|
|
u16 I2S_AudioFreq;
|
47 |
|
|
u16 I2S_CPOL;
|
48 |
|
|
}I2S_InitTypeDef;
|
49 |
|
|
|
50 |
|
|
/* Exported constants --------------------------------------------------------*/
|
51 |
|
|
|
52 |
|
|
#define IS_SPI_ALL_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == SPI1_BASE) || \
|
53 |
|
|
((*(u32*)&(PERIPH)) == SPI2_BASE) || \
|
54 |
|
|
((*(u32*)&(PERIPH)) == SPI3_BASE))
|
55 |
|
|
|
56 |
|
|
#define IS_SPI_23_PERIPH(PERIPH) (((*(u32*)&(PERIPH)) == SPI2_BASE) || \
|
57 |
|
|
((*(u32*)&(PERIPH)) == SPI3_BASE))
|
58 |
|
|
|
59 |
|
|
/* SPI data direction mode */
|
60 |
|
|
#define SPI_Direction_2Lines_FullDuplex ((u16)0x0000)
|
61 |
|
|
#define SPI_Direction_2Lines_RxOnly ((u16)0x0400)
|
62 |
|
|
#define SPI_Direction_1Line_Rx ((u16)0x8000)
|
63 |
|
|
#define SPI_Direction_1Line_Tx ((u16)0xC000)
|
64 |
|
|
|
65 |
|
|
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
|
66 |
|
|
((MODE) == SPI_Direction_2Lines_RxOnly) || \
|
67 |
|
|
((MODE) == SPI_Direction_1Line_Rx) || \
|
68 |
|
|
((MODE) == SPI_Direction_1Line_Tx))
|
69 |
|
|
|
70 |
|
|
/* SPI master/slave mode */
|
71 |
|
|
#define SPI_Mode_Master ((u16)0x0104)
|
72 |
|
|
#define SPI_Mode_Slave ((u16)0x0000)
|
73 |
|
|
|
74 |
|
|
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
|
75 |
|
|
((MODE) == SPI_Mode_Slave))
|
76 |
|
|
|
77 |
|
|
/* SPI data size */
|
78 |
|
|
#define SPI_DataSize_16b ((u16)0x0800)
|
79 |
|
|
#define SPI_DataSize_8b ((u16)0x0000)
|
80 |
|
|
|
81 |
|
|
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
|
82 |
|
|
((DATASIZE) == SPI_DataSize_8b))
|
83 |
|
|
|
84 |
|
|
/* SPI Clock Polarity */
|
85 |
|
|
#define SPI_CPOL_Low ((u16)0x0000)
|
86 |
|
|
#define SPI_CPOL_High ((u16)0x0002)
|
87 |
|
|
|
88 |
|
|
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
|
89 |
|
|
((CPOL) == SPI_CPOL_High))
|
90 |
|
|
|
91 |
|
|
/* SPI Clock Phase */
|
92 |
|
|
#define SPI_CPHA_1Edge ((u16)0x0000)
|
93 |
|
|
#define SPI_CPHA_2Edge ((u16)0x0001)
|
94 |
|
|
|
95 |
|
|
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
|
96 |
|
|
((CPHA) == SPI_CPHA_2Edge))
|
97 |
|
|
|
98 |
|
|
/* SPI Slave Select management */
|
99 |
|
|
#define SPI_NSS_Soft ((u16)0x0200)
|
100 |
|
|
#define SPI_NSS_Hard ((u16)0x0000)
|
101 |
|
|
|
102 |
|
|
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
|
103 |
|
|
((NSS) == SPI_NSS_Hard))
|
104 |
|
|
|
105 |
|
|
/* SPI BaudRate Prescaler */
|
106 |
|
|
#define SPI_BaudRatePrescaler_2 ((u16)0x0000)
|
107 |
|
|
#define SPI_BaudRatePrescaler_4 ((u16)0x0008)
|
108 |
|
|
#define SPI_BaudRatePrescaler_8 ((u16)0x0010)
|
109 |
|
|
#define SPI_BaudRatePrescaler_16 ((u16)0x0018)
|
110 |
|
|
#define SPI_BaudRatePrescaler_32 ((u16)0x0020)
|
111 |
|
|
#define SPI_BaudRatePrescaler_64 ((u16)0x0028)
|
112 |
|
|
#define SPI_BaudRatePrescaler_128 ((u16)0x0030)
|
113 |
|
|
#define SPI_BaudRatePrescaler_256 ((u16)0x0038)
|
114 |
|
|
|
115 |
|
|
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
|
116 |
|
|
((PRESCALER) == SPI_BaudRatePrescaler_4) || \
|
117 |
|
|
((PRESCALER) == SPI_BaudRatePrescaler_8) || \
|
118 |
|
|
((PRESCALER) == SPI_BaudRatePrescaler_16) || \
|
119 |
|
|
((PRESCALER) == SPI_BaudRatePrescaler_32) || \
|
120 |
|
|
((PRESCALER) == SPI_BaudRatePrescaler_64) || \
|
121 |
|
|
((PRESCALER) == SPI_BaudRatePrescaler_128) || \
|
122 |
|
|
((PRESCALER) == SPI_BaudRatePrescaler_256))
|
123 |
|
|
|
124 |
|
|
/* SPI MSB/LSB transmission */
|
125 |
|
|
#define SPI_FirstBit_MSB ((u16)0x0000)
|
126 |
|
|
#define SPI_FirstBit_LSB ((u16)0x0080)
|
127 |
|
|
|
128 |
|
|
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
|
129 |
|
|
((BIT) == SPI_FirstBit_LSB))
|
130 |
|
|
|
131 |
|
|
/* I2S Mode */
|
132 |
|
|
#define I2S_Mode_SlaveTx ((u16)0x0000)
|
133 |
|
|
#define I2S_Mode_SlaveRx ((u16)0x0100)
|
134 |
|
|
#define I2S_Mode_MasterTx ((u16)0x0200)
|
135 |
|
|
#define I2S_Mode_MasterRx ((u16)0x0300)
|
136 |
|
|
|
137 |
|
|
#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
|
138 |
|
|
((MODE) == I2S_Mode_SlaveRx) || \
|
139 |
|
|
((MODE) == I2S_Mode_MasterTx) || \
|
140 |
|
|
((MODE) == I2S_Mode_MasterRx) )
|
141 |
|
|
|
142 |
|
|
/* I2S Standard */
|
143 |
|
|
#define I2S_Standard_Phillips ((u16)0x0000)
|
144 |
|
|
#define I2S_Standard_MSB ((u16)0x0010)
|
145 |
|
|
#define I2S_Standard_LSB ((u16)0x0020)
|
146 |
|
|
#define I2S_Standard_PCMShort ((u16)0x0030)
|
147 |
|
|
#define I2S_Standard_PCMLong ((u16)0x00B0)
|
148 |
|
|
|
149 |
|
|
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
|
150 |
|
|
((STANDARD) == I2S_Standard_MSB) || \
|
151 |
|
|
((STANDARD) == I2S_Standard_LSB) || \
|
152 |
|
|
((STANDARD) == I2S_Standard_PCMShort) || \
|
153 |
|
|
((STANDARD) == I2S_Standard_PCMLong))
|
154 |
|
|
|
155 |
|
|
/* I2S Data Format */
|
156 |
|
|
#define I2S_DataFormat_16b ((u16)0x0000)
|
157 |
|
|
#define I2S_DataFormat_16bextended ((u16)0x0001)
|
158 |
|
|
#define I2S_DataFormat_24b ((u16)0x0003)
|
159 |
|
|
#define I2S_DataFormat_32b ((u16)0x0005)
|
160 |
|
|
|
161 |
|
|
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
|
162 |
|
|
((FORMAT) == I2S_DataFormat_16bextended) || \
|
163 |
|
|
((FORMAT) == I2S_DataFormat_24b) || \
|
164 |
|
|
((FORMAT) == I2S_DataFormat_32b))
|
165 |
|
|
|
166 |
|
|
/* I2S MCLK Output */
|
167 |
|
|
#define I2S_MCLKOutput_Enable ((u16)0x0200)
|
168 |
|
|
#define I2S_MCLKOutput_Disable ((u16)0x0000)
|
169 |
|
|
|
170 |
|
|
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
|
171 |
|
|
((OUTPUT) == I2S_MCLKOutput_Disable))
|
172 |
|
|
|
173 |
|
|
/* I2S Audio Frequency */
|
174 |
|
|
#define I2S_AudioFreq_48k ((u16)48000)
|
175 |
|
|
#define I2S_AudioFreq_44k ((u16)44100)
|
176 |
|
|
#define I2S_AudioFreq_22k ((u16)22050)
|
177 |
|
|
#define I2S_AudioFreq_16k ((u16)16000)
|
178 |
|
|
#define I2S_AudioFreq_8k ((u16)8000)
|
179 |
|
|
#define I2S_AudioFreq_Default ((u16)2)
|
180 |
|
|
|
181 |
|
|
#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_48k) || \
|
182 |
|
|
((FREQ) == I2S_AudioFreq_44k) || \
|
183 |
|
|
((FREQ) == I2S_AudioFreq_22k) || \
|
184 |
|
|
((FREQ) == I2S_AudioFreq_16k) || \
|
185 |
|
|
((FREQ) == I2S_AudioFreq_8k) || \
|
186 |
|
|
((FREQ) == I2S_AudioFreq_Default))
|
187 |
|
|
|
188 |
|
|
/* I2S Clock Polarity */
|
189 |
|
|
#define I2S_CPOL_Low ((u16)0x0000)
|
190 |
|
|
#define I2S_CPOL_High ((u16)0x0008)
|
191 |
|
|
|
192 |
|
|
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
|
193 |
|
|
((CPOL) == I2S_CPOL_High))
|
194 |
|
|
|
195 |
|
|
/* SPI_I2S DMA transfer requests */
|
196 |
|
|
#define SPI_I2S_DMAReq_Tx ((u16)0x0002)
|
197 |
|
|
#define SPI_I2S_DMAReq_Rx ((u16)0x0001)
|
198 |
|
|
|
199 |
|
|
#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (u16)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
|
200 |
|
|
|
201 |
|
|
/* SPI NSS internal software mangement */
|
202 |
|
|
#define SPI_NSSInternalSoft_Set ((u16)0x0100)
|
203 |
|
|
#define SPI_NSSInternalSoft_Reset ((u16)0xFEFF)
|
204 |
|
|
|
205 |
|
|
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
|
206 |
|
|
((INTERNAL) == SPI_NSSInternalSoft_Reset))
|
207 |
|
|
|
208 |
|
|
/* SPI CRC Transmit/Receive */
|
209 |
|
|
#define SPI_CRC_Tx ((u8)0x00)
|
210 |
|
|
#define SPI_CRC_Rx ((u8)0x01)
|
211 |
|
|
|
212 |
|
|
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
|
213 |
|
|
|
214 |
|
|
/* SPI direction transmit/receive */
|
215 |
|
|
#define SPI_Direction_Rx ((u16)0xBFFF)
|
216 |
|
|
#define SPI_Direction_Tx ((u16)0x4000)
|
217 |
|
|
|
218 |
|
|
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
|
219 |
|
|
((DIRECTION) == SPI_Direction_Tx))
|
220 |
|
|
|
221 |
|
|
/* SPI_I2S interrupts definition */
|
222 |
|
|
#define SPI_I2S_IT_TXE ((u8)0x71)
|
223 |
|
|
#define SPI_I2S_IT_RXNE ((u8)0x60)
|
224 |
|
|
#define SPI_I2S_IT_ERR ((u8)0x50)
|
225 |
|
|
|
226 |
|
|
#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
|
227 |
|
|
((IT) == SPI_I2S_IT_RXNE) || \
|
228 |
|
|
((IT) == SPI_I2S_IT_ERR))
|
229 |
|
|
|
230 |
|
|
#define SPI_I2S_IT_OVR ((u8)0x56)
|
231 |
|
|
#define SPI_IT_MODF ((u8)0x55)
|
232 |
|
|
#define SPI_IT_CRCERR ((u8)0x54)
|
233 |
|
|
#define I2S_IT_UDR ((u8)0x53)
|
234 |
|
|
|
235 |
|
|
#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_I2S_IT_OVR) || \
|
236 |
|
|
((IT) == SPI_IT_MODF) || \
|
237 |
|
|
((IT) == SPI_IT_CRCERR) || \
|
238 |
|
|
((IT) == I2S_IT_UDR))
|
239 |
|
|
|
240 |
|
|
#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
|
241 |
|
|
((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
|
242 |
|
|
((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
|
243 |
|
|
|
244 |
|
|
/* SPI_I2S flags definition */
|
245 |
|
|
#define SPI_I2S_FLAG_RXNE ((u16)0x0001)
|
246 |
|
|
#define SPI_I2S_FLAG_TXE ((u16)0x0002)
|
247 |
|
|
#define I2S_FLAG_CHSIDE ((u16)0x0004)
|
248 |
|
|
#define I2S_FLAG_UDR ((u16)0x0008)
|
249 |
|
|
#define SPI_FLAG_CRCERR ((u16)0x0010)
|
250 |
|
|
#define SPI_FLAG_MODF ((u16)0x0020)
|
251 |
|
|
#define SPI_I2S_FLAG_OVR ((u16)0x0040)
|
252 |
|
|
#define SPI_I2S_FLAG_BSY ((u16)0x0080)
|
253 |
|
|
|
254 |
|
|
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_OVR) || ((FLAG) == SPI_FLAG_MODF) || \
|
255 |
|
|
((FLAG) == SPI_FLAG_CRCERR) || ((FLAG) == I2S_FLAG_UDR))
|
256 |
|
|
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
|
257 |
|
|
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
|
258 |
|
|
((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
|
259 |
|
|
((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
|
260 |
|
|
|
261 |
|
|
/* SPI CRC polynomial --------------------------------------------------------*/
|
262 |
|
|
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
|
263 |
|
|
|
264 |
|
|
/* Exported macro ------------------------------------------------------------*/
|
265 |
|
|
/* Exported functions ------------------------------------------------------- */
|
266 |
|
|
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
|
267 |
|
|
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
|
268 |
|
|
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
|
269 |
|
|
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
|
270 |
|
|
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
|
271 |
|
|
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
272 |
|
|
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
273 |
|
|
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, u8 SPI_I2S_IT, FunctionalState NewState);
|
274 |
|
|
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, u16 SPI_I2S_DMAReq, FunctionalState NewState);
|
275 |
|
|
void SPI_I2S_SendData(SPI_TypeDef* SPIx, u16 Data);
|
276 |
|
|
u16 SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
|
277 |
|
|
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, u16 SPI_NSSInternalSoft);
|
278 |
|
|
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
279 |
|
|
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, u16 SPI_DataSize);
|
280 |
|
|
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
|
281 |
|
|
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
|
282 |
|
|
u16 SPI_GetCRC(SPI_TypeDef* SPIx, u8 SPI_CRC);
|
283 |
|
|
u16 SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
|
284 |
|
|
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, u16 SPI_Direction);
|
285 |
|
|
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG);
|
286 |
|
|
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, u16 SPI_I2S_FLAG);
|
287 |
|
|
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, u8 SPI_I2S_IT);
|
288 |
|
|
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, u8 SPI_I2S_IT);
|
289 |
|
|
|
290 |
|
|
#endif /*__STM32F10x_SPI_H */
|
291 |
|
|
|
292 |
|
|
/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
|