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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_STM32F103_IAR/] [STM32F10xFWLib/] [inc/] [stm32f10x_tim.h] - Blame information for rev 591

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1 582 jeremybenn 
/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2 
* File Name          : stm32f10x_tim.h
3 
* Author             : MCD Application Team
4 
* Date First Issued  : 09/29/2006
5 
* Description        : This file contains all the functions prototypes for the
6 
*                      TIM firmware library.
7 
********************************************************************************
8 
* History:
9 
* 04/02/2007: V0.2
10 
* 02/05/2007: V0.1
11 
* 09/29/2006: V0.01
12 
********************************************************************************
13 
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
15 
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
16 
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
17 
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
18 
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 
*******************************************************************************/
20 
 
21 
/* Define to prevent recursive inclusion -------------------------------------*/
22 
#ifndef __STM32F10x_TIM_H
23 
#define __STM32F10x_TIM_H
24 
 
25 
/* Includes ------------------------------------------------------------------*/
26 
#include "stm32f10x_map.h"
27 
 
28 
/* Exported types ------------------------------------------------------------*/
29 
 
30 
/* TIM Base Init structure definition */
31 
typedef struct
32 
{
33 
  u16 TIM_Period;          /* Period value */
34 
  u16 TIM_Prescaler;       /* Prescaler value */
35 
  u16 TIM_ClockDivision;   /* Timer clock division */
36 
  u16 TIM_CounterMode;     /* Timer Counter mode */
37 
} TIM_TimeBaseInitTypeDef;
38 
 
39 
/* TIM Output Compare Init structure definition */
40 
typedef struct
41 
{
42 
  u16 TIM_OCMode;          /* Timer Output Compare Mode */
43 
  u16 TIM_Channel;          /* Timer Channel */
44 
  u16 TIM_Pulse;           /* PWM or OC Channel pulse length */
45 
  u16 TIM_OCPolarity;       /* PWM, OCM or OPM Channel polarity */
46 
} TIM_OCInitTypeDef;
47 
 
48 
/* TIM Input Capture Init structure definition */
49 
typedef struct
50 
{
51 
  u16 TIM_ICMode;            /* Timer Input Capture Mode */
52 
  u16 TIM_Channel;           /* Timer Channel */
53 
  u16 TIM_ICPolarity;        /* Input Capture polarity */
54 
  u16 TIM_ICSelection;       /* Input Capture selection */
55 
  u16 TIM_ICPrescaler;       /* Input Capture prescaler */
56 
  u8 TIM_ICFilter;          /* Input Capture filter */
57 
} TIM_ICInitTypeDef;
58 
 
59 
/* Exported constants -------------------------------------------------------*/
60 
/* TIM Ouput Compare modes --------------------------------------------------*/
61 
#define TIM_OCMode_Timing                 ((u16)0x0000)
62 
#define TIM_OCMode_Active                 ((u16)0x0010)
63 
#define TIM_OCMode_Inactive               ((u16)0x0020)
64 
#define TIM_OCMode_Toggle                 ((u16)0x0030)
65 
#define TIM_OCMode_PWM1                   ((u16)0x0060)
66 
#define TIM_OCMode_PWM2                   ((u16)0x0070)
67 
 
68 
#define IS_TIM_OC_MODE(MODE) ((MODE == TIM_OCMode_Timing) || \
69 
                              (MODE == TIM_OCMode_Active) || \
70 
                              (MODE == TIM_OCMode_Inactive) || \
71 
                              (MODE == TIM_OCMode_Toggle)|| \
72 
                              (MODE == TIM_OCMode_PWM1) || \
73 
                              (MODE == TIM_OCMode_PWM2))
74 
 
75 
/* TIM Input Capture modes --------------------------------------------------*/
76 
#define TIM_ICMode_ICAP                   ((u16)0x0007)
77 
#define TIM_ICMode_PWMI                   ((u16)0x0006)
78 
 
79 
#define IS_TIM_IC_MODE(MODE) ((MODE == TIM_ICMode_ICAP) || \
80 
                              (MODE == TIM_ICMode_PWMI))
81 
 
82 
/* TIM One Pulse Mode -------------------------------------------------------*/
83 
#define TIM_OPMode_Single                 ((u16)0x0008)
84 
#define TIM_OPMode_Repetitive             ((u16)0x0000)
85 
 
86 
#define IS_TIM_OPM_MODE(MODE) ((MODE == TIM_OPMode_Single) || \
87 
                               (MODE == TIM_OPMode_Repetitive))
88 
 
89 
/* TIM Channel --------------------------------------------------------------*/
90 
#define TIM_Channel_1                     ((u16)0x0000)
91 
#define TIM_Channel_2                     ((u16)0x0001)
92 
#define TIM_Channel_3                     ((u16)0x0002)
93 
#define TIM_Channel_4                     ((u16)0x0003)
94 
 
95 
#define IS_TIM_CHANNEL(CHANNEL) ((CHANNEL == TIM_Channel_1) || \
96 
                                 (CHANNEL == TIM_Channel_2) || \
97 
                                 (CHANNEL == TIM_Channel_3) || \
98 
                                 (CHANNEL == TIM_Channel_4))
99 
 
100 
/* TIM Clock Division CKD ---------------------------------------------------*/
101 
#define TIM_CKD_DIV1                      ((u16)0x0000)
102 
#define TIM_CKD_DIV2                      ((u16)0x0100)
103 
#define TIM_CKD_DIV4                      ((u16)0x0200)
104 
 
105 
#define IS_TIM_CKD_DIV(DIV) ((DIV == TIM_CKD_DIV1) || \
106 
                             (DIV == TIM_CKD_DIV2) || \
107 
                             (DIV == TIM_CKD_DIV4))
108 
 
109 
/* TIM Counter Mode ---------------------------------------------------------*/
110 
#define TIM_CounterMode_Up                ((u16)0x0000)
111 
#define TIM_CounterMode_Down              ((u16)0x0010)
112 
#define TIM_CounterMode_CenterAligned1    ((u16)0x0020)
113 
#define TIM_CounterMode_CenterAligned2    ((u16)0x0040)
114 
#define TIM_CounterMode_CenterAligned3    ((u16)0x0060)
115 
 
116 
#define IS_TIM_COUNTER_MODE(MODE) ((MODE == TIM_CounterMode_Up) ||  \
117 
                                   (MODE == TIM_CounterMode_Down) || \
118 
                                   (MODE == TIM_CounterMode_CenterAligned1) || \
119 
                                   (MODE == TIM_CounterMode_CenterAligned2) || \
120 
                                   (MODE == TIM_CounterMode_CenterAligned3))
121 
 
122 
/* TIM Output Compare Polarity ----------------------------------------------*/
123 
#define TIM_OCPolarity_High               ((u16)0x0000)
124 
#define TIM_OCPolarity_Low                ((u16)0x0002)
125 
 
126 
#define IS_TIM_OC_POLARITY(POLARITY) ((POLARITY == TIM_OCPolarity_High) || \
127 
                                     (POLARITY == TIM_OCPolarity_Low))
128 
 
129 
/* TIM Input Capture Polarity -----------------------------------------------*/
130 
#define  TIM_ICPolarity_Rising            ((u16)0x0000)
131 
#define  TIM_ICPolarity_Falling           ((u16)0x0002)
132 
 
133 
#define IS_TIM_IC_POLARITY(POLARITY) ((POLARITY == TIM_ICPolarity_Rising) || \
134 
                                     (POLARITY == TIM_ICPolarity_Falling))
135 
 
136 
/* TIM Input Capture Channel  Selection -------------------------------------*/
137 
#define TIM_ICSelection_DirectTI          ((u16)0x0001)
138 
#define TIM_ICSelection_IndirectTI        ((u16)0x0002)
139 
#define TIM_ICSelection_TRGI              ((u16)0x0003)
140 
 
141 
#define IS_TIM_IC_SELECTION(SELECTION) ((SELECTION == TIM_ICSelection_DirectTI) || \
142 
                                       (SELECTION == TIM_ICSelection_IndirectTI) || \
143 
                                       (SELECTION == TIM_ICSelection_TRGI))
144 
 
145 
/* TIM Input Capture Prescaler ----------------------------------------------*/
146 
#define TIM_ICPSC_DIV1                    ((u16)0x0000)
147 
#define TIM_ICPSC_DIV2                    ((u16)0x0004)
148 
#define TIM_ICPSC_DIV4                    ((u16)0x0008)
149 
#define TIM_ICPSC_DIV8                    ((u16)0x000C)
150 
 
151 
#define IS_TIM_IC_PRESCALER(PRESCALER) ((PRESCALER == TIM_ICPSC_DIV1) || \
152 
                                       (PRESCALER == TIM_ICPSC_DIV2) || \
153 
                                       (PRESCALER == TIM_ICPSC_DIV4) || \
154 
                                       (PRESCALER == TIM_ICPSC_DIV8))
155 
 
156 
/* TIM Input Capture Filer Value ---------------------------------------------*/
157 
#define IS_TIM_IC_FILTER(ICFILTER) (ICFILTER <= 0xF)
158 
 
159 
/* TIM interrupt sources ----------------------------------------------------*/
160 
#define TIM_IT_Update                     ((u16)0x0001)
161 
#define TIM_IT_CC1                        ((u16)0x0002)
162 
#define TIM_IT_CC2                        ((u16)0x0004)
163 
#define TIM_IT_CC3                        ((u16)0x0008)
164 
#define TIM_IT_CC4                        ((u16)0x0010)
165 
#define TIM_IT_Trigger                    ((u16)0x0040)
166 
 
167 
#define IS_TIM_IT(IT) (((IT & (u16)0xFFA0) == 0x0000) && (IT != 0x0000))
168 
 
169 
#define IS_TIM_GET_IT(IT) ((IT == TIM_IT_Update) || \
170 
                           (IT == TIM_IT_CC1) || \
171 
                           (IT == TIM_IT_CC2) || \
172 
                           (IT == TIM_IT_CC3) || \
173 
                           (IT == TIM_IT_CC4) || \
174 
                           (IT == TIM_IT_Trigger))
175 
 
176 
/* TIM DMA Base address -----------------------------------------------------*/
177 
#define TIM_DMABase_CR1                   ((u16)0x0000)
178 
#define TIM_DMABase_CR2                   ((u16)0x0001)
179 
#define TIM_DMABase_SMCR                  ((u16)0x0002)
180 
#define TIM_DMABase_DIER                  ((u16)0x0003)
181 
#define TIM_DMABase_SR                    ((u16)0x0004)
182 
#define TIM_DMABase_EGR                   ((u16)0x0005)
183 
#define TIM_DMABase_CCMR1                 ((u16)0x0006)
184 
#define TIM_DMABase_CCMR2                 ((u16)0x0007)
185 
#define TIM_DMABase_CCER                  ((u16)0x0008)
186 
#define TIM_DMABase_CNT                   ((u16)0x0009)
187 
#define TIM_DMABase_PSC                   ((u16)0x000A)
188 
#define TIM_DMABase_ARR                   ((u16)0x000B)
189 
#define TIM_DMABase_CCR1                  ((u16)0x000D)
190 
#define TIM_DMABase_CCR2                  ((u16)0x000E)
191 
#define TIM_DMABase_CCR3                  ((u16)0x000F)
192 
#define TIM_DMABase_CCR4                  ((u16)0x0010)
193 
#define TIM_DMABase_DCR                   ((u16)0x0012)
194 
 
195 
#define IS_TIM_DMA_BASE(BASE) ((BASE == TIM_DMABase_CR1) || \
196 
                               (BASE == TIM_DMABase_CR2) || \
197 
                               (BASE == TIM_DMABase_SMCR) || \
198 
                               (BASE == TIM_DMABase_DIER) || \
199 
                               (BASE == TIM_DMABase_SR) || \
200 
                               (BASE == TIM_DMABase_EGR) || \
201 
                               (BASE == TIM_DMABase_CCMR1) || \
202 
                               (BASE == TIM_DMABase_CCMR2) || \
203 
                               (BASE == TIM_DMABase_CCER) || \
204 
                               (BASE == TIM_DMABase_CNT) || \
205 
                               (BASE == TIM_DMABase_PSC) || \
206 
                               (BASE == TIM_DMABase_ARR) || \
207 
                               (BASE == TIM_DMABase_CCR1) || \
208 
                               (BASE == TIM_DMABase_CCR2) || \
209 
                               (BASE == TIM_DMABase_CCR3) || \
210 
                               (BASE == TIM_DMABase_CCR4) || \
211 
                               (BASE == TIM_DMABase_DCR))
212 
 
213 
/* TIM DMA Burst Length -----------------------------------------------------*/
214 
#define TIM_DMABurstLength_1Byte          ((u16)0x0000)
215 
#define TIM_DMABurstLength_2Bytes         ((u16)0x0100)
216 
#define TIM_DMABurstLength_3Bytes         ((u16)0x0200)
217 
#define TIM_DMABurstLength_4Bytes         ((u16)0x0300)
218 
#define TIM_DMABurstLength_5Bytes         ((u16)0x0400)
219 
#define TIM_DMABurstLength_6Bytes         ((u16)0x0500)
220 
#define TIM_DMABurstLength_7Bytes         ((u16)0x0600)
221 
#define TIM_DMABurstLength_8Bytes         ((u16)0x0700)
222 
#define TIM_DMABurstLength_9Bytes         ((u16)0x0800)
223 
#define TIM_DMABurstLength_10Bytes        ((u16)0x0900)
224 
#define TIM_DMABurstLength_11Bytes        ((u16)0x0A00)
225 
#define TIM_DMABurstLength_12Bytes        ((u16)0x0B00)
226 
#define TIM_DMABurstLength_13Bytes        ((u16)0x0C00)
227 
#define TIM_DMABurstLength_14Bytes        ((u16)0x0D00)
228 
#define TIM_DMABurstLength_15Bytes        ((u16)0x0E00)
229 
#define TIM_DMABurstLength_16Bytes        ((u16)0x0F00)
230 
#define TIM_DMABurstLength_17Bytes        ((u16)0x1000)
231 
#define TIM_DMABurstLength_18Bytes        ((u16)0x1100)
232 
 
233 
#define IS_TIM_DMA_LENGTH(LENGTH) ((LENGTH == TIM_DMABurstLength_1Byte) || \
234 
                                   (LENGTH == TIM_DMABurstLength_2Bytes) || \
235 
                                   (LENGTH == TIM_DMABurstLength_3Bytes) || \
236 
                                   (LENGTH == TIM_DMABurstLength_4Bytes) || \
237 
                                   (LENGTH == TIM_DMABurstLength_5Bytes) || \
238 
                                   (LENGTH == TIM_DMABurstLength_6Bytes) || \
239 
                                   (LENGTH == TIM_DMABurstLength_7Bytes) || \
240 
                                   (LENGTH == TIM_DMABurstLength_8Bytes) || \
241 
                                   (LENGTH == TIM_DMABurstLength_9Bytes) || \
242 
                                   (LENGTH == TIM_DMABurstLength_10Bytes) || \
243 
                                   (LENGTH == TIM_DMABurstLength_11Bytes) || \
244 
                                   (LENGTH == TIM_DMABurstLength_12Bytes) || \
245 
                                   (LENGTH == TIM_DMABurstLength_13Bytes) || \
246 
                                   (LENGTH == TIM_DMABurstLength_14Bytes) || \
247 
                                   (LENGTH == TIM_DMABurstLength_15Bytes) || \
248 
                                   (LENGTH == TIM_DMABurstLength_16Bytes) || \
249 
                                   (LENGTH == TIM_DMABurstLength_17Bytes) || \
250 
                                   (LENGTH == TIM_DMABurstLength_18Bytes))
251 
 
252 
/* TIM DMA sources ----------------------------------------------------------*/
253 
#define TIM_DMA_Update                    ((u16)0x0100)
254 
#define TIM_DMA_CC1                       ((u16)0x0200)
255 
#define TIM_DMA_CC2                       ((u16)0x0400)
256 
#define TIM_DMA_CC3                       ((u16)0x0800)
257 
#define TIM_DMA_CC4                       ((u16)0x1000)
258 
#define TIM_DMA_Trigger                   ((u16)0x4000)
259 
 
260 
#define IS_TIM_DMA_SOURCE(SOURCE) (((SOURCE & (u16)0xA0FF) == 0x0000) && (SOURCE != 0x0000))
261 
 
262 
/* TIM External Trigger Prescaler -------------------------------------------*/
263 
#define TIM_ExtTRGPSC_OFF                 ((u16)0x0000)
264 
#define TIM_ExtTRGPSC_DIV2                ((u16)0x1000)
265 
#define TIM_ExtTRGPSC_DIV4                ((u16)0x2000)
266 
#define TIM_ExtTRGPSC_DIV8                ((u16)0x3000)
267 
 
268 
#define IS_TIM_EXT_PRESCALER(PRESCALER) ((PRESCALER == TIM_ExtTRGPSC_OFF) || \
269 
                                         (PRESCALER == TIM_ExtTRGPSC_DIV2) || \
270 
                                         (PRESCALER == TIM_ExtTRGPSC_DIV4) || \
271 
                                         (PRESCALER == TIM_ExtTRGPSC_DIV8))
272 
 
273 
/* TIM Input Trigger Selection ---------------------------------------------*/
274 
#define TIM_TS_ITR0                       ((u16)0x0000)
275 
#define TIM_TS_ITR1                       ((u16)0x0010)
276 
#define TIM_TS_ITR2                       ((u16)0x0020)
277 
#define TIM_TS_ITR3                       ((u16)0x0030)
278 
#define TIM_TS_TI1F_ED                    ((u16)0x0040)
279 
#define TIM_TS_TI1FP1                     ((u16)0x0050)
280 
#define TIM_TS_TI2FP2                     ((u16)0x0060)
281 
#define TIM_TS_ETRF                       ((u16)0x0070)
282 
 
283 
#define IS_TIM_TRIGGER_SELECTION(SELECTION) ((SELECTION == TIM_TS_ITR0) || \
284 
                                             (SELECTION == TIM_TS_ITR1) || \
285 
                                             (SELECTION == TIM_TS_ITR2) || \
286 
                                             (SELECTION == TIM_TS_ITR3) || \
287 
                                             (SELECTION == TIM_TS_TI1F_ED) || \
288 
                                             (SELECTION == TIM_TS_TI1FP1) || \
289 
                                             (SELECTION == TIM_TS_TI2FP2) || \
290 
                                             (SELECTION == TIM_TS_ETRF))
291 
 
292 
#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) ((SELECTION == TIM_TS_ITR0) || \
293 
                                                      (SELECTION == TIM_TS_ITR1) || \
294 
                                                      (SELECTION == TIM_TS_ITR2) || \
295 
                                                      (SELECTION == TIM_TS_ITR3))
296 
 
297 
#define IS_TIM_TIX_TRIGGER_SELECTION(SELECTION) ((SELECTION == TIM_TS_TI1F_ED) || \
298 
                                                 (SELECTION == TIM_TS_TI1FP1) || \
299 
                                                 (SELECTION == TIM_TS_TI2FP2))
300 
 
301 
/* TIM External Trigger Polarity --------------------------------------------*/
302 
#define TIM_ExtTRGPolarity_Inverted       ((u16)0x8000)
303 
#define TIM_ExtTRGPolarity_NonInverted    ((u16)0x0000)
304 
 
305 
#define IS_TIM_EXT_POLARITY(POLARITY) ((POLARITY == TIM_ExtTRGPolarity_Inverted) || \
306 
                                       (POLARITY == TIM_ExtTRGPolarity_NonInverted))
307 
 
308 
/* TIM Prescaler Reload Mode ------------------------------------------------*/
309 
#define TIM_PSCReloadMode_Update          ((u16)0x0000)
310 
#define TIM_PSCReloadMode_Immediate       ((u16)0x0001)
311 
 
312 
#define IS_TIM_PRESCALER_RELOAD(RELOAD) ((RELOAD == TIM_PSCReloadMode_Update) || \
313 
                                         (RELOAD == TIM_PSCReloadMode_Immediate))
314 
 
315 
/* TIM Forced Action --------------------------------------------------------*/
316 
#define TIM_ForcedAction_Active           ((u16)0x0050)
317 
#define TIM_ForcedAction_InActive         ((u16)0x0040)
318 
 
319 
#define IS_TIM_FORCED_ACTION(ACTION) ((ACTION == TIM_ForcedAction_Active) || \
320 
                                      (ACTION == TIM_ForcedAction_InActive))
321 
 
322 
/* TIM Encoder Mode ---------------------------------------------------------*/
323 
#define TIM_EncoderMode_TI1               ((u16)0x0001)
324 
#define TIM_EncoderMode_TI2               ((u16)0x0002)
325 
#define TIM_EncoderMode_TI12              ((u16)0x0003)
326 
 
327 
#define IS_TIM_ENCODER_MODE(MODE) ((MODE == TIM_EncoderMode_TI1) || \
328 
                                   (MODE == TIM_EncoderMode_TI2) || \
329 
                                   (MODE == TIM_EncoderMode_TI12))
330 
 
331 
/* TIM Event Source ---------------------------------------------------------*/
332 
#define TIM_EventSource_Update            ((u16)0x0001)
333 
#define TIM_EventSource_CC1               ((u16)0x0002)
334 
#define TIM_EventSource_CC2               ((u16)0x0004)
335 
#define TIM_EventSource_CC3               ((u16)0x0008)
336 
#define TIM_EventSource_CC4               ((u16)0x0010)
337 
#define TIM_EventSource_Trigger           ((u16)0x0040)
338 
 
339 
#define IS_TIM_EVENT_SOURCE(SOURCE) (((SOURCE & (u16)0xFFA0) == 0x0000) && (SOURCE != 0x0000))
340 
 
341 
 
342 
/* TIM Update Source --------------------------------------------------------*/
343 
#define TIM_UpdateSource_Global           ((u16)0x0000)
344 
#define TIM_UpdateSource_Regular          ((u16)0x0001)
345 
 
346 
#define IS_TIM_UPDATE_SOURCE(SOURCE) ((SOURCE == TIM_UpdateSource_Global) || \
347 
                                      (SOURCE == TIM_UpdateSource_Regular))
348 
 
349 
/* TIM Ouput Compare Preload State ------------------------------------------*/
350 
#define TIM_OCPreload_Enable              ((u16)0x0008)
351 
#define TIM_OCPreload_Disable             ((u16)0x0000)
352 
 
353 
#define IS_TIM_OCPRELOAD_STATE(STATE) ((STATE == TIM_OCPreload_Enable) || \
354 
                                       (STATE == TIM_OCPreload_Disable))
355 
 
356 
/* TIM Ouput Compare Fast State ---------------------------------------------*/
357 
#define TIM_OCFast_Enable                 ((u16)0x0004)
358 
#define TIM_OCFast_Disable                ((u16)0x0000)
359 
 
360 
#define IS_TIM_OCFAST_STATE(STATE) ((STATE == TIM_OCFast_Enable) || \
361 
                                    (STATE == TIM_OCFast_Disable))
362 
 
363 
/* TIM Trigger Output Source ------------------------------------------------*/
364 
#define TIM_TRGOSource_Reset              ((u16)0x0000)
365 
#define TIM_TRGOSource_Enable             ((u16)0x0010)
366 
#define TIM_TRGOSource_Update             ((u16)0x0020)
367 
#define TIM_TRGOSource_OC1                ((u16)0x0030)
368 
#define TIM_TRGOSource_OC1Ref             ((u16)0x0040)
369 
#define TIM_TRGOSource_OC2Ref             ((u16)0x0050)
370 
#define TIM_TRGOSource_OC3Ref             ((u16)0x0060)
371 
#define TIM_TRGOSource_OC4Ref             ((u16)0x0070)
372 
 
373 
#define IS_TIM_TRGO_SOURCE(SOURCE) ((SOURCE == TIM_TRGOSource_Reset) || \
374 
                                    (SOURCE == TIM_TRGOSource_Enable) || \
375 
                                    (SOURCE == TIM_TRGOSource_Update) || \
376 
                                    (SOURCE == TIM_TRGOSource_OC1) || \
377 
                                    (SOURCE == TIM_TRGOSource_OC1Ref) || \
378 
                                    (SOURCE == TIM_TRGOSource_OC2Ref) || \
379 
                                    (SOURCE == TIM_TRGOSource_OC3Ref) || \
380 
                                    (SOURCE == TIM_TRGOSource_OC4Ref))
381 
 
382 
/* TIM Slave Mode -----------------------------------------------------------*/
383 
#define TIM_SlaveMode_Reset               ((u16)0x0004)
384 
#define TIM_SlaveMode_Gated               ((u16)0x0005)
385 
#define TIM_SlaveMode_Trigger             ((u16)0x0006)
386 
#define TIM_SlaveMode_External1           ((u16)0x0007)
387 
 
388 
 
389 
#define IS_TIM_SLAVE_MODE(MODE) ((MODE == TIM_SlaveMode_Reset) || \
390 
                                 (MODE == TIM_SlaveMode_Gated) || \
391 
                                 (MODE == TIM_SlaveMode_Trigger) || \
392 
                                 (MODE == TIM_SlaveMode_External1))
393 
 
394 
/* TIM TIx External Clock Source --------------------------------------------*/
395 
#define TIM_TIxExternalCLK1Source_TI1     ((u16)0x0050)
396 
#define TIM_TIxExternalCLK1Source_TI2     ((u16)0x0060)
397 
#define TIM_TIxExternalCLK1Source_TI1ED   ((u16)0x0040)
398 
 
399 
#define IS_TIM_TIXCLK_SOURCE(SOURCE) ((SOURCE == TIM_TIxExternalCLK1Source_TI1) || \
400 
                                      (SOURCE == TIM_TIxExternalCLK1Source_TI2) || \
401 
                                      (SOURCE == TIM_TIxExternalCLK1Source_TI1ED))
402 
 
403 
 
404 
/* TIM Master Slave Mode ----------------------------------------------------*/
405 
#define TIM_MasterSlaveMode_Enable        ((u16)0x0080)
406 
#define TIM_MasterSlaveMode_Disable       ((u16)0x0000)
407 
 
408 
#define IS_TIM_MSM_STATE(STATE) ((STATE == TIM_MasterSlaveMode_Enable) || \
409 
                                 (STATE == TIM_MasterSlaveMode_Disable))
410 
 
411 
/* TIM Flags ----------------------------------------------------------------*/
412 
#define TIM_FLAG_Update                   ((u16)0x0001)
413 
#define TIM_FLAG_CC1                      ((u16)0x0002)
414 
#define TIM_FLAG_CC2                      ((u16)0x0004)
415 
#define TIM_FLAG_CC3                      ((u16)0x0008)
416 
#define TIM_FLAG_CC4                      ((u16)0x0010)
417 
#define TIM_FLAG_Trigger                  ((u16)0x0040)
418 
#define TIM_FLAG_CC1OF                    ((u16)0x0200)
419 
#define TIM_FLAG_CC2OF                    ((u16)0x0400)
420 
#define TIM_FLAG_CC3OF                    ((u16)0x0800)
421 
#define TIM_FLAG_CC4OF                    ((u16)0x1000)
422 
 
423 
#define IS_TIM_GET_FLAG(FLAG) ((FLAG == TIM_FLAG_Update) || \
424 
                               (FLAG == TIM_FLAG_CC1) || \
425 
                               (FLAG == TIM_FLAG_CC2) || \
426 
                               (FLAG == TIM_FLAG_CC3) || \
427 
                               (FLAG == TIM_FLAG_CC4) || \
428 
                               (FLAG == TIM_FLAG_Trigger) || \
429 
                               (FLAG == TIM_FLAG_CC1OF) || \
430 
                               (FLAG == TIM_FLAG_CC2OF) || \
431 
                               (FLAG == TIM_FLAG_CC3OF) || \
432 
                               (FLAG == TIM_FLAG_CC4OF))
433 
 
434 
#define IS_TIM_CLEAR_FLAG(FLAG) (((FLAG & (u16)0xE1A0) == 0x0000) && (FLAG != 0x0000))
435 
 
436 
 
437 
 
438 
/* Exported macro ------------------------------------------------------------*/
439 
/* Exported functions --------------------------------------------------------*/
440 
void TIM_DeInit(TIM_TypeDef* TIMx);
441 
void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
442 
void TIM_OCInit(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct);
443 
void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct);
444 
void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct);
445 
void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct);
446 
void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct);
447 
void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState);
448 
void TIM_ITConfig(TIM_TypeDef* TIMx, u16 TIM_IT, FunctionalState NewState);
449 
void TIM_DMAConfig(TIM_TypeDef* TIMx, u16 TIM_DMABase, u16 TIM_DMABurstLength);
450 
void TIM_DMACmd(TIM_TypeDef* TIMx, u16 TIM_DMASource, FunctionalState Newstate);
451 
void TIM_InternalClockConfig(TIM_TypeDef* TIMx);
452 
void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, u16 TIM_InputTriggerSource);
453 
void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, u16 TIM_TIxExternalCLKSource,
454 
                                u16 TIM_ICPolarity, u8 ICFilter);
455 
void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, u16 TIM_ExtTRGPrescaler, u16 TIM_ExtTRGPolarity,
456 
                             u8 ExtTRGFilter);
457 
void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, u16 TIM_ExtTRGPrescaler, u16 TIM_ExtTRGPolarity,
458 
                             u8 ExtTRGFilter);
459 
void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, u16 TIM_InputTriggerSource);
460 
void TIM_PrescalerConfig(TIM_TypeDef* TIMx, u16 Prescaler, u16 TIM_PSCReloadMode);
461 
void TIM_CounterModeConfig(TIM_TypeDef* TIMx, u16 TIM_CounterMode);
462 
void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction);
463 
void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction);
464 
void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction);
465 
void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, u16 TIM_ForcedAction);
466 
void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState Newstate);
467 
void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState Newstate);
468 
void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload);
469 
void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload);
470 
void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload);
471 
void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, u16 TIM_OCPreload);
472 
void TIM_OC1FastConfig(TIM_TypeDef* TIMx, u16 TIM_OCFast);
473 
void TIM_OC2FastConfig(TIM_TypeDef* TIMx, u16 TIM_OCFast);
474 
void TIM_OC3FastConfig(TIM_TypeDef* TIMx, u16 TIM_OCFast);
475 
void TIM_OC4FastConfig(TIM_TypeDef* TIMx, u16 TIM_OCFast);
476 
void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState Newstate);
477 
void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, u16 TIM_EncoderMode,
478 
                                u16 TIM_IC1Polarity, u16 TIM_IC2Polarity);
479 
void TIM_GenerateEvent(TIM_TypeDef* TIMx, u16 TIM_EventSource);
480 
void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCPolarity);
481 
void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCPolarity);
482 
void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCPolarity);
483 
void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, u16 TIM_OCPolarity);
484 
void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, u16 TIM_UpdateSource);
485 
void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState Newstate);
486 
void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, u16 TIM_OPMode);
487 
void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, u16 TIM_TRGOSource);
488 
void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, u16 TIM_SlaveMode);
489 
void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, u16 TIM_MasterSlaveMode);
490 
void TIM_SetAutoreload(TIM_TypeDef* TIMx, u16 Autoreload);
491 
void TIM_SetCompare1(TIM_TypeDef* TIMx, u16 Compare1);
492 
void TIM_SetCompare2(TIM_TypeDef* TIMx, u16 Compare2);
493 
void TIM_SetCompare3(TIM_TypeDef* TIMx, u16 Compare3);
494 
void TIM_SetCompare4(TIM_TypeDef* TIMx, u16 Compare4);
495 
void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, u16 TIM_IC1Prescaler);
496 
void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, u16 TIM_IC2Prescaler);
497 
void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, u16 TIM_IC3Prescaler);
498 
void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, u16 TIM_IC4Prescaler);
499 
void TIM_SetClockDivision(TIM_TypeDef* TIMx, u16 TIM_CKD);
500 
u16 TIM_GetCapture1(TIM_TypeDef* TIMx);
501 
u16 TIM_GetCapture2(TIM_TypeDef* TIMx);
502 
u16 TIM_GetCapture3(TIM_TypeDef* TIMx);
503 
u16 TIM_GetCapture4(TIM_TypeDef* TIMx);
504 
u16 TIM_GetCounter(TIM_TypeDef* TIMx);
505 
u16 TIM_GetPrescaler(TIM_TypeDef* TIMx);
506 
FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, u16 TIM_FLAG);
507 
void TIM_ClearFlag(TIM_TypeDef* TIMx, u16 TIM_FLAG);
508 
ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, u16 TIM_IT);
509 
void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, u16 TIM_IT);
510 
 
511 
#endif /*__STM32F10x_TIM_H */
512 
 
513 
/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/

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