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jeremybenn |
/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
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* File Name : stm32f10x_i2c.c
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* Author : MCD Application Team
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* Date First Issued : 09/29/2006
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* Description : This file provides all the I2C firmware functions.
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********************************************************************************
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* History:
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* 04/02/2007: V0.2
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* 02/05/2007: V0.1
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* 09/29/2006: V0.01
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_i2c.h"
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#include "stm32f10x_rcc.h"
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* I2C SPE mask */
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#define CR1_PE_Set ((u16)0x0001)
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#define CR1_PE_Reset ((u16)0xFFFE)
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/* I2C DMAEN mask */
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#define CR2_DMAEN_Set ((u16)0x0800)
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#define CR2_DMAEN_Reset ((u16)0xF7FF)
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/* I2C LAST mask */
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#define CR2_LAST_Set ((u16)0x1000)
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#define CR2_LAST_Reset ((u16)0xEFFF)
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/* I2C START mask */
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#define CR1_START_Set ((u16)0x0100)
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#define CR1_START_Reset ((u16)0xFEFF)
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/* I2C STOP mask */
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#define CR1_STOP_Set ((u16)0x0200)
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#define CR1_STOP_Reset ((u16)0xFDFF)
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/* I2C ACK mask */
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#define CR1_ACK_Set ((u16)0x0400)
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#define CR1_ACK_Reset ((u16)0xFBFF)
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/* I2C ENGC mask */
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#define CR1_ENGC_Set ((u16)0x0040)
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#define CR1_ENGC_Reset ((u16)0xFFBF)
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/* I2C ADD0 mask */
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#define OAR1_ADD0_Set ((u16)0x0001)
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#define OAR1_ADD0_Reset ((u16)0xFFFE)
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/* I2C SWRST mask */
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#define CR1_SWRST_Set ((u16)0x8000)
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#define CR1_SWRST_Reset ((u16)0x7FFF)
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/* I2C PEC mask */
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#define CR1_PEC_Set ((u16)0x1000)
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/* I2C ENPEC mask */
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#define CR1_ENPEC_Set ((u16)0x0020)
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#define CR1_ENPEC_Reset ((u16)0xFFDF)
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/* I2C ENARP mask */
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#define CR1_ENARP_Set ((u16)0x0010)
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#define CR1_ENARP_Reset ((u16)0xFFEF)
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/* I2C NOSTRETCH mask */
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#define CR1_NOSTRETCH_Set ((u16)0x0080)
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#define CR1_NOSTRETCH_Reset ((u16)0xFF7F)
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/* I2C ENDUAL mask */
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#define OAR2_ENDUAL_Set ((u16)0x0001)
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#define OAR2_ENDUAL_Reset ((u16)0xFFFE)
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/* I2C F/S mask */
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#define CCR_FS_Set ((u16)0x8000)
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/* I2C ADD2 mask */
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#define OAR2_ADD2_Reset ((u16)0xFF01)
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/* I2C FREQ mask */
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#define CR2_FREQ_Reset ((u16)0xFFC0)
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/* I2C CCR mask */
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#define CCR_CCR_Set ((u16)0x0FFF)
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/* I2C FLAG mask */
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#define I2C_FLAG_Mask ((u32)0x00FFFFFF)
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/* I2C registers Masks */
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#define CR1_CLEAR_Mask ((u16)0xFBF5)
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/*******************************************************************************
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* Function Name : I2C_DeInit
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* Description : Deinitializes the I2Cx peripheral registers to their default
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* reset values.
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* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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* Output : None
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* Return : None
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*******************************************************************************/
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void I2C_DeInit(I2C_TypeDef* I2Cx)
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{
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switch (*(u32*)&I2Cx)
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{
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case I2C1_BASE:
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/* Enable I2C1 reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
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/* Release I2C1 from reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
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break;
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case I2C2_BASE:
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/* Enable I2C2 reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
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/* Release I2C2 from reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
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break;
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default:
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break;
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}
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}
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/*******************************************************************************
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* Function Name : I2C_Init
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* Description : Initializes the I2Cx according to the specified parameters
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* in the I2C_InitStruct.
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* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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* - I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
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* contains the configuration information for the specified
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* I2C peripheral.
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* Output : None
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* Return : None
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******************************************************************************/
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void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
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{
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u16 tmpreg = 0, freqrange = 0;
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u16 result = 0x04;
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u32 pclk1clock = 12000000;
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RCC_ClocksTypeDef RCC_Clocks;
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/* Check the parameters */
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assert(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
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assert(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle));
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assert(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
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assert(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack));
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assert(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
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assert(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed));
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/*---------------------------- I2Cx CR2 Configuration ------------------------*/
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/* Get the I2Cx CR2 value */
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tmpreg = I2Cx->CR2;
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/* Clear frequency FREQ[5:0] bits */
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tmpreg &= CR2_FREQ_Reset;
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/* Get PCLK1Clock frequency value */
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RCC_GetClocksFreq(&RCC_Clocks);
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pclk1clock = RCC_Clocks.PCLK1_Frequency;
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/* Set frequency bits depending on PCLK1Clock value */
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freqrange = (u16)(pclk1clock / 1000000);
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tmpreg |= freqrange;
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/* Write to I2Cx CR2 */
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I2Cx->CR2 = tmpreg;
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/*---------------------------- I2Cx CCR Configuration ------------------------*/
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/* Disable I2Cx to configure TRISE */
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I2C_Cmd(I2Cx, DISABLE);
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/* Reset tmpreg value */
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/* Clear F/S, DUTY and CCR[11:0] bits */
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tmpreg = 0;
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/* Configure speed in standard mode */
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if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
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{
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/* Standard mode speed calculate */
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result = (u16)(pclk1clock / (I2C_InitStruct->I2C_ClockSpeed << 1));
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/* Test if CCR value is under 0x4*/
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if (result < 0x04)
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{
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/* Set minimum allowed value */
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result = 0x04;
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}
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/* Set speed value for standard mode */
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tmpreg |= result;
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/* Set Maximum Rise Time: ((1000/(1000000000/pclk1clock))+1 */
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I2Cx->TRISE = freqrange + 1;
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}
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/* Configure speed in fast mode */
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else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/
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{
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if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2)
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{
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/* Fast mode speed calculate: Tlow/Thigh = 2 */
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result = (u16)(pclk1clock / (I2C_InitStruct->I2C_ClockSpeed * 3));
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}
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else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/
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{
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/* Fast mode speed calculate: Tlow/Thigh = 16/9 */
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result = (u16)(pclk1clock / (I2C_InitStruct->I2C_ClockSpeed * 25));
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/* Set DUTY bit */
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result |= I2C_DutyCycle_16_9;
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}
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/* Test if CCR value is under 0x1*/
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if ((result & CCR_CCR_Set) == 0)
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{
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/* Set minimum allowed value */
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result |= (u16)0x0001;
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}
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/* Set speed value and set F/S bit for fast mode */
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tmpreg |= result | CCR_FS_Set;
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/* Set Maximum Rise Time: ((300/(1000000000/pclk1clock))+1 */
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I2Cx->TRISE = (u16)(((freqrange * 300) / 1000) + 1);
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}
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/* Write to I2Cx CCR */
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I2Cx->CCR = tmpreg;
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/* Enable I2Cx */
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I2C_Cmd(I2Cx, ENABLE);
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/*---------------------------- I2Cx CR1 Configuration ------------------------*/
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/* Get the I2Cx CR1 value */
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tmpreg = I2Cx->CR1;
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/* Clear ACK, SMBTYPE and SMBUS bits */
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tmpreg &= CR1_CLEAR_Mask;
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/* Configure I2Cx: mode and acknowledgement */
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/* Set SMBTYPE and SMBUS bits according to I2C_Mode value */
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/* Set ACK bit according to I2C_Ack value */
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tmpreg |= (u16)((u32)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack);
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/* Write to I2Cx CR1 */
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I2Cx->CR1 = tmpreg;
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/*---------------------------- I2Cx OAR1 Configuration -----------------------*/
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/* Set I2Cx Own Address1 and acknowledged address */
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I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1);
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}
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/*******************************************************************************
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* Function Name : I2C_StructInit
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* Description : Fills each I2C_InitStruct member with its default value.
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* Input : - I2C_InitStruct: pointer to a I2C_InitTypeDef structure
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* which will be initialized.
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* Output : None
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* Return : None
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*******************************************************************************/
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void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
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{
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/*---------------- Reset I2C init structure parameters values ----------------*/
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/* Initialize the I2C_Mode member */
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I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
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/* Initialize the I2C_DutyCycle member */
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I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2;
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/* Initialize the I2C_OwnAddress1 member */
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I2C_InitStruct->I2C_OwnAddress1 = 0;
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/* Initialize the I2C_Ack member */
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I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
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/* Initialize the I2C_AcknowledgedAddress member */
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I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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/* initialize the I2C_ClockSpeed member */
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I2C_InitStruct->I2C_ClockSpeed = 5000;
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}
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/*******************************************************************************
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* Function Name : I2C_Cmd
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* Description : Enables or disables the specified I2C peripheral.
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* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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* - NewState: new state of the I2Cx peripheral. This parameter
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* can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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{
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/* Check the parameters */
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assert(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the selected I2C peripheral */
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I2Cx->CR1 |= CR1_PE_Set;
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}
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else
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{
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/* Disable the selected I2C peripheral */
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I2Cx->CR1 &= CR1_PE_Reset;
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}
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}
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/*******************************************************************************
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* Function Name : I2C_DMACmd
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* Description : Enables or disables the specified I2C DMA requests.
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* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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* - NewState: new state of the I2C DMA transfer.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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{
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/* Check the parameters */
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assert(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the selected I2C DMA requests */
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I2Cx->CR2 |= CR2_DMAEN_Set;
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}
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else
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{
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/* Disable the selected I2C DMA requests */
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I2Cx->CR2 &= CR2_DMAEN_Reset;
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}
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}
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/*******************************************************************************
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* Function Name : I2C_DMALastTransferCmd
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332 |
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* Description : Specifies that the next DMA transfer is the last one.
|
333 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
334 |
|
|
* - NewState: new state of the I2C DMA last transfer.
|
335 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
336 |
|
|
* Output : None
|
337 |
|
|
* Return : None
|
338 |
|
|
*******************************************************************************/
|
339 |
|
|
void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
340 |
|
|
{
|
341 |
|
|
/* Check the parameters */
|
342 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
343 |
|
|
|
344 |
|
|
if (NewState != DISABLE)
|
345 |
|
|
{
|
346 |
|
|
/* Next DMA end of transfer is the last transfer */
|
347 |
|
|
I2Cx->CR2 |= CR2_LAST_Set;
|
348 |
|
|
}
|
349 |
|
|
else
|
350 |
|
|
{
|
351 |
|
|
/* Next DMA end of transfer is not the last transfer */
|
352 |
|
|
I2Cx->CR2 &= CR2_LAST_Reset;
|
353 |
|
|
}
|
354 |
|
|
}
|
355 |
|
|
|
356 |
|
|
/*******************************************************************************
|
357 |
|
|
* Function Name : I2C_GenerateSTART
|
358 |
|
|
* Description : Generates I2Cx communication START condition.
|
359 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
360 |
|
|
* - NewState: new state of the I2C START condition generation.
|
361 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
362 |
|
|
* Output : None
|
363 |
|
|
* Return : None.
|
364 |
|
|
*******************************************************************************/
|
365 |
|
|
void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
366 |
|
|
{
|
367 |
|
|
/* Check the parameters */
|
368 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
369 |
|
|
|
370 |
|
|
if (NewState != DISABLE)
|
371 |
|
|
{
|
372 |
|
|
/* Generate a START condition */
|
373 |
|
|
I2Cx->CR1 |= CR1_START_Set;
|
374 |
|
|
}
|
375 |
|
|
else
|
376 |
|
|
{
|
377 |
|
|
/* Disable the START condition generation */
|
378 |
|
|
I2Cx->CR1 &= CR1_START_Reset;
|
379 |
|
|
}
|
380 |
|
|
}
|
381 |
|
|
|
382 |
|
|
/*******************************************************************************
|
383 |
|
|
* Function Name : I2C_GenerateSTOP
|
384 |
|
|
* Description : Generates I2Cx communication STOP condition.
|
385 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
386 |
|
|
* - NewState: new state of the I2C STOP condition generation.
|
387 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
388 |
|
|
* Output : None
|
389 |
|
|
* Return : None.
|
390 |
|
|
*******************************************************************************/
|
391 |
|
|
void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
392 |
|
|
{
|
393 |
|
|
/* Check the parameters */
|
394 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
395 |
|
|
|
396 |
|
|
if (NewState != DISABLE)
|
397 |
|
|
{
|
398 |
|
|
/* Generate a STOP condition */
|
399 |
|
|
I2Cx->CR1 |= CR1_STOP_Set;
|
400 |
|
|
}
|
401 |
|
|
else
|
402 |
|
|
{
|
403 |
|
|
/* Disable the STOP condition generation */
|
404 |
|
|
I2Cx->CR1 &= CR1_STOP_Reset;
|
405 |
|
|
}
|
406 |
|
|
}
|
407 |
|
|
|
408 |
|
|
/*******************************************************************************
|
409 |
|
|
* Function Name : I2C_AcknowledgeConfig
|
410 |
|
|
* Description : Enables or disables the specified I2C acknowledge feature.
|
411 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
412 |
|
|
* - NewState: new state of the I2C Acknowledgement.
|
413 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
414 |
|
|
* Output : None
|
415 |
|
|
* Return : None.
|
416 |
|
|
*******************************************************************************/
|
417 |
|
|
void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
418 |
|
|
{
|
419 |
|
|
/* Check the parameters */
|
420 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
421 |
|
|
|
422 |
|
|
if (NewState != DISABLE)
|
423 |
|
|
{
|
424 |
|
|
/* Enable the acknowledgement */
|
425 |
|
|
I2Cx->CR1 |= CR1_ACK_Set;
|
426 |
|
|
}
|
427 |
|
|
else
|
428 |
|
|
{
|
429 |
|
|
/* Disable the acknowledgement */
|
430 |
|
|
I2Cx->CR1 &= CR1_ACK_Reset;
|
431 |
|
|
}
|
432 |
|
|
}
|
433 |
|
|
|
434 |
|
|
/*******************************************************************************
|
435 |
|
|
* Function Name : I2C_OwnAddress2Config
|
436 |
|
|
* Description : Configures the specified I2C own address2.
|
437 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
438 |
|
|
* - Address: specifies the 7bit I2C own address2.
|
439 |
|
|
* Output : None
|
440 |
|
|
* Return : None.
|
441 |
|
|
*******************************************************************************/
|
442 |
|
|
void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, u8 Address)
|
443 |
|
|
{
|
444 |
|
|
u16 tmpreg = 0;
|
445 |
|
|
|
446 |
|
|
/* Get the old register value */
|
447 |
|
|
tmpreg = I2Cx->OAR2;
|
448 |
|
|
/* Reset I2Cx Own address2 bit [7:1] */
|
449 |
|
|
tmpreg &= OAR2_ADD2_Reset;
|
450 |
|
|
/* Set I2Cx Own address2 */
|
451 |
|
|
tmpreg |= (u16)(Address & (u16)0x00FE);
|
452 |
|
|
/* Store the new register value */
|
453 |
|
|
I2Cx->OAR2 = tmpreg;
|
454 |
|
|
}
|
455 |
|
|
|
456 |
|
|
/*******************************************************************************
|
457 |
|
|
* Function Name : I2C_DualAddressCmd
|
458 |
|
|
* Description : Enables or disables the specified I2C dual addressing mode.
|
459 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
460 |
|
|
* - NewState: new state of the I2C dual addressing mode.
|
461 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
462 |
|
|
* Output : None
|
463 |
|
|
* Return : None
|
464 |
|
|
*******************************************************************************/
|
465 |
|
|
void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
466 |
|
|
{
|
467 |
|
|
/* Check the parameters */
|
468 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
469 |
|
|
|
470 |
|
|
if (NewState != DISABLE)
|
471 |
|
|
{
|
472 |
|
|
/* Enable dual addressing mode */
|
473 |
|
|
I2Cx->OAR2 |= OAR2_ENDUAL_Set;
|
474 |
|
|
}
|
475 |
|
|
else
|
476 |
|
|
{
|
477 |
|
|
/* Disable dual addressing mode */
|
478 |
|
|
I2Cx->OAR2 &= OAR2_ENDUAL_Reset;
|
479 |
|
|
}
|
480 |
|
|
}
|
481 |
|
|
|
482 |
|
|
/*******************************************************************************
|
483 |
|
|
* Function Name : I2C_GeneralCallCmd
|
484 |
|
|
* Description : Enables or disables the specified I2C general call feature.
|
485 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
486 |
|
|
* - NewState: new state of the I2C General call.
|
487 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
488 |
|
|
* Output : None
|
489 |
|
|
* Return : None
|
490 |
|
|
*******************************************************************************/
|
491 |
|
|
void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
492 |
|
|
{
|
493 |
|
|
/* Check the parameters */
|
494 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
495 |
|
|
|
496 |
|
|
if (NewState != DISABLE)
|
497 |
|
|
{
|
498 |
|
|
/* Enable generall call */
|
499 |
|
|
I2Cx->CR1 |= CR1_ENGC_Set;
|
500 |
|
|
}
|
501 |
|
|
else
|
502 |
|
|
{
|
503 |
|
|
/* Disable generall call */
|
504 |
|
|
I2Cx->CR1 &= CR1_ENGC_Reset;
|
505 |
|
|
}
|
506 |
|
|
}
|
507 |
|
|
|
508 |
|
|
/*******************************************************************************
|
509 |
|
|
* Function Name : I2C_ITConfig
|
510 |
|
|
* Description : Enables or disables the specified I2C interrupts.
|
511 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
512 |
|
|
* - I2C_IT: specifies the I2C interrupts sources to be enabled
|
513 |
|
|
* or disabled.
|
514 |
|
|
* This parameter can be any combination of the following values:
|
515 |
|
|
* - I2C_IT_BUF: Buffer interrupt mask
|
516 |
|
|
* - I2C_IT_EVT: Event interrupt mask
|
517 |
|
|
* - I2C_IT_ERR: Error interrupt mask
|
518 |
|
|
* - NewState: new state of the specified I2C interrupts.
|
519 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
520 |
|
|
* Output : None
|
521 |
|
|
* Return : None
|
522 |
|
|
*******************************************************************************/
|
523 |
|
|
void I2C_ITConfig(I2C_TypeDef* I2Cx, u16 I2C_IT, FunctionalState NewState)
|
524 |
|
|
{
|
525 |
|
|
/* Check the parameters */
|
526 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
527 |
|
|
assert(IS_I2C_CONFIG_IT(I2C_IT));
|
528 |
|
|
|
529 |
|
|
if (NewState != DISABLE)
|
530 |
|
|
{
|
531 |
|
|
/* Enable the selected I2C interrupts */
|
532 |
|
|
I2Cx->CR2 |= I2C_IT;
|
533 |
|
|
}
|
534 |
|
|
else
|
535 |
|
|
{
|
536 |
|
|
/* Disable the selected I2C interrupts */
|
537 |
|
|
I2Cx->CR2 &= (u16)~I2C_IT;
|
538 |
|
|
}
|
539 |
|
|
}
|
540 |
|
|
|
541 |
|
|
/*******************************************************************************
|
542 |
|
|
* Function Name : I2C_SendData
|
543 |
|
|
* Description : Sends a data byte through the I2Cx peripheral.
|
544 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
545 |
|
|
* - Data: Byte to be transmitted..
|
546 |
|
|
* Output : None
|
547 |
|
|
* Return : None
|
548 |
|
|
*******************************************************************************/
|
549 |
|
|
void I2C_SendData(I2C_TypeDef* I2Cx, u8 Data)
|
550 |
|
|
{
|
551 |
|
|
/* Write in the DR register the data to be sent */
|
552 |
|
|
I2Cx->DR = Data;
|
553 |
|
|
}
|
554 |
|
|
|
555 |
|
|
/*******************************************************************************
|
556 |
|
|
* Function Name : I2C_ReceiveData
|
557 |
|
|
* Description : Returns the most recent received data by the I2Cx peripheral.
|
558 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
559 |
|
|
* Output : None
|
560 |
|
|
* Return : The value of the received data.
|
561 |
|
|
*******************************************************************************/
|
562 |
|
|
u8 I2C_ReceiveData(I2C_TypeDef* I2Cx)
|
563 |
|
|
{
|
564 |
|
|
/* Return the data in the DR register */
|
565 |
|
|
return (u8)I2Cx->DR;
|
566 |
|
|
}
|
567 |
|
|
|
568 |
|
|
/*******************************************************************************
|
569 |
|
|
* Function Name : I2C_Send7bitAddress
|
570 |
|
|
* Description : Transmits the address byte to select the slave device.
|
571 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
572 |
|
|
* - Address: specifies the slave address which will be transmitted
|
573 |
|
|
* - Direction: specifies whether the I2C device will be a
|
574 |
|
|
* Transmitter or a Receiver.
|
575 |
|
|
* This parameter can be one of the following values
|
576 |
|
|
* - I2C_Direction_Transmitter: Transmitter mode
|
577 |
|
|
* - I2C_Direction_Receiver: Receiver mode
|
578 |
|
|
* Output : None
|
579 |
|
|
* Return : None.
|
580 |
|
|
*******************************************************************************/
|
581 |
|
|
void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, u8 Address, u8 I2C_Direction)
|
582 |
|
|
{
|
583 |
|
|
/* Check the parameters */
|
584 |
|
|
assert(IS_I2C_DIRECTION(I2C_Direction));
|
585 |
|
|
|
586 |
|
|
/* Test on the direction to set/reset the read/write bit */
|
587 |
|
|
if (I2C_Direction != I2C_Direction_Transmitter)
|
588 |
|
|
{
|
589 |
|
|
/* Set the address ADD0 bit0 for read */
|
590 |
|
|
Address |= OAR1_ADD0_Set;
|
591 |
|
|
}
|
592 |
|
|
else
|
593 |
|
|
{
|
594 |
|
|
/* Reset the address bit0 for write */
|
595 |
|
|
Address &= OAR1_ADD0_Reset;
|
596 |
|
|
}
|
597 |
|
|
/* Send the address */
|
598 |
|
|
I2Cx->DR = Address;
|
599 |
|
|
}
|
600 |
|
|
|
601 |
|
|
/*******************************************************************************
|
602 |
|
|
* Function Name : I2C_ReadRegister
|
603 |
|
|
* Description : Reads the specified I2C register and returns its value.
|
604 |
|
|
* Input1 : - I2C_Register: specifies the register to read.
|
605 |
|
|
* This parameter can be one of the following values:
|
606 |
|
|
* - I2C_Register_CR1: CR1 register.
|
607 |
|
|
* - I2C_Register_CR2: CR2 register.
|
608 |
|
|
* - I2C_Register_OAR1: OAR1 register.
|
609 |
|
|
* - I2C_Register_OAR2: OAR2 register.
|
610 |
|
|
* - I2C_Register_DR: DR register.
|
611 |
|
|
* - I2C_Register_SR1: SR1 register.
|
612 |
|
|
* - I2C_Register_SR2: SR2 register.
|
613 |
|
|
* - I2C_Register_CCR: CCR register.
|
614 |
|
|
* - I2C_Register_TRISE: TRISE register.
|
615 |
|
|
* Output : None
|
616 |
|
|
* Return : The value of the read register.
|
617 |
|
|
*******************************************************************************/
|
618 |
|
|
u16 I2C_ReadRegister(I2C_TypeDef* I2Cx, u8 I2C_Register)
|
619 |
|
|
{
|
620 |
|
|
/* Check the parameters */
|
621 |
|
|
assert(IS_I2C_REGISTER(I2C_Register));
|
622 |
|
|
|
623 |
|
|
/* Return the selected register value */
|
624 |
|
|
return (*(u16 *)(*((u32 *)&I2Cx) + I2C_Register));
|
625 |
|
|
}
|
626 |
|
|
|
627 |
|
|
/*******************************************************************************
|
628 |
|
|
* Function Name : I2C_SoftwareResetCmd
|
629 |
|
|
* Description : Enables or disables the specified I2C software reset.
|
630 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
631 |
|
|
* - NewState: new state of the I2C software reset.
|
632 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
633 |
|
|
* Output : None
|
634 |
|
|
* Return : None
|
635 |
|
|
*******************************************************************************/
|
636 |
|
|
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
637 |
|
|
{
|
638 |
|
|
/* Check the parameters */
|
639 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
640 |
|
|
|
641 |
|
|
if (NewState != DISABLE)
|
642 |
|
|
{
|
643 |
|
|
/* Peripheral under reset */
|
644 |
|
|
I2Cx->CR1 |= CR1_SWRST_Set;
|
645 |
|
|
}
|
646 |
|
|
else
|
647 |
|
|
{
|
648 |
|
|
/* Peripheral not under reset */
|
649 |
|
|
I2Cx->CR1 &= CR1_SWRST_Reset;
|
650 |
|
|
}
|
651 |
|
|
}
|
652 |
|
|
|
653 |
|
|
/*******************************************************************************
|
654 |
|
|
* Function Name : I2C_SMBusAlertConfig
|
655 |
|
|
* Description : Drives the SMBusAlert pin high or low for the specified I2C.
|
656 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
657 |
|
|
* - I2C_SMBusAlert: specifies SMBAlert pin level.
|
658 |
|
|
* This parameter can be one of the following values:
|
659 |
|
|
* - I2C_SMBusAlert_Low: SMBAlert pin driven low
|
660 |
|
|
* - I2C_SMBusAlert_High: SMBAlert pin driven high
|
661 |
|
|
* Output : None
|
662 |
|
|
* Return : None
|
663 |
|
|
*******************************************************************************/
|
664 |
|
|
void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, u16 I2C_SMBusAlert)
|
665 |
|
|
{
|
666 |
|
|
/* Check the parameters */
|
667 |
|
|
assert(IS_I2C_SMBUS_ALERT(I2C_SMBusAlert));
|
668 |
|
|
|
669 |
|
|
if (I2C_SMBusAlert == I2C_SMBusAlert_Low)
|
670 |
|
|
{
|
671 |
|
|
/* Drive the SMBusAlert pin Low */
|
672 |
|
|
I2Cx->CR1 |= I2C_SMBusAlert_Low;
|
673 |
|
|
}
|
674 |
|
|
else
|
675 |
|
|
{
|
676 |
|
|
/* Drive the SMBusAlert pin High */
|
677 |
|
|
I2Cx->CR1 &= I2C_SMBusAlert_High;
|
678 |
|
|
}
|
679 |
|
|
}
|
680 |
|
|
|
681 |
|
|
/*******************************************************************************
|
682 |
|
|
* Function Name : I2C_TransmitPEC
|
683 |
|
|
* Description : Enables the specified I2C PEC transfer.
|
684 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
685 |
|
|
* Output : None
|
686 |
|
|
* Return : None
|
687 |
|
|
*******************************************************************************/
|
688 |
|
|
void I2C_TransmitPEC(I2C_TypeDef* I2Cx)
|
689 |
|
|
{
|
690 |
|
|
/* Enable the selected I2C PEC transmission */
|
691 |
|
|
I2Cx->CR1 |= CR1_PEC_Set;
|
692 |
|
|
}
|
693 |
|
|
|
694 |
|
|
/*******************************************************************************
|
695 |
|
|
* Function Name : I2C_PECPositionConfig
|
696 |
|
|
* Description : Selects the specified I2C PEC position.
|
697 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
698 |
|
|
* - I2C_PECPosition: specifies the PEC position.
|
699 |
|
|
* This parameter can be one of the following values:
|
700 |
|
|
* - I2C_PECPosition_Next: PEC bit indicates that current
|
701 |
|
|
* byte is PEC
|
702 |
|
|
* - I2C_PECPosition_Current: PEC bit indicates that the
|
703 |
|
|
* next byte is PEC
|
704 |
|
|
* Output : None
|
705 |
|
|
* Return : None
|
706 |
|
|
*******************************************************************************/
|
707 |
|
|
void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, u16 I2C_PECPosition)
|
708 |
|
|
{
|
709 |
|
|
/* Check the parameters */
|
710 |
|
|
assert(IS_I2C_PEC_POSITION(I2C_PECPosition));
|
711 |
|
|
|
712 |
|
|
if (I2C_PECPosition == I2C_PECPosition_Next)
|
713 |
|
|
{
|
714 |
|
|
/* PEC indicates that the next byte in shift register is PEC */
|
715 |
|
|
I2Cx->CR1 |= I2C_PECPosition_Next;
|
716 |
|
|
}
|
717 |
|
|
else
|
718 |
|
|
{
|
719 |
|
|
/* PEC indicates that the current byte in shift register is PEC */
|
720 |
|
|
I2Cx->CR1 &= I2C_PECPosition_Current;
|
721 |
|
|
}
|
722 |
|
|
}
|
723 |
|
|
|
724 |
|
|
/*******************************************************************************
|
725 |
|
|
* Function Name : I2C_CalculatePEC
|
726 |
|
|
* Description : Enables or disables the PEC value calculation of the
|
727 |
|
|
* transfered bytes.
|
728 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
729 |
|
|
* - NewState: new state of the I2Cx PEC value calculation.
|
730 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
731 |
|
|
* Output : None
|
732 |
|
|
* Return : None
|
733 |
|
|
*******************************************************************************/
|
734 |
|
|
void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
735 |
|
|
{
|
736 |
|
|
/* Check the parameters */
|
737 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
738 |
|
|
|
739 |
|
|
if (NewState != DISABLE)
|
740 |
|
|
{
|
741 |
|
|
/* Enable the selected I2C PEC calculation */
|
742 |
|
|
I2Cx->CR1 |= CR1_ENPEC_Set;
|
743 |
|
|
}
|
744 |
|
|
else
|
745 |
|
|
{
|
746 |
|
|
/* Disable the selected I2C PEC calculation */
|
747 |
|
|
I2Cx->CR1 &= CR1_ENPEC_Reset;
|
748 |
|
|
}
|
749 |
|
|
}
|
750 |
|
|
|
751 |
|
|
/*******************************************************************************
|
752 |
|
|
* Function Name : I2C_GetPEC
|
753 |
|
|
* Description : Returns the PEC value for the specified I2C.
|
754 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
755 |
|
|
* Output : None
|
756 |
|
|
* Return : The PEC value.
|
757 |
|
|
*******************************************************************************/
|
758 |
|
|
u8 I2C_GetPEC(I2C_TypeDef* I2Cx)
|
759 |
|
|
{
|
760 |
|
|
u8 pec;
|
761 |
|
|
|
762 |
|
|
/* Get the PEC value */
|
763 |
|
|
pec = (I2Cx->SR2) >> 8;
|
764 |
|
|
/* Return the selected I2C PEC register value */
|
765 |
|
|
return pec;
|
766 |
|
|
}
|
767 |
|
|
|
768 |
|
|
/*******************************************************************************
|
769 |
|
|
* Function Name : I2C_ARPCmd
|
770 |
|
|
* Description : Enables or disables the specified I2C ARP.
|
771 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
772 |
|
|
* - NewState: new state of the I2Cx ARP.
|
773 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
774 |
|
|
* Output : None
|
775 |
|
|
* Return : None
|
776 |
|
|
*******************************************************************************/
|
777 |
|
|
void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
778 |
|
|
{
|
779 |
|
|
/* Check the parameters */
|
780 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
781 |
|
|
|
782 |
|
|
if (NewState != DISABLE)
|
783 |
|
|
{
|
784 |
|
|
/* Enable the selected I2C ARP */
|
785 |
|
|
I2Cx->CR1 |= CR1_ENARP_Set;
|
786 |
|
|
}
|
787 |
|
|
else
|
788 |
|
|
{
|
789 |
|
|
/* Disable the selected I2C ARP */
|
790 |
|
|
I2Cx->CR1 &= CR1_ENARP_Reset;
|
791 |
|
|
}
|
792 |
|
|
}
|
793 |
|
|
|
794 |
|
|
/*******************************************************************************
|
795 |
|
|
* Function Name : I2C_StretchClockCmd
|
796 |
|
|
* Description : Enables or disables the specified I2C Clock stretching.
|
797 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
798 |
|
|
* - NewState: new state of the I2Cx Clock stretching.
|
799 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
800 |
|
|
* Output : None
|
801 |
|
|
* Return : None
|
802 |
|
|
*******************************************************************************/
|
803 |
|
|
void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
|
804 |
|
|
{
|
805 |
|
|
/* Check the parameters */
|
806 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
807 |
|
|
|
808 |
|
|
if (NewState == DISABLE)
|
809 |
|
|
{
|
810 |
|
|
/* Enable the selected I2C Clock stretching */
|
811 |
|
|
I2Cx->CR1 |= CR1_NOSTRETCH_Set;
|
812 |
|
|
}
|
813 |
|
|
else
|
814 |
|
|
{
|
815 |
|
|
/* Disable the selected I2C Clock stretching */
|
816 |
|
|
I2Cx->CR1 &= CR1_NOSTRETCH_Reset;
|
817 |
|
|
}
|
818 |
|
|
}
|
819 |
|
|
|
820 |
|
|
/*******************************************************************************
|
821 |
|
|
* Function Name : I2C_FastModeDutyCycleConfig
|
822 |
|
|
* Description : Selects the specified I2C fast mode duty cycle.
|
823 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
824 |
|
|
* - I2C_DutyCycle: specifies the fast mode duty cycle.
|
825 |
|
|
* This parameter can be one of the following values:
|
826 |
|
|
* - I2C_DutyCycle_2: I2C fast mode Tlow/Thigh = 2
|
827 |
|
|
* - I2C_DutyCycle_16_9: I2C fast mode Tlow/Thigh = 16/9
|
828 |
|
|
* Output : None
|
829 |
|
|
* Return : None
|
830 |
|
|
*******************************************************************************/
|
831 |
|
|
void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, u16 I2C_DutyCycle)
|
832 |
|
|
{
|
833 |
|
|
/* Check the parameters */
|
834 |
|
|
assert(IS_I2C_DUTY_CYCLE(I2C_DutyCycle));
|
835 |
|
|
|
836 |
|
|
if (I2C_DutyCycle != I2C_DutyCycle_16_9)
|
837 |
|
|
{
|
838 |
|
|
/* I2C fast mode Tlow/Thigh=2 */
|
839 |
|
|
I2Cx->CCR &= I2C_DutyCycle_2;
|
840 |
|
|
}
|
841 |
|
|
else
|
842 |
|
|
{
|
843 |
|
|
/* I2C fast mode Tlow/Thigh=16/9 */
|
844 |
|
|
I2Cx->CCR |= I2C_DutyCycle_16_9;
|
845 |
|
|
}
|
846 |
|
|
}
|
847 |
|
|
|
848 |
|
|
/*******************************************************************************
|
849 |
|
|
* Function Name : I2C_GetLastEvent
|
850 |
|
|
* Description : Returns the Last I2C Event.
|
851 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
852 |
|
|
* Output : None
|
853 |
|
|
* Return : The last event
|
854 |
|
|
*******************************************************************************/
|
855 |
|
|
u32 I2C_GetLastEvent(I2C_TypeDef* I2Cx)
|
856 |
|
|
{
|
857 |
|
|
u32 LastEvent = 0;
|
858 |
|
|
u32 Flag1 = 0, Flag2 = 0;
|
859 |
|
|
|
860 |
|
|
Flag1 = I2Cx->SR1;
|
861 |
|
|
Flag2 = I2Cx->SR2;
|
862 |
|
|
Flag2 = Flag2 << 16;
|
863 |
|
|
|
864 |
|
|
/* Get the last event value from I2C status register */
|
865 |
|
|
LastEvent = (Flag1 | Flag2) & I2C_FLAG_Mask;
|
866 |
|
|
|
867 |
|
|
/* Return status */
|
868 |
|
|
return LastEvent;
|
869 |
|
|
}
|
870 |
|
|
|
871 |
|
|
/*******************************************************************************
|
872 |
|
|
* Function Name : I2C_CheckEvent
|
873 |
|
|
* Description : Checks whether the Last I2C Event is equal to the one passed
|
874 |
|
|
* as parameter.
|
875 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
876 |
|
|
* - I2C_EVENT: specifies the event to be checked.
|
877 |
|
|
* This parameter can be one of the following values:
|
878 |
|
|
* - I2C_EVENT_SLAVE_ADDRESS_MATCHED : EV1
|
879 |
|
|
* - I2C_EVENT_SLAVE_BYTE_RECEIVED : EV2
|
880 |
|
|
* - I2C_EVENT_SLAVE_BYTE_TRANSMITTED : EV3
|
881 |
|
|
* - I2C_EVENT_SLAVE_ACK_FAILURE : EV3-1
|
882 |
|
|
* - I2C_EVENT_MASTER_MODE_SELECT : EV5
|
883 |
|
|
* - I2C_EVENT_MASTER_MODE_SELECTED : EV6
|
884 |
|
|
* - I2C_EVENT_MASTER_BYTE_RECEIVED : EV7
|
885 |
|
|
* - I2C_EVENT_MASTER_BYTE_TRANSMITTED : EV8
|
886 |
|
|
* - I2C_EVENT_MASTER_MODE_ADDRESS10 : EV9
|
887 |
|
|
* - I2C_EVENT_SLAVE_STOP_DETECTED : EV4
|
888 |
|
|
* Output : None
|
889 |
|
|
* Return : An ErrorStatus enumuration value:
|
890 |
|
|
* - SUCCESS: Last event is equal to the I2C_Event
|
891 |
|
|
* - ERROR: Last event is different from the I2C_Event
|
892 |
|
|
*******************************************************************************/
|
893 |
|
|
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, u32 I2C_EVENT)
|
894 |
|
|
{
|
895 |
|
|
u32 LastEvent = 0;
|
896 |
|
|
u32 Flag1 = 0, Flag2 = 0;
|
897 |
|
|
ErrorStatus status = ERROR;
|
898 |
|
|
|
899 |
|
|
/* Check the parameters */
|
900 |
|
|
assert(IS_I2C_EVENT(I2C_EVENT));
|
901 |
|
|
|
902 |
|
|
Flag1 = I2Cx->SR1;
|
903 |
|
|
Flag2 = I2Cx->SR2;
|
904 |
|
|
Flag2 = Flag2 << 16;
|
905 |
|
|
|
906 |
|
|
/* Get the last event value from I2C status register */
|
907 |
|
|
LastEvent = (Flag1 | Flag2) & I2C_FLAG_Mask;
|
908 |
|
|
|
909 |
|
|
/* Check whether the last event is equal to I2C_EVENT */
|
910 |
|
|
if (LastEvent == I2C_EVENT )
|
911 |
|
|
{
|
912 |
|
|
/* SUCCESS: last event is equal to I2C_EVENT */
|
913 |
|
|
status = SUCCESS;
|
914 |
|
|
}
|
915 |
|
|
else
|
916 |
|
|
{
|
917 |
|
|
/* ERROR: last event is different from I2C_EVENT */
|
918 |
|
|
status = ERROR;
|
919 |
|
|
}
|
920 |
|
|
|
921 |
|
|
/* Return status */
|
922 |
|
|
return status;
|
923 |
|
|
}
|
924 |
|
|
|
925 |
|
|
/*******************************************************************************
|
926 |
|
|
* Function Name : I2C_GetFlagStatus
|
927 |
|
|
* Description : Checks whether the specified I2C flag is set or not.
|
928 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
929 |
|
|
* - I2C_FLAG: specifies the flag to check.
|
930 |
|
|
* This parameter can be one of the following values:
|
931 |
|
|
* - I2C_FLAG_DUALF: Dual flag (Slave mode)
|
932 |
|
|
* - I2C_FLAG_SMBHOST: SMBus host header (Slave mode)
|
933 |
|
|
* - I2C_FLAG_SMBDEFAULT: SMBus default header (Slave mode)
|
934 |
|
|
* - I2C_FLAG_GENCALL: General call header flag (Slave mode)
|
935 |
|
|
* - I2C_FLAG_TRA: Transmitter/Receiver flag
|
936 |
|
|
* - I2C_FLAG_BUSY: Bus busy flag
|
937 |
|
|
* - I2C_FLAG_MSL: Master/Slave flag
|
938 |
|
|
* - I2C_FLAG_SMBALERT: SMBus Alert flag
|
939 |
|
|
* - I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
|
940 |
|
|
* - I2C_FLAG_PECERR: PEC error in reception flag
|
941 |
|
|
* - I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
|
942 |
|
|
* - I2C_FLAG_AF: Acknowledge failure flag
|
943 |
|
|
* - I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
|
944 |
|
|
* - I2C_FLAG_BERR: Bus error flag
|
945 |
|
|
* - I2C_FLAG_TXE: Data register empty flag (Transmitter)
|
946 |
|
|
* - I2C_FLAG_RXNE: Data register not empty (Receiver) flag
|
947 |
|
|
* - I2C_FLAG_STOPF: Stop detection flag (Slave mode)
|
948 |
|
|
* - I2C_FLAG_ADD10: 10-bit header sent flag (Master mode)
|
949 |
|
|
* - I2C_FLAG_BTF: Byte transfer finished flag
|
950 |
|
|
* - I2C_FLAG_ADDR: Address sent flag (Master mode) “ADSL”
|
951 |
|
|
* Address matched flag (Slave mode)”ENDAD”
|
952 |
|
|
* - I2C_FLAG_SB: Start bit flag (Master mode)
|
953 |
|
|
* Output : None
|
954 |
|
|
* Return : The new state of I2C_FLAG (SET or RESET).
|
955 |
|
|
*******************************************************************************/
|
956 |
|
|
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, u32 I2C_FLAG)
|
957 |
|
|
{
|
958 |
|
|
FlagStatus bitstatus = RESET;
|
959 |
|
|
u32 i2cstatus = 0;
|
960 |
|
|
u32 Flag1 = 0, Flag2 = 0;
|
961 |
|
|
|
962 |
|
|
/* Check the parameters */
|
963 |
|
|
assert(IS_I2C_GET_FLAG(I2C_FLAG));
|
964 |
|
|
|
965 |
|
|
/* Read the I2Cx status register */
|
966 |
|
|
Flag1 = I2Cx->SR1;
|
967 |
|
|
Flag2 = I2Cx->SR2;
|
968 |
|
|
Flag2 = (Flag2 & I2C_FLAG_Mask) << 16;
|
969 |
|
|
|
970 |
|
|
/* Get the I2C status value */
|
971 |
|
|
i2cstatus = Flag1 | Flag2;
|
972 |
|
|
|
973 |
|
|
/* Get bit[27:0] of the flag */
|
974 |
|
|
I2C_FLAG &= I2C_FLAG_Mask;
|
975 |
|
|
|
976 |
|
|
/* Check the status of the specified I2C flag */
|
977 |
|
|
if ((i2cstatus & I2C_FLAG) != (u32)RESET)
|
978 |
|
|
{
|
979 |
|
|
/* I2C_FLAG is set */
|
980 |
|
|
bitstatus = SET;
|
981 |
|
|
}
|
982 |
|
|
else
|
983 |
|
|
{
|
984 |
|
|
/* I2C_FLAG is reset */
|
985 |
|
|
bitstatus = RESET;
|
986 |
|
|
}
|
987 |
|
|
/* Return the I2C_FLAG status */
|
988 |
|
|
return bitstatus;
|
989 |
|
|
}
|
990 |
|
|
|
991 |
|
|
/*******************************************************************************
|
992 |
|
|
* Function Name : I2C_ClearFlag
|
993 |
|
|
* Description : Clears the I2Cx's pending flags.
|
994 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
995 |
|
|
* - I2C_FLAG: specifies the flag to clear.
|
996 |
|
|
* This parameter can be one of the following values:
|
997 |
|
|
* - I2C_FLAG_SMBALERT: SMBus Alert flag
|
998 |
|
|
* - I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
|
999 |
|
|
* - I2C_FLAG_PECERR: PEC error in reception flag
|
1000 |
|
|
* - I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
|
1001 |
|
|
* - I2C_FLAG_AF: Acknowledge failure flag
|
1002 |
|
|
* - I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
|
1003 |
|
|
* - I2C_FLAG_BERR: Bus error flag
|
1004 |
|
|
* - I2C_FLAG_STOPF: Stop detection flag (Slave mode)
|
1005 |
|
|
* - I2C_FLAG_ADD10: 10-bit header sent flag (Master mode)
|
1006 |
|
|
* - I2C_FLAG_BTF: Byte transfer finished flag
|
1007 |
|
|
* - I2C_FLAG_ADDR: Address sent flag (Master mode) “ADSL”
|
1008 |
|
|
* Address matched flag (Slave mode)”ENDAD”
|
1009 |
|
|
* - I2C_FLAG_SB: Start bit flag (Master mode)
|
1010 |
|
|
* Output : None
|
1011 |
|
|
* Return : None
|
1012 |
|
|
*******************************************************************************/
|
1013 |
|
|
void I2C_ClearFlag(I2C_TypeDef* I2Cx, u32 I2C_FLAG)
|
1014 |
|
|
{
|
1015 |
|
|
u32 flagpos = 0;
|
1016 |
|
|
u8 flagindex = 0;
|
1017 |
|
|
|
1018 |
|
|
/* Check the parameters */
|
1019 |
|
|
assert(IS_I2C_CLEAR_FLAG(I2C_FLAG));
|
1020 |
|
|
|
1021 |
|
|
/* Get the I2C flag position */
|
1022 |
|
|
flagpos = I2C_FLAG & I2C_FLAG_Mask;
|
1023 |
|
|
|
1024 |
|
|
/* Get the I2C flag index */
|
1025 |
|
|
flagindex = I2C_FLAG >> 28;
|
1026 |
|
|
|
1027 |
|
|
/* Clear the flag by writing 0 */
|
1028 |
|
|
if (flagindex == 1)
|
1029 |
|
|
{
|
1030 |
|
|
/* Clear the selected I2C flag */
|
1031 |
|
|
I2Cx->SR1 &= ~flagpos;
|
1032 |
|
|
}
|
1033 |
|
|
/* Flags that need a read of the SR1 register to be cleared */
|
1034 |
|
|
else if (flagindex == 2)
|
1035 |
|
|
{
|
1036 |
|
|
/* Read the SR1 register */
|
1037 |
|
|
(void)I2Cx->SR1;
|
1038 |
|
|
}
|
1039 |
|
|
/* Flags that need a read of SR1 and a write on CR2 registers to be cleared */
|
1040 |
|
|
else if (flagindex == 6)
|
1041 |
|
|
{
|
1042 |
|
|
/* Read the SR1 register */
|
1043 |
|
|
(void)I2Cx->SR1;
|
1044 |
|
|
|
1045 |
|
|
/* Write on the CR1 register */
|
1046 |
|
|
I2Cx->CR1 |= CR1_PE_Set;
|
1047 |
|
|
}
|
1048 |
|
|
/* Flags that need a read of SR1 and a write on CR2 registers to be cleared */
|
1049 |
|
|
else /*flagindex == 0xA*/
|
1050 |
|
|
{
|
1051 |
|
|
/* Read the SR1 register */
|
1052 |
|
|
(void)I2Cx->SR1;
|
1053 |
|
|
|
1054 |
|
|
/* Read the SR2 register */
|
1055 |
|
|
(void)I2Cx->SR2;
|
1056 |
|
|
}
|
1057 |
|
|
}
|
1058 |
|
|
|
1059 |
|
|
/*******************************************************************************
|
1060 |
|
|
* Function Name : I2C_GetITStatus
|
1061 |
|
|
* Description : Checks whether the specified I2C interrupt has occurred or not.
|
1062 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
1063 |
|
|
* - I2C_IT: specifies the interrupt source to check.
|
1064 |
|
|
* This parameter can be one of the following values:
|
1065 |
|
|
* - I2C_IT_SMBALERT: SMBus Alert flag
|
1066 |
|
|
* - I2C_IT_TIMEOUT: Timeout or Tlow error flag
|
1067 |
|
|
* - I2C_IT_PECERR: PEC error in reception flag
|
1068 |
|
|
* - I2C_IT_OVR: Overrun/Underrun flag (Slave mode)
|
1069 |
|
|
* - I2C_IT_AF: Acknowledge failure flag
|
1070 |
|
|
* - I2C_IT_ARLO: Arbitration lost flag (Master mode)
|
1071 |
|
|
* - I2C_IT_BERR: Bus error flag
|
1072 |
|
|
* - I2C_IT_TXE: Data register empty flag (Transmitter)
|
1073 |
|
|
* - I2C_IT_RXNE: Data register not empty (Receiver) flag
|
1074 |
|
|
* - I2C_IT_STOPF: Stop detection flag (Slave mode)
|
1075 |
|
|
* - I2C_IT_ADD10: 10-bit header sent flag (Master mode)
|
1076 |
|
|
* - I2C_IT_BTF: Byte transfer finished flag
|
1077 |
|
|
* - I2C_IT_ADDR: Address sent flag (Master mode) “ADSL”
|
1078 |
|
|
* Address matched flag (Slave mode)”ENDAD”
|
1079 |
|
|
* - I2C_IT_SB: Start bit flag (Master mode)
|
1080 |
|
|
* Output : None
|
1081 |
|
|
* Return : The new state of I2C_IT (SET or RESET).
|
1082 |
|
|
*******************************************************************************/
|
1083 |
|
|
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, u32 I2C_IT)
|
1084 |
|
|
{
|
1085 |
|
|
ITStatus bitstatus = RESET;
|
1086 |
|
|
u32 i2cstatus = 0;
|
1087 |
|
|
u32 Flag1 = 0, Flag2 = 0;
|
1088 |
|
|
|
1089 |
|
|
/* Check the parameters */
|
1090 |
|
|
assert(IS_I2C_GET_IT(I2C_IT));
|
1091 |
|
|
|
1092 |
|
|
/* Read the I2Cx status register */
|
1093 |
|
|
Flag1 = I2Cx->SR1;
|
1094 |
|
|
Flag2 = I2Cx->SR2;
|
1095 |
|
|
Flag2 = (Flag2 & I2C_FLAG_Mask) << 16;
|
1096 |
|
|
|
1097 |
|
|
/* Get the I2C status value */
|
1098 |
|
|
i2cstatus = Flag1 | Flag2;
|
1099 |
|
|
|
1100 |
|
|
/* Get bit[27:0] of the flag */
|
1101 |
|
|
I2C_IT &= I2C_FLAG_Mask;
|
1102 |
|
|
|
1103 |
|
|
/* Check the status of the specified I2C flag */
|
1104 |
|
|
if ((i2cstatus & I2C_IT) != (u32)RESET)
|
1105 |
|
|
{
|
1106 |
|
|
/* I2C_IT is set */
|
1107 |
|
|
bitstatus = SET;
|
1108 |
|
|
}
|
1109 |
|
|
else
|
1110 |
|
|
{
|
1111 |
|
|
/* I2C_IT is reset */
|
1112 |
|
|
bitstatus = RESET;
|
1113 |
|
|
}
|
1114 |
|
|
/* Return the I2C_IT status */
|
1115 |
|
|
return bitstatus;
|
1116 |
|
|
}
|
1117 |
|
|
|
1118 |
|
|
/*******************************************************************************
|
1119 |
|
|
* Function Name : I2C_ClearITPendingBit
|
1120 |
|
|
* Description : Clears the I2Cx’s interrupt pending bits.
|
1121 |
|
|
* Input : - I2Cx: where x can be 1 or 2 to select the I2C peripheral.
|
1122 |
|
|
* - I2C_IT: specifies the interrupt pending to clear.
|
1123 |
|
|
* This parameter can be one of the following values:
|
1124 |
|
|
* - I2C_IT_SMBALERT: SMBus Alert flag
|
1125 |
|
|
* - I2C_IT_TIMEOUT: Timeout or Tlow error flag
|
1126 |
|
|
* - I2C_IT_PECERR: PEC error in reception flag
|
1127 |
|
|
* - I2C_IT_OVR: Overrun/Underrun flag (Slave mode)
|
1128 |
|
|
* - I2C_IT_AF: Acknowledge failure flag
|
1129 |
|
|
* - I2C_IT_ARLO: Arbitration lost flag (Master mode)
|
1130 |
|
|
* - I2C_IT_BERR: Bus error flag
|
1131 |
|
|
* - I2C_IT_STOPF: Stop detection flag (Slave mode)
|
1132 |
|
|
* - I2C_IT_ADD10: 10-bit header sent flag (Master mode)
|
1133 |
|
|
* - I2C_IT_BTF: Byte transfer finished flag
|
1134 |
|
|
* - I2C_IT_ADDR: Address sent flag (Master mode) “ADSL”
|
1135 |
|
|
* Address matched flag (Slave mode)”ENDAD”
|
1136 |
|
|
* - I2C_IT_SB: Start bit flag (Master mode)
|
1137 |
|
|
* Output : None
|
1138 |
|
|
* Return : None
|
1139 |
|
|
*******************************************************************************/
|
1140 |
|
|
void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, u32 I2C_IT)
|
1141 |
|
|
{
|
1142 |
|
|
u32 flagpos = 0;
|
1143 |
|
|
u8 flagindex = 0;
|
1144 |
|
|
|
1145 |
|
|
/* Check the parameters */
|
1146 |
|
|
assert(IS_I2C_CLEAR_IT(I2C_IT));
|
1147 |
|
|
|
1148 |
|
|
/* Get the I2C flag position */
|
1149 |
|
|
flagpos = I2C_IT & I2C_FLAG_Mask;
|
1150 |
|
|
|
1151 |
|
|
/* Get the I2C flag index */
|
1152 |
|
|
flagindex = I2C_IT >> 28;
|
1153 |
|
|
|
1154 |
|
|
/* Clear the flag by writing 0 */
|
1155 |
|
|
if (flagindex == 1)
|
1156 |
|
|
{
|
1157 |
|
|
/* Clear the selected I2C flag */
|
1158 |
|
|
I2Cx->SR1 &= ~flagpos;
|
1159 |
|
|
}
|
1160 |
|
|
/* Flags that need a read of the SR1 register to be cleared */
|
1161 |
|
|
else if (flagindex == 2)
|
1162 |
|
|
{
|
1163 |
|
|
/* Read the SR1 register */
|
1164 |
|
|
(void)I2Cx->SR1;
|
1165 |
|
|
}
|
1166 |
|
|
/* Flags that need a read of SR1 and a write on CR2 registers to be cleared */
|
1167 |
|
|
else if (flagindex == 6)
|
1168 |
|
|
{
|
1169 |
|
|
/* Read the SR1 register */
|
1170 |
|
|
(void)I2Cx->SR1;
|
1171 |
|
|
|
1172 |
|
|
/* Write on the CR1 register */
|
1173 |
|
|
I2Cx->CR1 |= CR1_PE_Set;
|
1174 |
|
|
}
|
1175 |
|
|
/* Flags that need a read of SR1 and a write on CR2 registers to be cleared */
|
1176 |
|
|
else /*flagindex == 0xA*/
|
1177 |
|
|
{
|
1178 |
|
|
/* Read the SR1 register */
|
1179 |
|
|
(void)I2Cx->SR1;
|
1180 |
|
|
|
1181 |
|
|
/* Read the SR2 register */
|
1182 |
|
|
(void)I2Cx->SR2;
|
1183 |
|
|
}
|
1184 |
|
|
}
|
1185 |
|
|
|
1186 |
|
|
/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/
|