OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_STM32F103_Keil/] [STM32F10xFWLib/] [inc/] [stm32f10x_spi.h] - Blame information for rev 582

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 582 jeremybenn
/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2
* File Name          : stm32f10x_spi.h
3
* Author             : MCD Application Team
4
* Date First Issued  : 09/29/2006
5
* Description        : This file contains all the functions prototypes for the
6
*                      SPI firmware library.
7
********************************************************************************
8
* History:
9
* 04/02/2007: V0.2
10
* 02/05/2007: V0.1
11
* 09/29/2006: V0.01
12
********************************************************************************
13
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
15
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
16
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
17
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
18
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19
*******************************************************************************/
20
 
21
/* Define to prevent recursive inclusion -------------------------------------*/
22
#ifndef __STM32F10x_SPI_H
23
#define __STM32F10x_SPI_H
24
 
25
/* Includes ------------------------------------------------------------------*/
26
#include "stm32f10x_map.h"
27
 
28
/* Exported types ------------------------------------------------------------*/
29
/* SPI Init structure definition */
30
typedef struct
31
{
32
  u16 SPI_Direction;
33
  u16 SPI_Mode;
34
  u16 SPI_DataSize;
35
  u16 SPI_CPOL;
36
  u16 SPI_CPHA;
37
  u16 SPI_NSS;
38
  u16 SPI_BaudRatePrescaler;
39
  u16 SPI_FirstBit;
40
  u16 SPI_CRCPolynomial;
41
}SPI_InitTypeDef;
42
 
43
/* Exported constants --------------------------------------------------------*/
44
/* SPI data direction mode */
45
#define SPI_Direction_2Lines_FullDuplex    ((u16)0x0000)
46
#define SPI_Direction_2Lines_RxOnly        ((u16)0x0400)
47
#define SPI_Direction_1Line_Rx             ((u16)0x8000)
48
#define SPI_Direction_1Line_Tx             ((u16)0xC000)
49
 
50
#define IS_SPI_DIRECTION_MODE(MODE) ((MODE == SPI_Direction_2Lines_FullDuplex) || \
51
                                     (MODE == SPI_Direction_2Lines_RxOnly) || \
52
                                     (MODE == SPI_Direction_1Line_Rx) || \
53
                                                             (MODE == SPI_Direction_1Line_Tx))
54
 
55
/* SPI master/slave mode */
56
#define SPI_Mode_Master                    ((u16)0x0104)
57
#define SPI_Mode_Slave                     ((u16)0x0000)
58
 
59
#define IS_SPI_MODE(MODE) ((MODE == SPI_Mode_Master) || \
60
                           (MODE == SPI_Mode_Slave))
61
 
62
/* SPI data size */
63
#define SPI_DataSize_16b                   ((u16)0x0800)
64
#define SPI_DataSize_8b                    ((u16)0x0000)
65
 
66
#define IS_SPI_DATASIZE(DATASIZE) ((DATASIZE == SPI_DataSize_16b) || \
67
                                   (DATASIZE == SPI_DataSize_8b))
68
 
69
/* SPI Clock Polarity */
70
#define SPI_CPOL_Low                       ((u16)0x0000)
71
#define SPI_CPOL_High                      ((u16)0x0002)
72
 
73
#define IS_SPI_CPOL(CPOL) ((CPOL == SPI_CPOL_Low) || \
74
                           (CPOL == SPI_CPOL_High))
75
 
76
/* SPI Clock Phase */
77
#define SPI_CPHA_1Edge                     ((u16)0x0000)
78
#define SPI_CPHA_2Edge                     ((u16)0x0001)
79
 
80
#define IS_SPI_CPHA(CPHA) ((CPHA == SPI_CPHA_1Edge) || \
81
                           (CPHA == SPI_CPHA_2Edge))
82
 
83
/* SPI Slave Select management */
84
#define SPI_NSS_Soft                       ((u16)0x0200)
85
#define SPI_NSS_Hard                       ((u16)0x0000)
86
 
87
#define IS_SPI_NSS(NSS) ((NSS == SPI_NSS_Soft) || \
88
                         (NSS == SPI_NSS_Hard))
89
 
90
/* SPI BaudRate Prescaler  */
91
#define SPI_BaudRatePrescaler_2            ((u16)0x0000)
92
#define SPI_BaudRatePrescaler_4            ((u16)0x0008)
93
#define SPI_BaudRatePrescaler_8            ((u16)0x0010)
94
#define SPI_BaudRatePrescaler_16           ((u16)0x0018)
95
#define SPI_BaudRatePrescaler_32           ((u16)0x0020)
96
#define SPI_BaudRatePrescaler_64           ((u16)0x0028)
97
#define SPI_BaudRatePrescaler_128          ((u16)0x0030)
98
#define SPI_BaudRatePrescaler_256          ((u16)0x0038)
99
 
100
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) ((PRESCALER == SPI_BaudRatePrescaler_2) || \
101
                                              (PRESCALER == SPI_BaudRatePrescaler_4) || \
102
                                              (PRESCALER == SPI_BaudRatePrescaler_8) || \
103
                                              (PRESCALER == SPI_BaudRatePrescaler_16) || \
104
                                              (PRESCALER == SPI_BaudRatePrescaler_32) || \
105
                                              (PRESCALER == SPI_BaudRatePrescaler_64) || \
106
                                              (PRESCALER == SPI_BaudRatePrescaler_128) || \
107
                                              (PRESCALER == SPI_BaudRatePrescaler_256))
108
 
109
/* SPI MSB/LSB transmission */
110
#define SPI_FirstBit_MSB                   ((u16)0x0000)
111
#define SPI_FirstBit_LSB                   ((u16)0x0080)
112
 
113
#define IS_SPI_FIRST_BIT(BIT) ((BIT == SPI_FirstBit_MSB) || \
114
                               (BIT == SPI_FirstBit_LSB))
115
 
116
/* SPI DMA transfer requests */
117
#define SPI_DMAReq_Tx                      ((u16)0x0002)
118
#define SPI_DMAReq_Rx                      ((u16)0x0001)
119
 
120
#define IS_SPI_DMA_REQ(REQ) (((REQ & (u16)0xFFFC) == 0x00) && (REQ != 0x00))
121
 
122
/* SPI NSS internal software mangement */
123
#define SPI_NSSInternalSoft_Set            ((u16)0x0100)
124
#define SPI_NSSInternalSoft_Reset          ((u16)0xFEFF)
125
 
126
#define IS_SPI_NSS_INTERNAL(INTERNAL) ((INTERNAL == SPI_NSSInternalSoft_Set) || \
127
                                       (INTERNAL == SPI_NSSInternalSoft_Reset))
128
 
129
/* SPI CRC Transmit/Receive */
130
#define SPI_CRC_Tx                         ((u8)0x00)
131
#define SPI_CRC_Rx                         ((u8)0x01)
132
 
133
#define IS_SPI_CRC(CRC) ((CRC == SPI_CRC_Tx) || (CRC == SPI_CRC_Rx))
134
 
135
/* SPI direction transmit/receive */
136
#define SPI_Direction_Rx                   ((u16)0xBFFF)
137
#define SPI_Direction_Tx                   ((u16)0x4000)
138
 
139
#define IS_SPI_DIRECTION(DIRECTION) ((DIRECTION == SPI_Direction_Rx) || \
140
                                     (DIRECTION == SPI_Direction_Tx))
141
 
142
/* SPI interrupts definition */
143
#define SPI_IT_TXE                         ((u8)0x71)
144
#define SPI_IT_RXNE                        ((u8)0x60)
145
#define SPI_IT_ERR                         ((u8)0x50)
146
 
147
#define IS_SPI_CONFIG_IT(IT) ((IT == SPI_IT_TXE) || (IT == SPI_IT_RXNE) || \
148
                              (IT == SPI_IT_ERR))
149
 
150
#define SPI_IT_OVR                         ((u8)0x56)
151
#define SPI_IT_MODF                        ((u8)0x55)
152
#define SPI_IT_CRCERR                      ((u8)0x54)
153
 
154
#define IS_SPI_CLEAR_IT(IT) ((IT == SPI_IT_OVR) || (IT == SPI_IT_MODF) || \
155
                             (IT == SPI_IT_CRCERR))
156
 
157
#define IS_SPI_GET_IT(IT) ((IT == SPI_IT_TXE) || (IT == SPI_IT_RXNE) || \
158
                           (IT == SPI_IT_OVR) || (IT == SPI_IT_MODF) || \
159
                           (IT == SPI_IT_CRCERR))
160
 
161
/* SPI flags definition */
162
#define SPI_FLAG_RXNE                      ((u16)0x0001)
163
#define SPI_FLAG_TXE                       ((u16)0x0002)
164
#define SPI_FLAG_CRCERR                    ((u16)0x0010)
165
#define SPI_FLAG_MODF                      ((u16)0x0020)
166
#define SPI_FLAG_OVR                       ((u16)0x0040)
167
#define SPI_FLAG_BSY                       ((u16)0x0080)
168
 
169
#define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG & (u16)0xFF8F) == 0x00) && (FLAG != 0x00))
170
#define IS_SPI_GET_FLAG(FLAG) ((FLAG == SPI_FLAG_BSY) || (FLAG == SPI_FLAG_OVR) || \
171
                               (FLAG == SPI_FLAG_MODF) || (FLAG == SPI_FLAG_CRCERR) || \
172
                               (FLAG == SPI_FLAG_TXE) || (FLAG == SPI_FLAG_RXNE))
173
 
174
/* SPI CRC polynomial --------------------------------------------------------*/
175
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (POLYNOMIAL >= 0x1)
176
 
177
/* Exported macro ------------------------------------------------------------*/
178
/* Exported functions ------------------------------------------------------- */
179
void SPI_DeInit(SPI_TypeDef* SPIx);
180
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
181
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
182
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
183
void SPI_ITConfig(SPI_TypeDef* SPIx, u8 SPI_IT, FunctionalState NewState);
184
void SPI_DMACmd(SPI_TypeDef* SPIx, u16 SPI_DMAReq, FunctionalState NewState);
185
void SPI_SendData(SPI_TypeDef* SPIx, u16 Data);
186
u16 SPI_ReceiveData(SPI_TypeDef* SPIx);
187
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, u16 SPI_NSSInternalSoft);
188
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
189
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, u16 SPI_DataSize);
190
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
191
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
192
u16 SPI_GetCRC(SPI_TypeDef* SPIx, u8 SPI_CRC);
193
u16 SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
194
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, u16 SPI_Direction);
195
FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, u16 SPI_FLAG);
196
void SPI_ClearFlag(SPI_TypeDef* SPIx, u16 SPI_FLAG);
197
ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, u8 SPI_IT);
198
void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, u8 SPI_IT);
199
 
200
#endif /*__STM32F10x_SPI_H */
201
 
202
/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.