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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_STM32F103_Keil/] [timertest.c] - Blame information for rev 595

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1 582 jeremybenn
/*
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    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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    ***************************************************************************
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    *                                                                         *
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    * If you are:                                                             *
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    *                                                                         *
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    *    + New to FreeRTOS,                                                   *
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    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
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    *    + Looking for basic training,                                        *
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    *    + Wanting to improve your FreeRTOS skills and productivity           *
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    *                                                                         *
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    * then take a look at the FreeRTOS books - available as PDF or paperback  *
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    *                                                                         *
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    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
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    *                  http://www.FreeRTOS.org/Documentation                  *
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    *                                                                         *
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    * A pdf reference manual is also available.  Both are usually delivered   *
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    * to your inbox within 20 minutes to two hours when purchased between 8am *
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    * and 8pm GMT (although please allow up to 24 hours in case of            *
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    * exceptional circumstances).  Thank you for your support!                *
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    *                                                                         *
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    ***************************************************************************
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    This file is part of the FreeRTOS distribution.
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    FreeRTOS is free software; you can redistribute it and/or modify it under
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    the terms of the GNU General Public License (version 2) as published by the
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    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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    ***NOTE*** The exception to the GPL is included to allow you to distribute
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    a combined work that includes FreeRTOS without being obliged to provide the
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    source code for proprietary components outside of the FreeRTOS kernel.
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    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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    more details. You should have received a copy of the GNU General Public
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    License and the FreeRTOS license exception along with FreeRTOS; if not it
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    can be viewed here: http://www.freertos.org/a00114.html and also obtained
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    by writing to Richard Barry, contact details for whom are available on the
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    FreeRTOS WEB site.
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    1 tab == 4 spaces!
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    http://www.FreeRTOS.org - Documentation, latest information, license and
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    contact details.
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    http://www.SafeRTOS.com - A version that is certified for use in safety
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    critical systems.
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    http://www.OpenRTOS.com - Commercial support, development, porting,
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    licensing and training services.
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*/
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/* High speed timer test as described in main.c. */
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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/* Library includes. */
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#include "stm32f10x_lib.h"
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#include "stm32f10x_tim.h"
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#include "stm32f10x_map.h"
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/* The set frequency of the interrupt.  Deviations from this are measured as
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the jitter. */
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#define timerINTERRUPT_FREQUENCY                ( ( unsigned portSHORT ) 20000 )
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/* The expected time between each of the timer interrupts - if the jitter was
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zero. */
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#define timerEXPECTED_DIFFERENCE_VALUE  ( configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY )
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/* The highest available interrupt priority. */
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#define timerHIGHEST_PRIORITY                   ( 0 )
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/* Misc defines. */
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#define timerMAX_32BIT_VALUE                    ( 0xffffffffUL )
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#define timerTIMER_1_COUNT_VALUE                ( * ( ( unsigned long * ) ( TIMER1_BASE + 0x48 ) ) )
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/* The number of interrupts to pass before we start looking at the jitter. */
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#define timerSETTLE_TIME                        5
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/*-----------------------------------------------------------*/
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/*
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 * Configures the two timers used to perform the test.
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 */
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void vSetupTimerTest( void );
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/* Interrupt handler in which the jitter is measured. */
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void vTimer2IntHandler( void );
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/* Stores the value of the maximum recorded jitter between interrupts. */
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volatile unsigned portSHORT usMaxJitter = 0;
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/*-----------------------------------------------------------*/
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void vSetupTimerTest( void )
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{
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unsigned long ulFrequency;
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TIM_TimeBaseInitTypeDef  TIM_TimeBaseStructure;
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NVIC_InitTypeDef NVIC_InitStructure;
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        /* Enable timer clocks */
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        RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM2, ENABLE );
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        RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM3, ENABLE );
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        /* Initialise data. */
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        TIM_DeInit( TIM2 );
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        TIM_DeInit( TIM3 );
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        TIM_TimeBaseStructInit( &TIM_TimeBaseStructure );
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        /* Time base configuration for timer 2 - which generates the interrupts. */
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        ulFrequency = configCPU_CLOCK_HZ / timerINTERRUPT_FREQUENCY;
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        TIM_TimeBaseStructure.TIM_Period = ( unsigned portSHORT ) ( ulFrequency & 0xffffUL );
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        TIM_TimeBaseStructure.TIM_Prescaler = 0x0;
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        TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;
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        TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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        TIM_TimeBaseInit( TIM2, &TIM_TimeBaseStructure );
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        TIM_ARRPreloadConfig( TIM2, ENABLE );
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        /* Configuration for timer 3 which is used as a high resolution time
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        measurement. */
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        TIM_TimeBaseStructure.TIM_Period = ( unsigned portSHORT ) 0xffff;
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        TIM_TimeBaseInit( TIM3, &TIM_TimeBaseStructure );
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        TIM_ARRPreloadConfig( TIM3, ENABLE );
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        /* Enable TIM2 IT.  TIM3 does not generate an interrupt. */
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        NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQChannel;
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        NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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        NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = timerHIGHEST_PRIORITY;
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        NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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        NVIC_Init( &NVIC_InitStructure );
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        TIM_ITConfig( TIM2, TIM_IT_Update, ENABLE );
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        /* Finally, enable both timers. */
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        TIM_Cmd( TIM2, ENABLE );
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        TIM_Cmd( TIM3, ENABLE );
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}
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/*-----------------------------------------------------------*/
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void vTimer2IntHandler( void )
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{
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static unsigned portSHORT usLastCount = 0, usSettleCount = 0, usMaxDifference = 0;
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unsigned portSHORT usThisCount, usDifference;
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        /* Capture the free running timer 3 value as we enter the interrupt. */
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        usThisCount = TIM3->CNT;
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        if( usSettleCount >= timerSETTLE_TIME )
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        {
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                /* What is the difference between the timer value in this interrupt
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                and the value from the last interrupt. */
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                usDifference = usThisCount - usLastCount;
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                /* Store the difference in the timer values if it is larger than the
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                currently stored largest value.  The difference over and above the
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                expected difference will give the 'jitter' in the processing of these
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                interrupts. */
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                if( usDifference > usMaxDifference )
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                {
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                        usMaxDifference = usDifference;
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                        usMaxJitter = usMaxDifference - timerEXPECTED_DIFFERENCE_VALUE;
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                }
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        }
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        else
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        {
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                /* Don't bother storing any values for the first couple of
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                interrupts. */
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                usSettleCount++;
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        }
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        /* Remember what the timer value was this time through, so we can calculate
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        the difference the next time through. */
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        usLastCount = usThisCount;
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    TIM_ClearITPendingBit( TIM2, TIM_IT_Update );
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}
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