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jeremybenn |
/**
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******************************************************************************
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* @file stm32l1xx_spi.h
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* @author MCD Application Team
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* @version V1.0.0RC1
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* @date 07/02/2010
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* @brief This file contains all the functions prototypes for the SPI
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* firmware library.
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******************************************************************************
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* @copy
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L1xx_SPI_H
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#define __STM32L1xx_SPI_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32l1xx.h"
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/** @addtogroup STM32L1xx_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup SPI
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* @{
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*/
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/** @defgroup SPI_Exported_Types
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* @{
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*/
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/**
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* @brief SPI Init structure definition
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*/
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typedef struct
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{
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uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
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This parameter can be any combination of @ref SPI_data_direction */
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uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
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This parameter can be any combination of @ref SPI_mode */
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uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
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This parameter can be any combination of @ref SPI_data_size */
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uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
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This parameter can be any combination of @ref SPI_Clock_Polarity */
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uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
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This parameter can be any combination of @ref SPI_Clock_Phase */
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uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
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hardware (NSS pin) or by software using the SSI bit.
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This parameter can be any combination of @ref SPI_Slave_Select_management */
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uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
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used to configure the transmit and receive SCK clock.
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This parameter can be any combination of @ref SPI_BaudRate_Prescaler.
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@note The communication clock is derived from the master
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clock. The slave clock does not need to be set. */
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uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
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This parameter can be any combination of @ref SPI_MSB_LSB_transmission */
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uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
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}SPI_InitTypeDef;
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/**
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* @}
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*/
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/** @defgroup SPI_Exported_Constants
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* @{
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*/
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#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
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((PERIPH) == SPI2))
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/** @defgroup SPI_data_direction
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* @{
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*/
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#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
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#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)
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#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)
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#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)
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#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
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((MODE) == SPI_Direction_2Lines_RxOnly) || \
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((MODE) == SPI_Direction_1Line_Rx) || \
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((MODE) == SPI_Direction_1Line_Tx))
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/**
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* @}
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*/
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/** @defgroup SPI_mode
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* @{
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*/
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#define SPI_Mode_Master ((uint16_t)0x0104)
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#define SPI_Mode_Slave ((uint16_t)0x0000)
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#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
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((MODE) == SPI_Mode_Slave))
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/**
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* @}
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*/
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/** @defgroup SPI_data_size
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* @{
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*/
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#define SPI_DataSize_16b ((uint16_t)0x0800)
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#define SPI_DataSize_8b ((uint16_t)0x0000)
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#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
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((DATASIZE) == SPI_DataSize_8b))
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/**
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* @}
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*/
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/** @defgroup SPI_Clock_Polarity
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* @{
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*/
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#define SPI_CPOL_Low ((uint16_t)0x0000)
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#define SPI_CPOL_High ((uint16_t)0x0002)
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#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
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((CPOL) == SPI_CPOL_High))
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/**
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* @}
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*/
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/** @defgroup SPI_Clock_Phase
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* @{
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*/
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#define SPI_CPHA_1Edge ((uint16_t)0x0000)
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#define SPI_CPHA_2Edge ((uint16_t)0x0001)
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#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
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((CPHA) == SPI_CPHA_2Edge))
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/**
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* @}
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*/
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/** @defgroup SPI_Slave_Select_management
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* @{
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*/
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#define SPI_NSS_Soft ((uint16_t)0x0200)
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#define SPI_NSS_Hard ((uint16_t)0x0000)
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#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
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((NSS) == SPI_NSS_Hard))
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/**
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* @}
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*/
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/** @defgroup SPI_BaudRate_Prescaler
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* @{
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*/
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#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)
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#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)
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#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)
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#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)
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#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)
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#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)
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#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)
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#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)
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#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
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((PRESCALER) == SPI_BaudRatePrescaler_4) || \
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((PRESCALER) == SPI_BaudRatePrescaler_8) || \
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((PRESCALER) == SPI_BaudRatePrescaler_16) || \
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((PRESCALER) == SPI_BaudRatePrescaler_32) || \
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((PRESCALER) == SPI_BaudRatePrescaler_64) || \
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((PRESCALER) == SPI_BaudRatePrescaler_128) || \
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((PRESCALER) == SPI_BaudRatePrescaler_256))
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/**
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* @}
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*/
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/** @defgroup SPI_MSB_LSB_transmission
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* @{
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*/
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#define SPI_FirstBit_MSB ((uint16_t)0x0000)
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#define SPI_FirstBit_LSB ((uint16_t)0x0080)
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#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
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((BIT) == SPI_FirstBit_LSB))
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/**
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* @}
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*/
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/** @defgroup SPI_DMA_transfer_requests
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* @{
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*/
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#define SPI_DMAReq_Tx ((uint16_t)0x0002)
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#define SPI_DMAReq_Rx ((uint16_t)0x0001)
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#define IS_SPI_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
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/**
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* @}
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*/
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/** @defgroup SPI_NSS_internal_software_mangement
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* @{
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*/
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#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)
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#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)
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#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
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((INTERNAL) == SPI_NSSInternalSoft_Reset))
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/**
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* @}
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*/
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/** @defgroup SPI_CRC_Transmit_Receive
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* @{
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*/
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#define SPI_CRC_Tx ((uint8_t)0x00)
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#define SPI_CRC_Rx ((uint8_t)0x01)
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#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
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/**
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* @}
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*/
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/** @defgroup SPI_direction_transmit_receive
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* @{
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*/
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#define SPI_Direction_Rx ((uint16_t)0xBFFF)
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#define SPI_Direction_Tx ((uint16_t)0x4000)
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#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
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((DIRECTION) == SPI_Direction_Tx))
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/**
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* @}
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*/
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/** @defgroup SPI_interrupts_definition
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* @{
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*/
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#define SPI_IT_TXE ((uint8_t)0x71)
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#define SPI_IT_RXNE ((uint8_t)0x60)
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#define SPI_IT_ERR ((uint8_t)0x50)
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#define IS_SPI_CONFIG_IT(IT) (((IT) == SPI_IT_TXE) || \
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((IT) == SPI_IT_RXNE) || \
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((IT) == SPI_IT_ERR))
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#define SPI_IT_OVR ((uint8_t)0x56)
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#define SPI_IT_MODF ((uint8_t)0x55)
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#define SPI_IT_CRCERR ((uint8_t)0x54)
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#define IS_SPI_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
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#define IS_SPI_GET_IT(IT) (((IT) == SPI_IT_RXNE) || ((IT) == SPI_IT_TXE) || \
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((IT) == SPI_IT_CRCERR) || \
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((IT) == SPI_IT_MODF) || ((IT) == SPI_IT_OVR))
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/**
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* @}
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*/
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/** @defgroup SPI_flags_definition
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* @{
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*/
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#define SPI_FLAG_RXNE ((uint16_t)0x0001)
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#define SPI_FLAG_TXE ((uint16_t)0x0002)
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#define SPI_FLAG_CRCERR ((uint16_t)0x0010)
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#define SPI_FLAG_MODF ((uint16_t)0x0020)
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#define SPI_FLAG_OVR ((uint16_t)0x0040)
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#define SPI_FLAG_BSY ((uint16_t)0x0080)
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#define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
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#define IS_SPI_GET_FLAG(FLAG) (((FLAG) == SPI_FLAG_BSY) || ((FLAG) == SPI_FLAG_OVR) || \
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((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
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((FLAG) == SPI_FLAG_TXE) || ((FLAG) == SPI_FLAG_RXNE))
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/**
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* @}
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*/
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/** @defgroup SPI_CRC_polynomial
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* @{
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*/
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#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
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/**
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* @}
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*/
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/** @defgroup SPI_Legacy
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* @{
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*/
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#define SPI_I2S_DMAReq_Tx SPI_DMAReq_Tx
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#define SPI_I2S_DMAReq_Rx SPI_DMAReq_Rx
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#define SPI_I2S_IT_TXE SPI_IT_TXE
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#define SPI_I2S_IT_RXNE SPI_IT_RXNE
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#define SPI_I2S_IT_ERR SPI_IT_ERR
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#define SPI_I2S_IT_OVR SPI_IT_OVR
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#define SPI_I2S_FLAG_RXNE SPI_FLAG_RXNE
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#define SPI_I2S_FLAG_TXE SPI_FLAG_TXE
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#define SPI_I2S_FLAG_OVR SPI_FLAG_OVR
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#define SPI_I2S_FLAG_BSY SPI_FLAG_BSY
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#define SPI_I2S_DeInit SPI_DeInit
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#define SPI_I2S_ITConfig SPI_ITConfig
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#define SPI_I2S_DMACmd SPI_DMACmd
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#define SPI_I2S_SendData SPI_SendData
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#define SPI_I2S_ReceiveData SPI_ReceiveData
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#define SPI_I2S_GetFlagStatus SPI_GetFlagStatus
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#define SPI_I2S_ClearFlag SPI_ClearFlag
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#define SPI_I2S_GetITStatus SPI_GetITStatus
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#define SPI_I2S_ClearITPendingBit SPI_ClearITPendingBit
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/**
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* @}
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*/
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/**
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* @}
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*/
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/** @defgroup SPI_Exported_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup SPI_Exported_Functions
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* @{
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340 |
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*/
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341 |
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342 |
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void SPI_DeInit(SPI_TypeDef* SPIx);
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343 |
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void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
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344 |
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void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
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345 |
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void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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346 |
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void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState);
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347 |
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void SPI_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_DMAReq, FunctionalState NewState);
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348 |
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void SPI_SendData(SPI_TypeDef* SPIx, uint16_t Data);
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349 |
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uint16_t SPI_ReceiveData(SPI_TypeDef* SPIx);
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350 |
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void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
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351 |
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void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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352 |
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void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
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353 |
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void SPI_TransmitCRC(SPI_TypeDef* SPIx);
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354 |
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void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
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355 |
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uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
|
356 |
|
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uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
|
357 |
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void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
|
358 |
|
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FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);
|
359 |
|
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void SPI_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);
|
360 |
|
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ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT);
|
361 |
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void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT);
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362 |
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|
363 |
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#ifdef __cplusplus
|
364 |
|
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}
|
365 |
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#endif
|
366 |
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|
367 |
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#endif /*__STM32l15x_SPI_H */
|
368 |
|
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/**
|
369 |
|
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* @}
|
370 |
|
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*/
|
371 |
|
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|
372 |
|
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/**
|
373 |
|
|
* @}
|
374 |
|
|
*/
|
375 |
|
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|
376 |
|
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/**
|
377 |
|
|
* @}
|
378 |
|
|
*/
|
379 |
|
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|
380 |
|
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/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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