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/**
  ******************************************************************************
  * @file    stm32l1xx_spi.h
  * @author  MCD Application Team
  * @version V1.0.0RC1
  * @date    07/02/2010
  * @brief   This file contains all the functions prototypes for the SPI
  *          firmware library.
  ******************************************************************************
  * @copy
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
  */
 
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L1xx_SPI_H
#define __STM32L1xx_SPI_H
 
#ifdef __cplusplus
 extern "C" {
#endif
 
/* Includes ------------------------------------------------------------------*/
#include "stm32l1xx.h"
 
/** @addtogroup STM32L1xx_StdPeriph_Driver
  * @{
  */
 
/** @addtogroup SPI
  * @{
  */
 
/** @defgroup SPI_Exported_Types
  * @{
  */
 
/**
  * @brief  SPI Init structure definition
  */
 
typedef struct
{
  uint16_t SPI_Direction;           /*!< Specifies the SPI unidirectional or bidirectional data mode.
                                         This parameter can be any combination of @ref SPI_data_direction */
 
  uint16_t SPI_Mode;                /*!< Specifies the SPI operating mode.
                                         This parameter can be any combination of @ref SPI_mode */
 
  uint16_t SPI_DataSize;            /*!< Specifies the SPI data size.
                                         This parameter can be any combination of @ref SPI_data_size */
 
  uint16_t SPI_CPOL;                /*!< Specifies the serial clock steady state.
                                         This parameter can be any combination of @ref SPI_Clock_Polarity */
 
  uint16_t SPI_CPHA;                /*!< Specifies the clock active edge for the bit capture.
                                         This parameter can be any combination of @ref SPI_Clock_Phase */
 
  uint16_t SPI_NSS;                 /*!< Specifies whether the NSS signal is managed by
                                         hardware (NSS pin) or by software using the SSI bit.
                                         This parameter can be any combination of @ref SPI_Slave_Select_management */
 
  uint16_t SPI_BaudRatePrescaler;   /*!< Specifies the Baud Rate prescaler value which will be
                                         used to configure the transmit and receive SCK clock.
                                         This parameter can be any combination of @ref SPI_BaudRate_Prescaler.
                                         @note The communication clock is derived from the master
                                               clock. The slave clock does not need to be set. */
 
  uint16_t SPI_FirstBit;            /*!< Specifies whether data transfers start from MSB or LSB bit.
                                         This parameter can be any combination of @ref SPI_MSB_LSB_transmission */
 
  uint16_t SPI_CRCPolynomial;       /*!< Specifies the polynomial used for the CRC calculation. */
}SPI_InitTypeDef;
 
/**
  * @}
  */
 
/** @defgroup SPI_Exported_Constants
  * @{
  */
 
#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
                                   ((PERIPH) == SPI2))
 
/** @defgroup SPI_data_direction
  * @{
  */
 
#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
#define SPI_Direction_2Lines_RxOnly     ((uint16_t)0x0400)
#define SPI_Direction_1Line_Rx          ((uint16_t)0x8000)
#define SPI_Direction_1Line_Tx          ((uint16_t)0xC000)
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
                                     ((MODE) == SPI_Direction_2Lines_RxOnly) || \
                                     ((MODE) == SPI_Direction_1Line_Rx) || \
                                     ((MODE) == SPI_Direction_1Line_Tx))
/**
  * @}
  */
 
/** @defgroup SPI_mode
  * @{
  */
 
#define SPI_Mode_Master                 ((uint16_t)0x0104)
#define SPI_Mode_Slave                  ((uint16_t)0x0000)
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
                           ((MODE) == SPI_Mode_Slave))
/**
  * @}
  */
 
/** @defgroup SPI_data_size
  * @{
  */
 
#define SPI_DataSize_16b                ((uint16_t)0x0800)
#define SPI_DataSize_8b                 ((uint16_t)0x0000)
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
                                   ((DATASIZE) == SPI_DataSize_8b))
/**
  * @}
  */
 
/** @defgroup SPI_Clock_Polarity
  * @{
  */
 
#define SPI_CPOL_Low                    ((uint16_t)0x0000)
#define SPI_CPOL_High                   ((uint16_t)0x0002)
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
                           ((CPOL) == SPI_CPOL_High))
/**
  * @}
  */
 
/** @defgroup SPI_Clock_Phase
  * @{
  */
 
#define SPI_CPHA_1Edge                  ((uint16_t)0x0000)
#define SPI_CPHA_2Edge                  ((uint16_t)0x0001)
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
                           ((CPHA) == SPI_CPHA_2Edge))
/**
  * @}
  */
 
/** @defgroup SPI_Slave_Select_management
  * @{
  */
 
#define SPI_NSS_Soft                    ((uint16_t)0x0200)
#define SPI_NSS_Hard                    ((uint16_t)0x0000)
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
                         ((NSS) == SPI_NSS_Hard))
/**
  * @}
  */
 
/** @defgroup SPI_BaudRate_Prescaler
  * @{
  */
 
#define SPI_BaudRatePrescaler_2         ((uint16_t)0x0000)
#define SPI_BaudRatePrescaler_4         ((uint16_t)0x0008)
#define SPI_BaudRatePrescaler_8         ((uint16_t)0x0010)
#define SPI_BaudRatePrescaler_16        ((uint16_t)0x0018)
#define SPI_BaudRatePrescaler_32        ((uint16_t)0x0020)
#define SPI_BaudRatePrescaler_64        ((uint16_t)0x0028)
#define SPI_BaudRatePrescaler_128       ((uint16_t)0x0030)
#define SPI_BaudRatePrescaler_256       ((uint16_t)0x0038)
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_256))
/**
  * @}
  */
 
/** @defgroup SPI_MSB_LSB_transmission
  * @{
  */
 
#define SPI_FirstBit_MSB                ((uint16_t)0x0000)
#define SPI_FirstBit_LSB                ((uint16_t)0x0080)
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
                               ((BIT) == SPI_FirstBit_LSB))
/**
  * @}
  */
 
/** @defgroup SPI_DMA_transfer_requests
  * @{
  */
 
#define SPI_DMAReq_Tx               ((uint16_t)0x0002)
#define SPI_DMAReq_Rx               ((uint16_t)0x0001)
#define IS_SPI_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
/**
  * @}
  */
 
/** @defgroup SPI_NSS_internal_software_mangement
  * @{
  */
 
#define SPI_NSSInternalSoft_Set         ((uint16_t)0x0100)
#define SPI_NSSInternalSoft_Reset       ((uint16_t)0xFEFF)
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
                                       ((INTERNAL) == SPI_NSSInternalSoft_Reset))
/**
  * @}
  */
 
/** @defgroup SPI_CRC_Transmit_Receive
  * @{
  */
 
#define SPI_CRC_Tx                      ((uint8_t)0x00)
#define SPI_CRC_Rx                      ((uint8_t)0x01)
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
/**
  * @}
  */
 
/** @defgroup SPI_direction_transmit_receive
  * @{
  */
 
#define SPI_Direction_Rx                ((uint16_t)0xBFFF)
#define SPI_Direction_Tx                ((uint16_t)0x4000)
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
                                     ((DIRECTION) == SPI_Direction_Tx))
/**
  * @}
  */
 
/** @defgroup SPI_interrupts_definition
  * @{
  */
 
#define SPI_IT_TXE                  ((uint8_t)0x71)
#define SPI_IT_RXNE                 ((uint8_t)0x60)
#define SPI_IT_ERR                  ((uint8_t)0x50)
#define IS_SPI_CONFIG_IT(IT) (((IT) == SPI_IT_TXE) || \
                                 ((IT) == SPI_IT_RXNE) || \
                                 ((IT) == SPI_IT_ERR))
#define SPI_IT_OVR                  ((uint8_t)0x56)
#define SPI_IT_MODF                     ((uint8_t)0x55)
#define SPI_IT_CRCERR                   ((uint8_t)0x54)
#define IS_SPI_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
#define IS_SPI_GET_IT(IT) (((IT) == SPI_IT_RXNE) || ((IT) == SPI_IT_TXE) || \
                               ((IT) == SPI_IT_CRCERR) || \
                               ((IT) == SPI_IT_MODF) || ((IT) == SPI_IT_OVR))
/**
  * @}
  */
 
/** @defgroup SPI_flags_definition
  * @{
  */
 
#define SPI_FLAG_RXNE               ((uint16_t)0x0001)
#define SPI_FLAG_TXE                ((uint16_t)0x0002)
#define SPI_FLAG_CRCERR                 ((uint16_t)0x0010)
#define SPI_FLAG_MODF                   ((uint16_t)0x0020)
#define SPI_FLAG_OVR                ((uint16_t)0x0040)
#define SPI_FLAG_BSY                ((uint16_t)0x0080)
#define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
#define IS_SPI_GET_FLAG(FLAG) (((FLAG) == SPI_FLAG_BSY) || ((FLAG) == SPI_FLAG_OVR) || \
                                   ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
                                   ((FLAG) == SPI_FLAG_TXE) || ((FLAG) == SPI_FLAG_RXNE))
/**
  * @}
  */
 
/** @defgroup SPI_CRC_polynomial
  * @{
  */
 
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
/**
  * @}
  */
 
/** @defgroup SPI_Legacy
  * @{
  */
 
#define SPI_I2S_DMAReq_Tx            SPI_DMAReq_Tx
#define SPI_I2S_DMAReq_Rx            SPI_DMAReq_Rx
#define SPI_I2S_IT_TXE               SPI_IT_TXE
#define SPI_I2S_IT_RXNE              SPI_IT_RXNE
#define SPI_I2S_IT_ERR               SPI_IT_ERR
#define SPI_I2S_IT_OVR               SPI_IT_OVR
#define SPI_I2S_FLAG_RXNE            SPI_FLAG_RXNE
#define SPI_I2S_FLAG_TXE             SPI_FLAG_TXE
#define SPI_I2S_FLAG_OVR             SPI_FLAG_OVR
#define SPI_I2S_FLAG_BSY             SPI_FLAG_BSY
#define SPI_I2S_DeInit               SPI_DeInit
#define SPI_I2S_ITConfig             SPI_ITConfig
#define SPI_I2S_DMACmd               SPI_DMACmd
#define SPI_I2S_SendData             SPI_SendData
#define SPI_I2S_ReceiveData          SPI_ReceiveData
#define SPI_I2S_GetFlagStatus        SPI_GetFlagStatus
#define SPI_I2S_ClearFlag            SPI_ClearFlag
#define SPI_I2S_GetITStatus          SPI_GetITStatus
#define SPI_I2S_ClearITPendingBit    SPI_ClearITPendingBit
/**
  * @}
  */
 
/**
  * @}
  */
 
/** @defgroup SPI_Exported_Macros
  * @{
  */
 
/**
  * @}
  */
 
/** @defgroup SPI_Exported_Functions
  * @{
  */
 
void SPI_DeInit(SPI_TypeDef* SPIx);
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState);
void SPI_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_DMAReq, FunctionalState NewState);
void SPI_SendData(SPI_TypeDef* SPIx, uint16_t Data);
uint16_t SPI_ReceiveData(SPI_TypeDef* SPIx);
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);
void SPI_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);
ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT);
void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT);
 
#ifdef __cplusplus
}
#endif
 
#endif /*__STM32l15x_SPI_H */
/**
  * @}
  */
 
/**
  * @}
  */
 
/**
  * @}
  */
 
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/

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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_STM32L152_IAR/] [system_and_ST_code/] [STM32L1xx_StdPeriph_Driver/] [inc/] [stm32l1xx_spi.h] - Blame information for rev 582

Line No.	Rev	Author	Line
1	582	jeremybenn	`/**`
2			`******************************************************************************`
3			`* @file stm32l1xx_spi.h`
4			`* @author MCD Application Team`
5			`* @version V1.0.0RC1`
6			`* @date 07/02/2010`
7			`* @brief This file contains all the functions prototypes for the SPI`
8			`* firmware library.`
9			`******************************************************************************`
10			`* @copy`
11			`*`
12			`* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS`
13			`* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE`
14			`* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY`
15			`* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING`
16			`* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE`
17			`* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.`
18			`*`
19			`* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>`
20			`*/`
21
22			`/* Define to prevent recursive inclusion -------------------------------------*/`
23			`#ifndef __STM32L1xx_SPI_H`
24			`#define __STM32L1xx_SPI_H`
25
26			`#ifdef __cplusplus`
27			`extern "C" {`
28			`#endif`
29
30			`/* Includes ------------------------------------------------------------------*/`
31			`#include "stm32l1xx.h"`
32
33			`/** @addtogroup STM32L1xx_StdPeriph_Driver`
34			`* @{`
35			`*/`
36
37			`/** @addtogroup SPI`
38			`* @{`
39			`*/`
40
41			`/** @defgroup SPI_Exported_Types`
42			`* @{`
43			`*/`
44
45			`/**`
46			`* @brief SPI Init structure definition`
47			`*/`
48
49			`typedef struct`
50			`{`
51			`uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.`
52			`This parameter can be any combination of @ref SPI_data_direction */`
53
54			`uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.`
55			`This parameter can be any combination of @ref SPI_mode */`
56
57			`uint16_t SPI_DataSize; /*!< Specifies the SPI data size.`
58			`This parameter can be any combination of @ref SPI_data_size */`
59
60			`uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.`
61			`This parameter can be any combination of @ref SPI_Clock_Polarity */`
62
63			`uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.`
64			`This parameter can be any combination of @ref SPI_Clock_Phase */`
65
66			`uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by`
67			`hardware (NSS pin) or by software using the SSI bit.`
68			`This parameter can be any combination of @ref SPI_Slave_Select_management */`
69
70			`uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be`
71			`used to configure the transmit and receive SCK clock.`
72			`This parameter can be any combination of @ref SPI_BaudRate_Prescaler.`
73			`@note The communication clock is derived from the master`
74			`clock. The slave clock does not need to be set. */`
75
76			`uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.`
77			`This parameter can be any combination of @ref SPI_MSB_LSB_transmission */`
78
79			`uint16_t SPI_CRCPolynomial; /!< Specifies the polynomial used for the CRC calculation. /`
80			`}SPI_InitTypeDef;`
81
82			`/**`
83			`* @}`
84			`*/`
85
86			`/** @defgroup SPI_Exported_Constants`
87			`* @{`
88			`*/`
89
90			`#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) \|\| \`
91			`((PERIPH) == SPI2))`
92
93			`/** @defgroup SPI_data_direction`
94			`* @{`
95			`*/`
96
97			`#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)`
98			`#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)`
99			`#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)`
100			`#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)`
101			`#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) \|\| \`
102			`((MODE) == SPI_Direction_2Lines_RxOnly) \|\| \`
103			`((MODE) == SPI_Direction_1Line_Rx) \|\| \`
104			`((MODE) == SPI_Direction_1Line_Tx))`
105			`/**`
106			`* @}`
107			`*/`
108
109			`/** @defgroup SPI_mode`
110			`* @{`
111			`*/`
112
113			`#define SPI_Mode_Master ((uint16_t)0x0104)`
114			`#define SPI_Mode_Slave ((uint16_t)0x0000)`
115			`#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) \|\| \`
116			`((MODE) == SPI_Mode_Slave))`
117			`/**`
118			`* @}`
119			`*/`
120
121			`/** @defgroup SPI_data_size`
122			`* @{`
123			`*/`
124
125			`#define SPI_DataSize_16b ((uint16_t)0x0800)`
126			`#define SPI_DataSize_8b ((uint16_t)0x0000)`
127			`#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) \|\| \`
128			`((DATASIZE) == SPI_DataSize_8b))`
129			`/**`
130			`* @}`
131			`*/`
132
133			`/** @defgroup SPI_Clock_Polarity`
134			`* @{`
135			`*/`
136
137			`#define SPI_CPOL_Low ((uint16_t)0x0000)`
138			`#define SPI_CPOL_High ((uint16_t)0x0002)`
139			`#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) \|\| \`
140			`((CPOL) == SPI_CPOL_High))`
141			`/**`
142			`* @}`
143			`*/`
144
145			`/** @defgroup SPI_Clock_Phase`
146			`* @{`
147			`*/`
148
149			`#define SPI_CPHA_1Edge ((uint16_t)0x0000)`
150			`#define SPI_CPHA_2Edge ((uint16_t)0x0001)`
151			`#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) \|\| \`
152			`((CPHA) == SPI_CPHA_2Edge))`
153			`/**`
154			`* @}`
155			`*/`
156
157			`/** @defgroup SPI_Slave_Select_management`
158			`* @{`
159			`*/`
160
161			`#define SPI_NSS_Soft ((uint16_t)0x0200)`
162			`#define SPI_NSS_Hard ((uint16_t)0x0000)`
163			`#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) \|\| \`
164			`((NSS) == SPI_NSS_Hard))`
165			`/**`
166			`* @}`
167			`*/`
168
169			`/** @defgroup SPI_BaudRate_Prescaler`
170			`* @{`
171			`*/`
172
173			`#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)`
174			`#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)`
175			`#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)`
176			`#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)`
177			`#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)`
178			`#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)`
179			`#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)`
180			`#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)`
181			`#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) \|\| \`
182			`((PRESCALER) == SPI_BaudRatePrescaler_4) \|\| \`
183			`((PRESCALER) == SPI_BaudRatePrescaler_8) \|\| \`
184			`((PRESCALER) == SPI_BaudRatePrescaler_16) \|\| \`
185			`((PRESCALER) == SPI_BaudRatePrescaler_32) \|\| \`
186			`((PRESCALER) == SPI_BaudRatePrescaler_64) \|\| \`
187			`((PRESCALER) == SPI_BaudRatePrescaler_128) \|\| \`
188			`((PRESCALER) == SPI_BaudRatePrescaler_256))`
189			`/**`
190			`* @}`
191			`*/`
192
193			`/** @defgroup SPI_MSB_LSB_transmission`
194			`* @{`
195			`*/`
196
197			`#define SPI_FirstBit_MSB ((uint16_t)0x0000)`
198			`#define SPI_FirstBit_LSB ((uint16_t)0x0080)`
199			`#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) \|\| \`
200			`((BIT) == SPI_FirstBit_LSB))`
201			`/**`
202			`* @}`
203			`*/`
204
205			`/** @defgroup SPI_DMA_transfer_requests`
206			`* @{`
207			`*/`
208
209			`#define SPI_DMAReq_Tx ((uint16_t)0x0002)`
210			`#define SPI_DMAReq_Rx ((uint16_t)0x0001)`
211			`#define IS_SPI_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))`
212			`/**`
213			`* @}`
214			`*/`
215
216			`/** @defgroup SPI_NSS_internal_software_mangement`
217			`* @{`
218			`*/`
219
220			`#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)`
221			`#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)`
222			`#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) \|\| \`
223			`((INTERNAL) == SPI_NSSInternalSoft_Reset))`
224			`/**`
225			`* @}`
226			`*/`
227
228			`/** @defgroup SPI_CRC_Transmit_Receive`
229			`* @{`
230			`*/`
231
232			`#define SPI_CRC_Tx ((uint8_t)0x00)`
233			`#define SPI_CRC_Rx ((uint8_t)0x01)`
234			`#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) \|\| ((CRC) == SPI_CRC_Rx))`
235			`/**`
236			`* @}`
237			`*/`
238
239			`/** @defgroup SPI_direction_transmit_receive`
240			`* @{`
241			`*/`
242
243			`#define SPI_Direction_Rx ((uint16_t)0xBFFF)`
244			`#define SPI_Direction_Tx ((uint16_t)0x4000)`
245			`#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) \|\| \`
246			`((DIRECTION) == SPI_Direction_Tx))`
247			`/**`
248			`* @}`
249			`*/`
250
251			`/** @defgroup SPI_interrupts_definition`
252			`* @{`
253			`*/`
254
255			`#define SPI_IT_TXE ((uint8_t)0x71)`
256			`#define SPI_IT_RXNE ((uint8_t)0x60)`
257			`#define SPI_IT_ERR ((uint8_t)0x50)`
258			`#define IS_SPI_CONFIG_IT(IT) (((IT) == SPI_IT_TXE) \|\| \`
259			`((IT) == SPI_IT_RXNE) \|\| \`
260			`((IT) == SPI_IT_ERR))`
261			`#define SPI_IT_OVR ((uint8_t)0x56)`
262			`#define SPI_IT_MODF ((uint8_t)0x55)`
263			`#define SPI_IT_CRCERR ((uint8_t)0x54)`
264			`#define IS_SPI_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))`
265			`#define IS_SPI_GET_IT(IT) (((IT) == SPI_IT_RXNE) \|\| ((IT) == SPI_IT_TXE) \|\| \`
266			`((IT) == SPI_IT_CRCERR) \|\| \`
267			`((IT) == SPI_IT_MODF) \|\| ((IT) == SPI_IT_OVR))`
268			`/**`
269			`* @}`
270			`*/`
271
272			`/** @defgroup SPI_flags_definition`
273			`* @{`
274			`*/`
275
276			`#define SPI_FLAG_RXNE ((uint16_t)0x0001)`
277			`#define SPI_FLAG_TXE ((uint16_t)0x0002)`
278			`#define SPI_FLAG_CRCERR ((uint16_t)0x0010)`
279			`#define SPI_FLAG_MODF ((uint16_t)0x0020)`
280			`#define SPI_FLAG_OVR ((uint16_t)0x0040)`
281			`#define SPI_FLAG_BSY ((uint16_t)0x0080)`
282			`#define IS_SPI_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))`
283			`#define IS_SPI_GET_FLAG(FLAG) (((FLAG) == SPI_FLAG_BSY) \|\| ((FLAG) == SPI_FLAG_OVR) \|\| \`
284			`((FLAG) == SPI_FLAG_MODF) \|\| ((FLAG) == SPI_FLAG_CRCERR) \|\| \`
285			`((FLAG) == SPI_FLAG_TXE) \|\| ((FLAG) == SPI_FLAG_RXNE))`
286			`/**`
287			`* @}`
288			`*/`
289
290			`/** @defgroup SPI_CRC_polynomial`
291			`* @{`
292			`*/`
293
294			`#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)`
295			`/**`
296			`* @}`
297			`*/`
298
299			`/** @defgroup SPI_Legacy`
300			`* @{`
301			`*/`
302
303			`#define SPI_I2S_DMAReq_Tx SPI_DMAReq_Tx`
304			`#define SPI_I2S_DMAReq_Rx SPI_DMAReq_Rx`
305			`#define SPI_I2S_IT_TXE SPI_IT_TXE`
306			`#define SPI_I2S_IT_RXNE SPI_IT_RXNE`
307			`#define SPI_I2S_IT_ERR SPI_IT_ERR`
308			`#define SPI_I2S_IT_OVR SPI_IT_OVR`
309			`#define SPI_I2S_FLAG_RXNE SPI_FLAG_RXNE`
310			`#define SPI_I2S_FLAG_TXE SPI_FLAG_TXE`
311			`#define SPI_I2S_FLAG_OVR SPI_FLAG_OVR`
312			`#define SPI_I2S_FLAG_BSY SPI_FLAG_BSY`
313			`#define SPI_I2S_DeInit SPI_DeInit`
314			`#define SPI_I2S_ITConfig SPI_ITConfig`
315			`#define SPI_I2S_DMACmd SPI_DMACmd`
316			`#define SPI_I2S_SendData SPI_SendData`
317			`#define SPI_I2S_ReceiveData SPI_ReceiveData`
318			`#define SPI_I2S_GetFlagStatus SPI_GetFlagStatus`
319			`#define SPI_I2S_ClearFlag SPI_ClearFlag`
320			`#define SPI_I2S_GetITStatus SPI_GetITStatus`
321			`#define SPI_I2S_ClearITPendingBit SPI_ClearITPendingBit`
322			`/**`
323			`* @}`
324			`*/`
325
326			`/**`
327			`* @}`
328			`*/`
329
330			`/** @defgroup SPI_Exported_Macros`
331			`* @{`
332			`*/`
333
334			`/**`
335			`* @}`
336			`*/`
337
338			`/** @defgroup SPI_Exported_Functions`
339			`* @{`
340			`*/`
341
342			`void SPI_DeInit(SPI_TypeDef* SPIx);`
343			`void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);`
344			`void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);`
345			`void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);`
346			`void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState);`
347			`void SPI_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_DMAReq, FunctionalState NewState);`
348			`void SPI_SendData(SPI_TypeDef* SPIx, uint16_t Data);`
349			`uint16_t SPI_ReceiveData(SPI_TypeDef* SPIx);`
350			`void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);`
351			`void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);`
352			`void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);`
353			`void SPI_TransmitCRC(SPI_TypeDef* SPIx);`
354			`void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);`
355			`uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);`
356			`uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);`
357			`void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);`
358			`FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);`
359			`void SPI_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_FLAG);`
360			`ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT);`
361			`void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT);`
362
363			`#ifdef __cplusplus`
364			`}`
365			`#endif`
366
367			`#endif /__STM32l15x_SPI_H /`
368			`/**`
369			`* @}`
370			`*/`
371
372			`/**`
373			`* @}`
374			`*/`
375
376			`/**`
377			`* @}`
378			`*/`
379
380			`/***************** (C) COPYRIGHT 2010 STMicroelectronics *END OF FILE**/`