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582 |
jeremybenn |
/**
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******************************************************************************
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* @file stm32l1xx_syscfg.h
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* @author MCD Application Team
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* @version V1.0.0RC1
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* @date 07/02/2010
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* @brief This file contains all the functions prototypes for the SYSCFG
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* firmware library.
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******************************************************************************
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* @copy
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
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*/
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/*!< Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32L1xx_SYSCFG_H
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#define __STM32L1xx_SYSCFG_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*!< Includes ------------------------------------------------------------------*/
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#include "stm32l1xx.h"
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/** @addtogroup STM32L1xx_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup SYSCFG
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* @{
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*/
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/** @defgroup SYSCFG_Exported_Types
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* @{
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*/
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/** @defgroup EXTI_Port_Sources
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* @{
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*/
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#define EXTI_PortSourceGPIOA ((uint8_t)0x00)
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#define EXTI_PortSourceGPIOB ((uint8_t)0x01)
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#define EXTI_PortSourceGPIOC ((uint8_t)0x02)
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#define EXTI_PortSourceGPIOD ((uint8_t)0x03)
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#define EXTI_PortSourceGPIOE ((uint8_t)0x04)
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#define EXTI_PortSourceGPIOH ((uint8_t)0x05)
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#define IS_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == EXTI_PortSourceGPIOA) || \
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((PORTSOURCE) == EXTI_PortSourceGPIOB) || \
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((PORTSOURCE) == EXTI_PortSourceGPIOC) || \
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((PORTSOURCE) == EXTI_PortSourceGPIOD) || \
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((PORTSOURCE) == EXTI_PortSourceGPIOE) || \
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((PORTSOURCE) == EXTI_PortSourceGPIOH))
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/**
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* @}
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*/
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/** @defgroup EXTI_Pin_sources
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* @{
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*/
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#define EXTI_PinSource0 ((uint8_t)0x00)
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#define EXTI_PinSource1 ((uint8_t)0x01)
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#define EXTI_PinSource2 ((uint8_t)0x02)
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#define EXTI_PinSource3 ((uint8_t)0x03)
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#define EXTI_PinSource4 ((uint8_t)0x04)
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#define EXTI_PinSource5 ((uint8_t)0x05)
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#define EXTI_PinSource6 ((uint8_t)0x06)
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#define EXTI_PinSource7 ((uint8_t)0x07)
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#define EXTI_PinSource8 ((uint8_t)0x08)
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#define EXTI_PinSource9 ((uint8_t)0x09)
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#define EXTI_PinSource10 ((uint8_t)0x0A)
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#define EXTI_PinSource11 ((uint8_t)0x0B)
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#define EXTI_PinSource12 ((uint8_t)0x0C)
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#define EXTI_PinSource13 ((uint8_t)0x0D)
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#define EXTI_PinSource14 ((uint8_t)0x0E)
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#define EXTI_PinSource15 ((uint8_t)0x0F)
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#define IS_EXTI_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == EXTI_PinSource0) || \
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((PINSOURCE) == EXTI_PinSource1) || \
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((PINSOURCE) == EXTI_PinSource2) || \
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((PINSOURCE) == EXTI_PinSource3) || \
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((PINSOURCE) == EXTI_PinSource4) || \
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((PINSOURCE) == EXTI_PinSource5) || \
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((PINSOURCE) == EXTI_PinSource6) || \
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((PINSOURCE) == EXTI_PinSource7) || \
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((PINSOURCE) == EXTI_PinSource8) || \
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((PINSOURCE) == EXTI_PinSource9) || \
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((PINSOURCE) == EXTI_PinSource10) || \
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((PINSOURCE) == EXTI_PinSource11) || \
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((PINSOURCE) == EXTI_PinSource12) || \
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((PINSOURCE) == EXTI_PinSource13) || \
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((PINSOURCE) == EXTI_PinSource14) || \
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((PINSOURCE) == EXTI_PinSource15))
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/**
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* @}
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*/
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/** @defgroup SYSCFG_Memory_Remap_Config
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* @{
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*/
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#define SYSCFG_MemoryRemap_Flash ((uint8_t)0x00)
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#define SYSCFG_MemoryRemap_SystemFlash ((uint8_t)0x01)
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#define SYSCFG_MemoryRemap_SRAM ((uint8_t)0x03)
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#define IS_SYSCFG_MEMORY_REMAP_CONFING(REMAP) (((REMAP) == SYSCFG_MemoryRemap_Flash) || \
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((REMAP) == SYSCFG_MemoryRemap_SystemFlash) || \
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((REMAP) == SYSCFG_MemoryRemap_SRAM))
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/** @defgroup RI_Resistor
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* @{
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*/
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#define RI_Resistor_10KPU COMP_CSR_10KPU
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#define RI_Resistor_400KPU COMP_CSR_400KPU
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#define RI_Resistor_10KPD COMP_CSR_10KPD
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#define RI_Resistor_400KPD COMP_CSR_400KPD
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#define IS_RI_RESISTOR(RESISTOR) (((RESISTOR) == COMP_CSR_10KPU) || \
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((RESISTOR) == COMP_CSR_400KPU) || \
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((RESISTOR) == COMP_CSR_10KPD) || \
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((RESISTOR) == COMP_CSR_400KPD))
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/**
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* @}
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*/
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/** @defgroup RI_InputCapture
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* @{
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*/
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#define RI_InputCapture_IC1 RI_ICR_IC1 /*!< Input Capture 1 */
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#define RI_InputCapture_IC2 RI_ICR_IC2 /*!< Input Capture 2 */
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#define RI_InputCapture_IC3 RI_ICR_IC3 /*!< Input Capture 3 */
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#define RI_InputCapture_IC4 RI_ICR_IC4 /*!< Input Capture 4 */
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#define IS_RI_INPUTCAPTURE(INPUTCAPTURE) ((((INPUTCAPTURE) & (uint32_t)0xFFC2FFFF) == 0x00) && ((INPUTCAPTURE) != (uint32_t)0x00))
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/**
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* @}
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*/
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/** @defgroup TIM_Select
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* @{
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*/
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#define TIM_Select_None ((uint32_t)0x00000000) /*!< None selected */
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#define TIM_Select_TIM2 ((uint32_t)0x00010000) /*!< Timer 2 selected */
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#define TIM_Select_TIM3 ((uint32_t)0x00020000) /*!< Timer 3 selected */
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#define TIM_Select_TIM4 ((uint32_t)0x00030000) /*!< Timer 4 selected */
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#define IS_RI_TIM(TIM) (((TIM) == TIM_Select_None) || \
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((TIM) == TIM_Select_TIM2) || \
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((TIM) == TIM_Select_TIM3) || \
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((TIM) == TIM_Select_TIM4))
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/**
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* @}
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*/
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/** @defgroup RI_InputCaptureRouting
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* @{
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*/
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/* TIMx_IC1 TIMx_IC2 TIMx_IC3 TIMx_IC4 */
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#define RI_InputCaptureRouting_0 ((uint32_t)0x00000000) /* PA0 PA1 PA2 PA3 */
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#define RI_InputCaptureRouting_1 ((uint32_t)0x00000001) /* PA4 PA5 PA6 PA7 */
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#define RI_InputCaptureRouting_2 ((uint32_t)0x00000002) /* PA8 PA9 PA10 PA11 */
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#define RI_InputCaptureRouting_3 ((uint32_t)0x00000003) /* PA12 PA13 PA14 PA15 */
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#define RI_InputCaptureRouting_4 ((uint32_t)0x00000004) /* PC0 PC1 PC2 PC3 */
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#define RI_InputCaptureRouting_5 ((uint32_t)0x00000005) /* PC4 PC5 PC6 PC7 */
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#define RI_InputCaptureRouting_6 ((uint32_t)0x00000006) /* PC8 PC9 PC10 PC11 */
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#define RI_InputCaptureRouting_7 ((uint32_t)0x00000007) /* PC12 PC13 PC14 PC15 */
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#define RI_InputCaptureRouting_8 ((uint32_t)0x00000008) /* PD0 PD1 PD2 PD3 */
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#define RI_InputCaptureRouting_9 ((uint32_t)0x00000009) /* PD4 PD5 PD6 PD7 */
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#define RI_InputCaptureRouting_10 ((uint32_t)0x0000000A) /* PD8 PD9 PD10 PD11 */
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#define RI_InputCaptureRouting_11 ((uint32_t)0x0000000B) /* PD12 PD13 PD14 PD15 */
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#define RI_InputCaptureRouting_12 ((uint32_t)0x0000000C) /* PE0 PE1 PE2 PE3 */
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#define RI_InputCaptureRouting_13 ((uint32_t)0x0000000D) /* PE4 PE5 PE6 PE7 */
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#define RI_InputCaptureRouting_14 ((uint32_t)0x0000000E) /* PE8 PE9 PE10 PE11 */
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#define RI_InputCaptureRouting_15 ((uint32_t)0x0000000F) /* PE12 PE13 PE14 PE15 */
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#define IS_RI_INPUTCAPTURE_ROUTING(ROUTING) (((ROUTING) == RI_InputCaptureRouting_0) || \
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((ROUTING) == RI_InputCaptureRouting_1) || \
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((ROUTING) == RI_InputCaptureRouting_2) || \
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((ROUTING) == RI_InputCaptureRouting_3) || \
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((ROUTING) == RI_InputCaptureRouting_4) || \
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((ROUTING) == RI_InputCaptureRouting_5) || \
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((ROUTING) == RI_InputCaptureRouting_6) || \
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((ROUTING) == RI_InputCaptureRouting_7) || \
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((ROUTING) == RI_InputCaptureRouting_8) || \
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((ROUTING) == RI_InputCaptureRouting_9) || \
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((ROUTING) == RI_InputCaptureRouting_10) || \
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((ROUTING) == RI_InputCaptureRouting_11) || \
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((ROUTING) == RI_InputCaptureRouting_12) || \
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((ROUTING) == RI_InputCaptureRouting_13) || \
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((ROUTING) == RI_InputCaptureRouting_14) || \
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((ROUTING) == RI_InputCaptureRouting_15))
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/**
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* @}
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*/
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/** @defgroup RI_IOSwitch
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* @{
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*/
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/* ASCR1 I/O switch: bit 28 is set to '1' to indicate that the mask is in ASCR1 register */
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#define RI_IOSwitch_CH0 ((uint32_t)0x10000001)
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#define RI_IOSwitch_CH1 ((uint32_t)0x10000002)
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#define RI_IOSwitch_CH2 ((uint32_t)0x10000004)
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#define RI_IOSwitch_CH3 ((uint32_t)0x10000008)
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#define RI_IOSwitch_CH4 ((uint32_t)0x10000010)
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#define RI_IOSwitch_CH5 ((uint32_t)0x10000020)
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#define RI_IOSwitch_CH6 ((uint32_t)0x10000040)
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#define RI_IOSwitch_CH7 ((uint32_t)0x10000080)
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#define RI_IOSwitch_CH8 ((uint32_t)0x10000100)
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#define RI_IOSwitch_CH9 ((uint32_t)0x10000200)
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#define RI_IOSwitch_CH10 ((uint32_t)0x10000400)
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#define RI_IOSwitch_CH11 ((uint32_t)0x10000800)
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#define RI_IOSwitch_CH12 ((uint32_t)0x10001000)
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#define RI_IOSwitch_CH13 ((uint32_t)0x10002000)
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#define RI_IOSwitch_CH14 ((uint32_t)0x10004000)
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#define RI_IOSwitch_CH15 ((uint32_t)0x10008000)
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#define RI_IOSwitch_CH18 ((uint32_t)0x10040000)
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#define RI_IOSwitch_CH19 ((uint32_t)0x10080000)
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#define RI_IOSwitch_CH20 ((uint32_t)0x10100000)
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#define RI_IOSwitch_CH21 ((uint32_t)0x10200000)
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#define RI_IOSwitch_CH22 ((uint32_t)0x10400000)
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#define RI_IOSwitch_CH23 ((uint32_t)0x10800000)
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#define RI_IOSwitch_CH24 ((uint32_t)0x11000000)
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#define RI_IOSwitch_CH25 ((uint32_t)0x12000000)
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#define RI_IOSwitch_VCOMP ((uint32_t)0x14000000) /* VCOMP is an internal switch used to connect
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selected channel to COMP1 non inverting input */
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/* ASCR2 IO switch: : bit 28 is set to '0' to indicate that the mask is in ASCR2 register */
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#define RI_IOSwitch_GR10_1 ((uint32_t)0x00000001)
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#define RI_IOSwitch_GR10_2 ((uint32_t)0x00000002)
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#define RI_IOSwitch_GR10_3 ((uint32_t)0x00000004)
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#define RI_IOSwitch_GR10_4 ((uint32_t)0x00000008)
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#define RI_IOSwitch_GR6_1 ((uint32_t)0x00000010)
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#define RI_IOSwitch_GR6_2 ((uint32_t)0x00000020)
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#define RI_IOSwitch_GR5_1 ((uint32_t)0x00000040)
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#define RI_IOSwitch_GR5_2 ((uint32_t)0x00000080)
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#define RI_IOSwitch_GR5_3 ((uint32_t)0x00000100)
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#define RI_IOSwitch_GR4_1 ((uint32_t)0x00000200)
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#define RI_IOSwitch_GR4_2 ((uint32_t)0x00000400)
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#define RI_IOSwitch_GR4_3 ((uint32_t)0x00000800)
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#define IS_RI_IOSWITCH(IOSWITCH) (((IOSWITCH) == RI_IOSwitch_CH0) || \
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((IOSWITCH) == RI_IOSwitch_CH1) || \
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((IOSWITCH) == RI_IOSwitch_CH2) || \
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((IOSWITCH) == RI_IOSwitch_CH3) || \
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((IOSWITCH) == RI_IOSwitch_CH4) || \
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((IOSWITCH) == RI_IOSwitch_CH5) || \
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((IOSWITCH) == RI_IOSwitch_CH6) || \
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((IOSWITCH) == RI_IOSwitch_CH7) || \
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((IOSWITCH) == RI_IOSwitch_CH8) || \
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((IOSWITCH) == RI_IOSwitch_CH9) || \
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((IOSWITCH) == RI_IOSwitch_CH10) || \
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((IOSWITCH) == RI_IOSwitch_CH11) || \
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((IOSWITCH) == RI_IOSwitch_CH12) || \
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((IOSWITCH) == RI_IOSwitch_CH13) || \
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((IOSWITCH) == RI_IOSwitch_CH14) || \
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((IOSWITCH) == RI_IOSwitch_CH15) || \
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((IOSWITCH) == RI_IOSwitch_CH18) || \
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((IOSWITCH) == RI_IOSwitch_CH19) || \
|
| 272 |
|
|
((IOSWITCH) == RI_IOSwitch_CH20) || \
|
| 273 |
|
|
((IOSWITCH) == RI_IOSwitch_CH21) || \
|
| 274 |
|
|
((IOSWITCH) == RI_IOSwitch_CH22) || \
|
| 275 |
|
|
((IOSWITCH) == RI_IOSwitch_CH23) || \
|
| 276 |
|
|
((IOSWITCH) == RI_IOSwitch_CH24) || \
|
| 277 |
|
|
((IOSWITCH) == RI_IOSwitch_CH25) || \
|
| 278 |
|
|
((IOSWITCH) == RI_IOSwitch_VCOMP) || \
|
| 279 |
|
|
((IOSWITCH) == RI_IOSwitch_GR10_1) || \
|
| 280 |
|
|
((IOSWITCH) == RI_IOSwitch_GR10_2) || \
|
| 281 |
|
|
((IOSWITCH) == RI_IOSwitch_GR10_3) || \
|
| 282 |
|
|
((IOSWITCH) == RI_IOSwitch_GR10_4) || \
|
| 283 |
|
|
((IOSWITCH) == RI_IOSwitch_GR6_1) || \
|
| 284 |
|
|
((IOSWITCH) == RI_IOSwitch_GR6_2) || \
|
| 285 |
|
|
((IOSWITCH) == RI_IOSwitch_GR5_1) || \
|
| 286 |
|
|
((IOSWITCH) == RI_IOSwitch_GR5_2) || \
|
| 287 |
|
|
((IOSWITCH) == RI_IOSwitch_GR5_3) || \
|
| 288 |
|
|
((IOSWITCH) == RI_IOSwitch_GR4_1) || \
|
| 289 |
|
|
((IOSWITCH) == RI_IOSwitch_GR4_2) || \
|
| 290 |
|
|
((IOSWITCH) == RI_IOSwitch_GR4_3))
|
| 291 |
|
|
|
| 292 |
|
|
/** @defgroup RI_Port
|
| 293 |
|
|
* @{
|
| 294 |
|
|
*/
|
| 295 |
|
|
|
| 296 |
|
|
#define RI_PortA ((uint8_t)0x01) /*!< GPIOA selected */
|
| 297 |
|
|
#define RI_PortB ((uint8_t)0x02) /*!< GPIOB selected */
|
| 298 |
|
|
#define RI_PortC ((uint8_t)0x03) /*!< GPIOC selected */
|
| 299 |
|
|
#define RI_PortD ((uint8_t)0x04) /*!< GPIOD selected */
|
| 300 |
|
|
#define RI_PortE ((uint8_t)0x05) /*!< GPIOE selected */
|
| 301 |
|
|
|
| 302 |
|
|
#define IS_RI_PORT(PORT) (((PORT) == RI_PortA) || \
|
| 303 |
|
|
((PORT) == RI_PortB) || \
|
| 304 |
|
|
((PORT) == RI_PortC) || \
|
| 305 |
|
|
((PORT) == RI_PortD) || \
|
| 306 |
|
|
((PORT) == RI_PortE))
|
| 307 |
|
|
/**
|
| 308 |
|
|
* @}
|
| 309 |
|
|
*/
|
| 310 |
|
|
|
| 311 |
|
|
/** @defgroup RI_Pin define
|
| 312 |
|
|
* @{
|
| 313 |
|
|
*/
|
| 314 |
|
|
#define RI_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
|
| 315 |
|
|
#define RI_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
|
| 316 |
|
|
#define RI_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
|
| 317 |
|
|
#define RI_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
|
| 318 |
|
|
#define RI_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
|
| 319 |
|
|
#define RI_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
|
| 320 |
|
|
#define RI_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
|
| 321 |
|
|
#define RI_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
|
| 322 |
|
|
#define RI_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
|
| 323 |
|
|
#define RI_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
|
| 324 |
|
|
#define RI_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
|
| 325 |
|
|
#define RI_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
|
| 326 |
|
|
#define RI_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
|
| 327 |
|
|
#define RI_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
|
| 328 |
|
|
#define RI_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
|
| 329 |
|
|
#define RI_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
|
| 330 |
|
|
#define RI_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
|
| 331 |
|
|
|
| 332 |
|
|
#define IS_RI_PIN(PIN) ((PIN) != (uint16_t)0x00)
|
| 333 |
|
|
|
| 334 |
|
|
/**
|
| 335 |
|
|
* @}
|
| 336 |
|
|
*/
|
| 337 |
|
|
|
| 338 |
|
|
/**
|
| 339 |
|
|
* @}
|
| 340 |
|
|
*/
|
| 341 |
|
|
|
| 342 |
|
|
/** @defgroup SYSCFG_Exported_Macros
|
| 343 |
|
|
* @{
|
| 344 |
|
|
*/
|
| 345 |
|
|
/**
|
| 346 |
|
|
* @}
|
| 347 |
|
|
*/
|
| 348 |
|
|
|
| 349 |
|
|
/** @defgroup SYSCFG_Exported_Functions
|
| 350 |
|
|
* @{
|
| 351 |
|
|
*/
|
| 352 |
|
|
void SYSCFG_DeInit(void);
|
| 353 |
|
|
void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap);
|
| 354 |
|
|
void SYSCFG_USBPuCmd(FunctionalState NewState);
|
| 355 |
|
|
void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex);
|
| 356 |
|
|
void SYSCFG_RIDeInit(void);
|
| 357 |
|
|
void SYSCFG_RITIMSelect(uint32_t TIM_Select);
|
| 358 |
|
|
void SYSCFG_RITIMInputCaptureConfig(uint32_t RI_InputCapture, uint32_t RI_InputCaptureRouting);
|
| 359 |
|
|
void SYSCFG_RIResistorConfig(uint32_t RI_Resistor, FunctionalState NewState);
|
| 360 |
|
|
void SYSCFG_RISwitchControlModeCmd(FunctionalState NewState);
|
| 361 |
|
|
void SYSCFG_RIIOSwitchConfig(uint32_t RI_IOSwitch, FunctionalState NewState);
|
| 362 |
|
|
void SYSCFG_RIHysteresisConfig(uint8_t RI_Port, uint16_t RI_Pin,
|
| 363 |
|
|
FunctionalState NewState);
|
| 364 |
|
|
#ifdef __cplusplus
|
| 365 |
|
|
}
|
| 366 |
|
|
#endif
|
| 367 |
|
|
|
| 368 |
|
|
#endif /*__STM32L1xx_SYSCFG_H */
|
| 369 |
|
|
/**
|
| 370 |
|
|
* @}
|
| 371 |
|
|
*/
|
| 372 |
|
|
|
| 373 |
|
|
/**
|
| 374 |
|
|
* @}
|
| 375 |
|
|
*/
|
| 376 |
|
|
|
| 377 |
|
|
/**
|
| 378 |
|
|
* @}
|
| 379 |
|
|
*/
|
| 380 |
|
|
|
| 381 |
|
|
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|
