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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [CORTEX_STM32L152_IAR/] [system_and_ST_code/] [STM32L1xx_StdPeriph_Driver/] [src/] [stm32l1xx_spi.c] - Blame information for rev 582

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1 582 jeremybenn
/**
2
  ******************************************************************************
3
  * @file    stm32l1xx_spi.c
4
  * @author  MCD Application Team
5
  * @version V1.0.0RC1
6
  * @date    07/02/2010
7
  * @brief   This file provides all the SPI firmware functions.
8
  ******************************************************************************
9
  * @copy
10
  *
11
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
12
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
13
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
14
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
15
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
16
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
17
  *
18
  * <h2><center>&copy; COPYRIGHT 2010 STMicroelectronics</center></h2>
19
  */
20
 
21
/* Includes ------------------------------------------------------------------*/
22
#include "stm32l1xx_spi.h"
23
#include "stm32l1xx_rcc.h"
24
 
25
/** @addtogroup STM32L1xx_StdPeriph_Driver
26
  * @{
27
  */
28
 
29
/** @defgroup SPI
30
  * @brief SPI driver modules
31
  * @{
32
  */
33
 
34
/** @defgroup SPI_Private_TypesDefinitions
35
  * @{
36
  */
37
 
38
/**
39
  * @}
40
  */
41
 
42
 
43
/** @defgroup SPI_Private_Defines
44
  * @{
45
  */
46
 
47
/* SPI registers Masks */
48
#define CR1_CLEAR_MASK       ((uint16_t)0x3040)
49
 
50
/**
51
  * @}
52
  */
53
 
54
/** @defgroup SPI_Private_Macros
55
  * @{
56
  */
57
 
58
/**
59
  * @}
60
  */
61
 
62
/** @defgroup SPI_Private_Variables
63
  * @{
64
  */
65
 
66
/**
67
  * @}
68
  */
69
 
70
/** @defgroup SPI_Private_FunctionPrototypes
71
  * @{
72
  */
73
 
74
/**
75
  * @}
76
  */
77
 
78
/** @defgroup SPI_Private_Functions
79
  * @{
80
  */
81
 
82
/**
83
  * @brief  Deinitializes the SPIx peripheral registers to their default
84
  *         reset values.
85
  * @param  SPIx: where x can be 1 or 2 to select the SPI peripheral.
86
  * @retval None
87
  */
88
void SPI_DeInit(SPI_TypeDef* SPIx)
89
{
90
  /* Check the parameters */
91
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
92
 
93
  if (SPIx == SPI1)
94
  {
95
    /* Enable SPI1 reset state */
96
    RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
97
    /* Release SPI1 from reset state */
98
    RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
99
  }
100
  else
101
  {
102
    if (SPIx == SPI2)
103
    {
104
      /* Enable SPI2 reset state */
105
      RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
106
      /* Release SPI2 from reset state */
107
      RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
108
    }
109
  }
110
}
111
 
112
/**
113
  * @brief  Initializes the SPIx peripheral according to the specified
114
  *   parameters in the SPI_InitStruct.
115
  * @param  SPIx: where x can be 1 or 2 to select the SPI peripheral.
116
  * @param  SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
117
  *   contains the configuration information for the specified SPI peripheral.
118
  * @retval None
119
  */
120
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
121
{
122
  uint16_t tmpreg = 0;
123
 
124
  /* check the parameters */
125
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
126
 
127
  /* Check the SPI parameters */
128
  assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
129
  assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
130
  assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
131
  assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
132
  assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
133
  assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
134
  assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
135
  assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
136
  assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
137
 
138
/*---------------------------- SPIx CR1 Configuration ------------------------*/
139
  /* Get the SPIx CR1 value */
140
  tmpreg = SPIx->CR1;
141
  /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
142
  tmpreg &= CR1_CLEAR_MASK;
143
  /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
144
     master/salve mode, CPOL and CPHA */
145
  /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
146
  /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
147
  /* Set LSBFirst bit according to SPI_FirstBit value */
148
  /* Set BR bits according to SPI_BaudRatePrescaler value */
149
  /* Set CPOL bit according to SPI_CPOL value */
150
  /* Set CPHA bit according to SPI_CPHA value */
151
  tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
152
                  SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
153
                  SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
154
                  SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
155
  /* Write to SPIx CR1 */
156
  SPIx->CR1 = tmpreg;
157
 
158
/*---------------------------- SPIx CRCPOLY Configuration --------------------*/
159
  /* Write to SPIx CRCPOLY */
160
  SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
161
}
162
 
163
/**
164
  * @brief  Fills each SPI_InitStruct member with its default value.
165
  * @param  SPI_InitStruct : pointer to a SPI_InitTypeDef structure which will be initialized.
166
  * @retval None
167
  */
168
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
169
{
170
/*--------------- Reset SPI init structure parameters values -----------------*/
171
  /* Initialize the SPI_Direction member */
172
  SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
173
  /* initialize the SPI_Mode member */
174
  SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
175
  /* initialize the SPI_DataSize member */
176
  SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
177
  /* Initialize the SPI_CPOL member */
178
  SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
179
  /* Initialize the SPI_CPHA member */
180
  SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
181
  /* Initialize the SPI_NSS member */
182
  SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
183
  /* Initialize the SPI_BaudRatePrescaler member */
184
  SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
185
  /* Initialize the SPI_FirstBit member */
186
  SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
187
  /* Initialize the SPI_CRCPolynomial member */
188
  SPI_InitStruct->SPI_CRCPolynomial = 7;
189
}
190
 
191
 
192
/**
193
  * @brief  Enables or disables the specified SPI peripheral.
194
  * @param  SPIx: where x can be 1 or 2 to select the SPI peripheral.
195
  * @param  NewState: new state of the SPIx peripheral.
196
  *   This parameter can be: ENABLE or DISABLE.
197
  * @retval None
198
  */
199
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
200
{
201
  /* Check the parameters */
202
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
203
  assert_param(IS_FUNCTIONAL_STATE(NewState));
204
  if (NewState != DISABLE)
205
  {
206
    /* Enable the selected SPI peripheral */
207
    SPIx->CR1 |= SPI_CR1_SPE;
208
  }
209
  else
210
  {
211
    /* Disable the selected SPI peripheral */
212
    SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE);
213
  }
214
}
215
 
216
/**
217
  * @brief  Enables or disables the specified SPI interrupts.
218
  * @param  SPIx: where x can be 1 or 2 in SPI mode
219
  * @param  SPI_IT: specifies the SPI interrupt source to be enabled or disabled.
220
  *   This parameter can be one of the following values:
221
  *     @arg SPI_IT_TXE: Tx buffer empty interrupt mask
222
  *     @arg SPI_IT_RXNE: Rx buffer not empty interrupt mask
223
  *     @arg SPI_IT_ERR: Error interrupt mask
224
  * @param  NewState: new state of the specified SPI interrupt.
225
  *   This parameter can be: ENABLE or DISABLE.
226
  * @retval None
227
  */
228
void SPI_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_IT, FunctionalState NewState)
229
{
230
  uint16_t itpos = 0, itmask = 0 ;
231
  /* Check the parameters */
232
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
233
  assert_param(IS_FUNCTIONAL_STATE(NewState));
234
  assert_param(IS_SPI_CONFIG_IT(SPI_IT));
235
 
236
  /* Get the SPI IT index */
237
  itpos = SPI_IT >> 4;
238
 
239
  /* Set the IT mask */
240
  itmask = (uint16_t)1 << (uint16_t)itpos;
241
 
242
  if (NewState != DISABLE)
243
  {
244
    /* Enable the selected SPI interrupt */
245
    SPIx->CR2 |= itmask;
246
  }
247
  else
248
  {
249
    /* Disable the selected SPI interrupt */
250
    SPIx->CR2 &= (uint16_t)~itmask;
251
  }
252
}
253
 
254
/**
255
  * @brief  Enables or disables the SPIx DMA interface.
256
  * @param  SPIx: where x can be 1 or 2 in SPI mode
257
  * @param  SPI_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled.
258
  *   This parameter can be any combination of the following values:
259
  *     @arg SPI_DMAReq_Tx: Tx buffer DMA transfer request
260
  *     @arg SPI_DMAReq_Rx: Rx buffer DMA transfer request
261
  * @param  NewState: new state of the selected SPI DMA transfer request.
262
  *   This parameter can be: ENABLE or DISABLE.
263
  * @retval None
264
  */
265
void SPI_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_DMAReq, FunctionalState NewState)
266
{
267
  /* Check the parameters */
268
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
269
  assert_param(IS_FUNCTIONAL_STATE(NewState));
270
  assert_param(IS_SPI_DMAREQ(SPI_DMAReq));
271
  if (NewState != DISABLE)
272
  {
273
    /* Enable the selected SPI DMA requests */
274
    SPIx->CR2 |= SPI_DMAReq;
275
  }
276
  else
277
  {
278
    /* Disable the selected SPI DMA requests */
279
    SPIx->CR2 &= (uint16_t)~SPI_DMAReq;
280
  }
281
}
282
 
283
/**
284
  * @brief  Transmits a Data through the SPIx peripheral.
285
  * @param  SPIx: where x can be 1 or 2 in SPI mode
286
  * @param  Data : Data to be transmitted.
287
  * @retval None
288
  */
289
void SPI_SendData(SPI_TypeDef* SPIx, uint16_t Data)
290
{
291
  /* Check the parameters */
292
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
293
 
294
  /* Write in the DR register the data to be sent */
295
  SPIx->DR = Data;
296
}
297
 
298
/**
299
  * @brief  Returns the most recent received data by the SPIx peripheral.
300
  * @param  SPIx: where x can be 1 or 2 in SPI mode
301
  * @retval The value of the received data.
302
  */
303
uint16_t SPI_ReceiveData(SPI_TypeDef* SPIx)
304
{
305
  /* Check the parameters */
306
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
307
 
308
  /* Return the data in the DR register */
309
  return SPIx->DR;
310
}
311
 
312
/**
313
  * @brief  Configures internally by software the NSS pin for the selected SPI.
314
  * @param  SPIx: where x can be 1 or 2 to select the SPI peripheral.
315
  * @param  SPI_NSSInternalSoft: specifies the SPI NSS internal state.
316
  *   This parameter can be one of the following values:
317
  *     @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
318
  *     @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
319
  * @retval None
320
  */
321
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
322
{
323
  /* Check the parameters */
324
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
325
  assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
326
  if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
327
  {
328
    /* Set NSS pin internally by software */
329
    SPIx->CR1 |= SPI_NSSInternalSoft_Set;
330
  }
331
  else
332
  {
333
    /* Reset NSS pin internally by software */
334
    SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
335
  }
336
}
337
 
338
/**
339
  * @brief  Enables or disables the SS output for the selected SPI.
340
  * @param  SPIx: where x can be 1 or 2 to select the SPI peripheral.
341
  * @param  NewState: new state of the SPIx SS output.
342
  *   This parameter can be: ENABLE or DISABLE.
343
  * @retval None
344
  */
345
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
346
{
347
  /* Check the parameters */
348
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
349
  assert_param(IS_FUNCTIONAL_STATE(NewState));
350
  if (NewState != DISABLE)
351
  {
352
    /* Enable the selected SPI SS output */
353
    SPIx->CR2 |= (uint16_t)SPI_CR2_SSOE;
354
  }
355
  else
356
  {
357
    /* Disable the selected SPI SS output */
358
    SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE);
359
  }
360
}
361
 
362
/**
363
  * @brief  Configures the data size for the selected SPI.
364
  * @param  SPIx: where x can be 1 or 2  to select the SPI peripheral.
365
  * @param  SPI_DataSize: specifies the SPI data size.
366
  *   This parameter can be one of the following values:
367
  *     @arg SPI_DataSize_16b: Set data frame format to 16bit
368
  *     @arg SPI_DataSize_8b: Set data frame format to 8bit
369
  * @retval None
370
  */
371
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
372
{
373
  /* Check the parameters */
374
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
375
  assert_param(IS_SPI_DATASIZE(SPI_DataSize));
376
  /* Clear DFF bit */
377
  SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
378
  /* Set new DFF bit value */
379
  SPIx->CR1 |= SPI_DataSize;
380
}
381
 
382
/**
383
  * @brief  Transmit the SPIx CRC value.
384
  * @param  SPIx: where x can be 1 or 2  to select the SPI peripheral.
385
  * @retval None
386
  */
387
void SPI_TransmitCRC(SPI_TypeDef* SPIx)
388
{
389
  /* Check the parameters */
390
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
391
 
392
  /* Enable the selected SPI CRC transmission */
393
  SPIx->CR1 |= SPI_CR1_CRCNEXT;
394
}
395
 
396
/**
397
  * @brief  Enables or disables the CRC value calculation of the transfered bytes.
398
  * @param  SPIx: where x can be 1 or 2  to select the SPI peripheral.
399
  * @param  NewState: new state of the SPIx CRC value calculation.
400
  *   This parameter can be: ENABLE or DISABLE.
401
  * @retval None
402
  */
403
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
404
{
405
  /* Check the parameters */
406
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
407
  assert_param(IS_FUNCTIONAL_STATE(NewState));
408
  if (NewState != DISABLE)
409
  {
410
    /* Enable the selected SPI CRC calculation */
411
    SPIx->CR1 |= SPI_CR1_CRCEN;
412
  }
413
  else
414
  {
415
    /* Disable the selected SPI CRC calculation */
416
    SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN);
417
  }
418
}
419
 
420
/**
421
  * @brief  Returns the transmit or the receive CRC register value for the specified SPI.
422
  * @param  SPIx: where x can be 1 or 2  to select the SPI peripheral.
423
  * @param  SPI_CRC: specifies the CRC register to be read.
424
  *   This parameter can be one of the following values:
425
  *     @arg SPI_CRC_Tx: Selects Tx CRC register
426
  *     @arg SPI_CRC_Rx: Selects Rx CRC register
427
  * @retval The selected CRC register value..
428
  */
429
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
430
{
431
  uint16_t crcreg = 0;
432
  /* Check the parameters */
433
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
434
  assert_param(IS_SPI_CRC(SPI_CRC));
435
  if (SPI_CRC != SPI_CRC_Rx)
436
  {
437
    /* Get the Tx CRC register */
438
    crcreg = SPIx->TXCRCR;
439
  }
440
  else
441
  {
442
    /* Get the Rx CRC register */
443
    crcreg = SPIx->RXCRCR;
444
  }
445
  /* Return the selected CRC register */
446
  return crcreg;
447
}
448
 
449
/**
450
  * @brief  Returns the CRC Polynomial register value for the specified SPI.
451
  * @param  SPIx: where x can be 1 or 2  to select the SPI peripheral.
452
  * @retval The CRC Polynomial register value.
453
  */
454
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
455
{
456
  /* Check the parameters */
457
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
458
 
459
  /* Return the CRC polynomial register */
460
  return SPIx->CRCPR;
461
}
462
 
463
/**
464
  * @brief  Selects the data transfer direction in bi-directional mode for the specified SPI.
465
  * @param  SPIx: where x can be 1 or 2  to select the SPI peripheral.
466
  * @param  SPI_Direction: specifies the data transfer direction in bi-directional mode.
467
  *   This parameter can be one of the following values:
468
  *     @arg SPI_Direction_Tx: Selects Tx transmission direction
469
  *     @arg SPI_Direction_Rx: Selects Rx receive direction
470
  * @retval None
471
  */
472
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
473
{
474
  /* Check the parameters */
475
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
476
  assert_param(IS_SPI_DIRECTION(SPI_Direction));
477
  if (SPI_Direction == SPI_Direction_Tx)
478
  {
479
    /* Set the Tx only mode */
480
    SPIx->CR1 |= SPI_Direction_Tx;
481
  }
482
  else
483
  {
484
    /* Set the Rx only mode */
485
    SPIx->CR1 &= SPI_Direction_Rx;
486
  }
487
}
488
 
489
/**
490
  * @brief  Checks whether the specified SPI flag is set or not.
491
  * @param  SPIx: where x can be 1 or 2 in SPI mode
492
  * @param  SPI_FLAG: specifies the SPI flag to check.
493
  *   This parameter can be one of the following values:
494
  *     @arg SPI_FLAG_TXE: Transmit buffer empty flag.
495
  *     @arg SPI_FLAG_RXNE: Receive buffer not empty flag.
496
  *     @arg SPI_FLAG_BSY: Busy flag.
497
  *     @arg SPI_FLAG_OVR: Overrun flag.
498
  *     @arg SPI_FLAG_MODF: Mode Fault flag.
499
  *     @arg SPI_FLAG_CRCERR: CRC Error flag.
500
  * @retval The new state of SPI_FLAG (SET or RESET).
501
  */
502
FlagStatus SPI_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_FLAG)
503
{
504
  FlagStatus bitstatus = RESET;
505
  /* Check the parameters */
506
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
507
  assert_param(IS_SPI_GET_FLAG(SPI_FLAG));
508
  /* Check the status of the specified SPI flag */
509
  if ((SPIx->SR & SPI_FLAG) != (uint16_t)RESET)
510
  {
511
    /* SPI_FLAG is set */
512
    bitstatus = SET;
513
  }
514
  else
515
  {
516
    /* SPI_FLAG is reset */
517
    bitstatus = RESET;
518
  }
519
  /* Return the SPI_FLAG status */
520
  return  bitstatus;
521
}
522
 
523
/**
524
  * @brief  Clears the SPIx CRC Error (CRCERR) flag.
525
  * @param  SPIx: where x can be 1 or 2 in SPI mode
526
  * @param  SPI_FLAG: specifies the SPI flag to clear.
527
  *   This function clears only CRCERR flag.
528
  * @note
529
  *   - OVR (OverRun error) flag is cleared by software sequence: a read
530
  *     operation to SPI_DR register (SPI_ReceiveData()) followed by a read
531
  *     operation to SPI_SR register (SPI_GetFlagStatus()).
532
  *   - UDR (UnderRun error) flag is cleared by a read operation to
533
  *     SPI_SR register (SPI_GetFlagStatus()).
534
  *   - MODF (Mode Fault) flag is cleared by software sequence: a read/write
535
  *     operation to SPI_SR register (SPI_GetFlagStatus()) followed by a
536
  *     write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
537
  * @retval None
538
  */
539
void SPI_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_FLAG)
540
{
541
  /* Check the parameters */
542
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
543
  assert_param(IS_SPI_CLEAR_FLAG(SPI_FLAG));
544
 
545
    /* Clear the selected SPI CRC Error (CRCERR) flag */
546
    SPIx->SR = (uint16_t)~SPI_FLAG;
547
}
548
 
549
/**
550
  * @brief  Checks whether the specified SPI interrupt has occurred or not.
551
  * @param  SPIx: where x can be
552
  *   - 1 or 2 in SPI mode
553
  * @param  SPI_IT: specifies the SPI interrupt source to check.
554
  *   This parameter can be one of the following values:
555
  *     @arg SPI_IT_TXE: Transmit buffer empty interrupt.
556
  *     @arg SPI_IT_RXNE: Receive buffer not empty interrupt.
557
  *     @arg SPI_IT_OVR: Overrun interrupt.
558
  *     @arg SPI_IT_MODF: Mode Fault interrupt.
559
  *     @arg SPI_IT_CRCERR: CRC Error interrupt.
560
  * @retval The new state of SPI_IT (SET or RESET).
561
  */
562
ITStatus SPI_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_IT)
563
{
564
  ITStatus bitstatus = RESET;
565
  uint16_t itpos = 0, itmask = 0, enablestatus = 0;
566
 
567
  /* Check the parameters */
568
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
569
  assert_param(IS_SPI_GET_IT(SPI_IT));
570
 
571
  /* Get the SPI IT index */
572
  itpos = 0x01 << (SPI_IT & 0x0F);
573
 
574
  /* Get the SPI IT mask */
575
  itmask = SPI_IT >> 4;
576
 
577
  /* Set the IT mask */
578
  itmask = 0x01 << itmask;
579
 
580
  /* Get the SPI_IT enable bit status */
581
  enablestatus = (SPIx->CR2 & itmask) ;
582
 
583
  /* Check the status of the specified SPI interrupt */
584
  if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
585
  {
586
    /* SPI_IT is set */
587
    bitstatus = SET;
588
  }
589
  else
590
  {
591
    /* SPI_IT is reset */
592
    bitstatus = RESET;
593
  }
594
  /* Return the SPI_IT status */
595
  return bitstatus;
596
}
597
 
598
/**
599
  * @brief  Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
600
  * @param  SPIx: where x can be
601
  *   - 1 or 2 in SPI mode
602
  * @param  SPI_IT: specifies the SPI interrupt pending bit to clear.
603
  *   This function clears only CRCERR intetrrupt pending bit.
604
  * @note
605
  *   - OVR (OverRun Error) interrupt pending bit is cleared by software
606
  *     sequence: a read operation to SPI_DR register (SPI_ReceiveData())
607
  *     followed by a read operation to SPI_SR register (SPI_GetITStatus()).
608
  *   - UDR (UnderRun Error) interrupt pending bit is cleared by a read
609
  *     operation to SPI_SR register (SPI_GetITStatus()).
610
  *   - MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
611
  *     a read/write operation to SPI_SR register (SPI_GetITStatus())
612
  *     followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
613
  *     the SPI).
614
  * @retval None
615
  */
616
void SPI_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_IT)
617
{
618
  uint16_t itpos = 0;
619
  /* Check the parameters */
620
  assert_param(IS_SPI_ALL_PERIPH(SPIx));
621
  assert_param(IS_SPI_CLEAR_IT(SPI_IT));
622
 
623
  /* Get the SPI IT index */
624
  itpos = 0x01 << (SPI_IT & 0x0F);
625
 
626
  /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
627
  SPIx->SR = (uint16_t)~itpos;
628
}
629
/**
630
  * @}
631
  */
632
 
633
/**
634
  * @}
635
  */
636
 
637
/**
638
  * @}
639
  */
640
 
641
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/

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