1 |
582 |
jeremybenn |
/**
|
2 |
|
|
******************************************************************************
|
3 |
|
|
* @file stm32l1xx_syscfg.c
|
4 |
|
|
* @author MCD Application Team
|
5 |
|
|
* @version V1.0.0RC1
|
6 |
|
|
* @date 07/02/2010
|
7 |
|
|
* @brief This file provides all the SYSCFG and RI firmware functions.
|
8 |
|
|
******************************************************************************
|
9 |
|
|
* @copy
|
10 |
|
|
*
|
11 |
|
|
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
12 |
|
|
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
13 |
|
|
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
14 |
|
|
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
15 |
|
|
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
16 |
|
|
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
17 |
|
|
*
|
18 |
|
|
* <h2><center>© COPYRIGHT 2010 STMicroelectronics</center></h2>
|
19 |
|
|
*/
|
20 |
|
|
|
21 |
|
|
/* Includes ------------------------------------------------------------------*/
|
22 |
|
|
#include "stm32l1xx_syscfg.h"
|
23 |
|
|
#include "stm32l1xx_rcc.h"
|
24 |
|
|
|
25 |
|
|
/** @addtogroup STM32L1xx_StdPeriph_Driver
|
26 |
|
|
* @{
|
27 |
|
|
*/
|
28 |
|
|
|
29 |
|
|
/** @defgroup SYSCFG
|
30 |
|
|
* @brief SYSCFG driver modules
|
31 |
|
|
* @{
|
32 |
|
|
*/
|
33 |
|
|
|
34 |
|
|
/** @defgroup SYSCFG_Private_TypesDefinitions
|
35 |
|
|
* @{
|
36 |
|
|
*/
|
37 |
|
|
/**
|
38 |
|
|
* @}
|
39 |
|
|
*/
|
40 |
|
|
|
41 |
|
|
/** @defgroup SYSCFG_Private_Defines
|
42 |
|
|
* @{
|
43 |
|
|
*/
|
44 |
|
|
|
45 |
|
|
#define RI_ICR_RESET_VALUE ((uint32_t)0x00000000) /*!< ICR Reset value */
|
46 |
|
|
#define RI_ASCR1_RESET_VALUE ((uint32_t)0x00000000) /*!< ASCR1 Reset value */
|
47 |
|
|
#define RI_ASCR2_RESET_VALUE ((uint32_t)0x00000000) /*!< ASCR2 Reset value */
|
48 |
|
|
#define RI_HYSCR1_RESET_VALUE ((uint32_t)0x00000000) /*!< HYSCR1 Reset value */
|
49 |
|
|
#define RI_HYSCR2_RESET_VALUE ((uint32_t)0x00000000) /*!< HYSCR2 Reset value */
|
50 |
|
|
#define RI_HYSCR3_RESET_VALUE ((uint32_t)0x00000000) /*!< HYSCR3 Reset value */
|
51 |
|
|
|
52 |
|
|
#define TIM_SELECT_MASK ((uint32_t)0xFFFCFFFF) /*!< TIM select mask */
|
53 |
|
|
#define IC_ROUTING_MASK ((uint32_t)0x0000000F) /*!< Input Capture routing mask */
|
54 |
|
|
|
55 |
|
|
/**
|
56 |
|
|
* @}
|
57 |
|
|
*/
|
58 |
|
|
|
59 |
|
|
/** @defgroup SYSCFG_Private_Macros
|
60 |
|
|
* @{
|
61 |
|
|
*/
|
62 |
|
|
/**
|
63 |
|
|
* @}
|
64 |
|
|
*/
|
65 |
|
|
|
66 |
|
|
/** @defgroup SYSCFG_Private_Variables
|
67 |
|
|
* @{
|
68 |
|
|
*/
|
69 |
|
|
/**
|
70 |
|
|
* @}
|
71 |
|
|
*/
|
72 |
|
|
|
73 |
|
|
/** @defgroup SYSCFG_Private_FunctionPrototypes
|
74 |
|
|
* @{
|
75 |
|
|
*/
|
76 |
|
|
/**
|
77 |
|
|
* @}
|
78 |
|
|
*/
|
79 |
|
|
|
80 |
|
|
/** @defgroup SYSCFG_Private_Functions
|
81 |
|
|
* @{
|
82 |
|
|
*/
|
83 |
|
|
|
84 |
|
|
/**
|
85 |
|
|
* @brief Deinitializes the syscfg registers to their default reset values.
|
86 |
|
|
* @param None
|
87 |
|
|
* @retval None
|
88 |
|
|
* @ Note: MEMRMP bits are not reset by APB2 reset.
|
89 |
|
|
*/
|
90 |
|
|
void SYSCFG_DeInit(void)
|
91 |
|
|
{
|
92 |
|
|
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, ENABLE);
|
93 |
|
|
RCC_APB2PeriphResetCmd(RCC_APB2Periph_SYSCFG, DISABLE);
|
94 |
|
|
}
|
95 |
|
|
|
96 |
|
|
/**
|
97 |
|
|
* @brief Changes the mapping of the specified pin.
|
98 |
|
|
* @param SYSCFG_Memory: selects the memory remapping.
|
99 |
|
|
* This parameter can be one of the following values:
|
100 |
|
|
* @arg SYSCFG_MemoryRemap_Flash: Main Flash memory mapped at 0x00000000
|
101 |
|
|
* @arg SYSCFG_MemoryRemap_SystemFlash: System Flash memory mapped at 0x00000000
|
102 |
|
|
* @arg SYSCFG_MemoryRemap_SRAM: Embedded SRAM mapped at 0x00000000
|
103 |
|
|
* @retval None
|
104 |
|
|
*/
|
105 |
|
|
void SYSCFG_MemoryRemapConfig(uint8_t SYSCFG_MemoryRemap)
|
106 |
|
|
{
|
107 |
|
|
/* Check the parameters */
|
108 |
|
|
assert_param(IS_SYSCFG_MEMORY_REMAP_CONFING(SYSCFG_MemoryRemap));
|
109 |
|
|
SYSCFG->MEMRMP = SYSCFG_MemoryRemap;
|
110 |
|
|
}
|
111 |
|
|
|
112 |
|
|
/**
|
113 |
|
|
* @brief Control the internal pull-up on USB DP line.
|
114 |
|
|
* @param NewState: New state of the switch control mode.
|
115 |
|
|
* This parameter can be ENABLE: Connect internal pull-up on USB DP line.
|
116 |
|
|
* or DISABLE: Disconnect internal pull-up on USB DP line.
|
117 |
|
|
* @retval None
|
118 |
|
|
*/
|
119 |
|
|
void SYSCFG_USBPuCmd(FunctionalState NewState)
|
120 |
|
|
{
|
121 |
|
|
/* Check the parameters */
|
122 |
|
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
123 |
|
|
|
124 |
|
|
if (NewState != DISABLE)
|
125 |
|
|
{
|
126 |
|
|
/* Connect internal pull-up on USB DP line */
|
127 |
|
|
SYSCFG->PMC |= (uint32_t) SYSCFG_PMC_USB_PU;
|
128 |
|
|
}
|
129 |
|
|
else
|
130 |
|
|
{
|
131 |
|
|
/* Disconnect internal pull-up on USB DP line */
|
132 |
|
|
SYSCFG->PMC &= (uint32_t)(~SYSCFG_PMC_USB_PU);
|
133 |
|
|
}
|
134 |
|
|
}
|
135 |
|
|
|
136 |
|
|
/**
|
137 |
|
|
* @brief Selects the GPIO pin used as EXTI Line.
|
138 |
|
|
* @param EXTI_PortSourceGPIOx : selects the GPIO port to be used as source
|
139 |
|
|
* for EXTI lines where x can be (A, B, C, D, E or H).
|
140 |
|
|
* @param EXTI_PinSourcex: specifies the EXTI line to be configured.
|
141 |
|
|
* This parameter can be EXTI_PinSourcex where x can be (0..15)
|
142 |
|
|
* @retval None
|
143 |
|
|
*/
|
144 |
|
|
void SYSCFG_EXTILineConfig(uint8_t EXTI_PortSourceGPIOx, uint8_t EXTI_PinSourcex)
|
145 |
|
|
{
|
146 |
|
|
uint32_t tmp = 0x00;
|
147 |
|
|
|
148 |
|
|
/* Check the parameters */
|
149 |
|
|
assert_param(IS_EXTI_PORT_SOURCE(EXTI_PortSourceGPIOx));
|
150 |
|
|
assert_param(IS_EXTI_PIN_SOURCE(EXTI_PinSourcex));
|
151 |
|
|
|
152 |
|
|
tmp = ((uint32_t)0x0F) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03));
|
153 |
|
|
SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] &= ~tmp;
|
154 |
|
|
SYSCFG->EXTICR[EXTI_PinSourcex >> 0x02] |= (((uint32_t)EXTI_PortSourceGPIOx) << (0x04 * (EXTI_PinSourcex & (uint8_t)0x03)));
|
155 |
|
|
}
|
156 |
|
|
|
157 |
|
|
/**
|
158 |
|
|
* @brief Deinitializes the RI registers to their default reset values.
|
159 |
|
|
* @param None
|
160 |
|
|
* @retval None
|
161 |
|
|
*/
|
162 |
|
|
void SYSCFG_RIDeInit(void)
|
163 |
|
|
{
|
164 |
|
|
RI->ICR = RI_ICR_RESET_VALUE; /*!< Set RI->ICR to reset value */
|
165 |
|
|
RI->ASCR1 = RI_ASCR1_RESET_VALUE; /*!< Set RI->ASCR1 to reset value */
|
166 |
|
|
RI->ASCR2 = RI_ASCR2_RESET_VALUE; /*!< Set RI->ASCR2 to reset value */
|
167 |
|
|
RI->HYSCR1 = RI_HYSCR1_RESET_VALUE; /*!< Set RI->HYSCR1 to reset value */
|
168 |
|
|
RI->HYSCR2 = RI_HYSCR2_RESET_VALUE; /*!< Set RI->HYSCR2 to reset value */
|
169 |
|
|
RI->HYSCR3 = RI_HYSCR3_RESET_VALUE; /*!< Set RI->HYSCR3 to reset value */
|
170 |
|
|
}
|
171 |
|
|
|
172 |
|
|
/**
|
173 |
|
|
* @brief Configures the routing interface to select which Timer to be routed.
|
174 |
|
|
* @param TIM_Select: Timer select.
|
175 |
|
|
* This parameter can be one of the following values:
|
176 |
|
|
* @arg TIM_Select_None : No timer selected
|
177 |
|
|
* @arg TIM_Select_TIM2 : Timer 2 selected
|
178 |
|
|
* @arg TIM_Select_TIM3 : Timer 3 selected
|
179 |
|
|
* @arg TIM_Select_TIM4 : Timer 4 selected
|
180 |
|
|
* @retval None.
|
181 |
|
|
*/
|
182 |
|
|
void SYSCFG_RITIMSelect(uint32_t TIM_Select)
|
183 |
|
|
{
|
184 |
|
|
uint32_t tmpreg = 0;
|
185 |
|
|
|
186 |
|
|
/* Check the parameters */
|
187 |
|
|
assert_param(IS_RI_TIM(TIM_Select));
|
188 |
|
|
|
189 |
|
|
/* Get the old register value */
|
190 |
|
|
tmpreg = RI->ICR;
|
191 |
|
|
|
192 |
|
|
/* Clear the TIMx select bits */
|
193 |
|
|
tmpreg &= TIM_SELECT_MASK;
|
194 |
|
|
|
195 |
|
|
/* Select the Timer */
|
196 |
|
|
tmpreg |= (TIM_Select);
|
197 |
|
|
|
198 |
|
|
/* Write to RI->ICR register */
|
199 |
|
|
RI->ICR = tmpreg;
|
200 |
|
|
}
|
201 |
|
|
|
202 |
|
|
/**
|
203 |
|
|
* @brief Configures the routing interface to select which Timer Input Capture
|
204 |
|
|
* to be routed to a selected pin.
|
205 |
|
|
* @param RI_InputCapture selects which input capture to be routed.
|
206 |
|
|
* This parameter can be one of the following values:
|
207 |
|
|
* @arg RI_InputCapture_IC1: Input capture 1 is slected.
|
208 |
|
|
* @arg RI_InputCapture_IC2: Input capture 2 is slected.
|
209 |
|
|
* @arg RI_InputCapture_IC3: Input capture 3 is slected.
|
210 |
|
|
* @arg RI_InputCapture_IC4: Input capture 4 is slected.
|
211 |
|
|
* @param RI_InputCaptureRouting: selects which pin to be routed to Input Capture.
|
212 |
|
|
* This parameter can be one of the following values:
|
213 |
|
|
* @arg RI_InputCaptureRouting_0 to RI_InputCaptureRouting_15
|
214 |
|
|
* @Note Input capture selection bits are not reset by this function.
|
215 |
|
|
* @retval None.
|
216 |
|
|
*/
|
217 |
|
|
void SYSCFG_RITIMInputCaptureConfig(uint32_t RI_InputCapture, uint32_t RI_InputCaptureRouting)
|
218 |
|
|
{
|
219 |
|
|
uint32_t tmpreg = 0;
|
220 |
|
|
|
221 |
|
|
/* Check the parameters */
|
222 |
|
|
assert_param(IS_RI_INPUTCAPTURE(RI_InputCapture));
|
223 |
|
|
assert_param(IS_RI_INPUTCAPTURE_ROUTING(RI_InputCaptureRouting));
|
224 |
|
|
|
225 |
|
|
/* Get the old register value */
|
226 |
|
|
tmpreg = RI->ICR;
|
227 |
|
|
|
228 |
|
|
/* Select input captures to be routed */
|
229 |
|
|
tmpreg |= (RI_InputCapture);
|
230 |
|
|
|
231 |
|
|
if((RI_InputCapture & RI_InputCapture_IC1) == RI_InputCapture_IC1)
|
232 |
|
|
{
|
233 |
|
|
/* Clear the input capture select bits */
|
234 |
|
|
tmpreg &= (uint32_t)(~IC_ROUTING_MASK);
|
235 |
|
|
|
236 |
|
|
/* Set RI_InputCaptureRouting bits */
|
237 |
|
|
tmpreg |= (uint32_t)( RI_InputCaptureRouting);
|
238 |
|
|
}
|
239 |
|
|
|
240 |
|
|
if((RI_InputCapture & RI_InputCapture_IC2) == RI_InputCapture_IC2)
|
241 |
|
|
{
|
242 |
|
|
/* Clear the input capture select bits */
|
243 |
|
|
tmpreg &= (uint32_t)(~(IC_ROUTING_MASK << 4));
|
244 |
|
|
|
245 |
|
|
/* Set RI_InputCaptureRouting bits */
|
246 |
|
|
tmpreg |= (uint32_t)( (RI_InputCaptureRouting << 4));
|
247 |
|
|
}
|
248 |
|
|
|
249 |
|
|
if((RI_InputCapture & RI_InputCapture_IC3) == RI_InputCapture_IC3)
|
250 |
|
|
{
|
251 |
|
|
/* Clear the input capture select bits */
|
252 |
|
|
tmpreg &= (uint32_t)(~(IC_ROUTING_MASK << 8));
|
253 |
|
|
|
254 |
|
|
/* Set RI_InputCaptureRouting bits */
|
255 |
|
|
tmpreg |= (uint32_t)( (RI_InputCaptureRouting << 8));
|
256 |
|
|
}
|
257 |
|
|
|
258 |
|
|
if((RI_InputCapture & RI_InputCapture_IC4) == RI_InputCapture_IC4)
|
259 |
|
|
{
|
260 |
|
|
/* Clear the input capture select bits */
|
261 |
|
|
tmpreg &= (uint32_t)(~(IC_ROUTING_MASK << 12));
|
262 |
|
|
|
263 |
|
|
/* Set RI_InputCaptureRouting bits */
|
264 |
|
|
tmpreg |= (uint32_t)( (RI_InputCaptureRouting << 12));
|
265 |
|
|
}
|
266 |
|
|
|
267 |
|
|
/* Write to RI->ICR register */
|
268 |
|
|
RI->ICR = tmpreg;
|
269 |
|
|
}
|
270 |
|
|
/**
|
271 |
|
|
* @brief Configures the Pull-up and Pull-down Resistors
|
272 |
|
|
* @param RI_Resistor selects the resistor to connect.
|
273 |
|
|
* This parameter can be one of the following values:
|
274 |
|
|
* @arg RI_Resistor_10KPU : 10K pull-up resistor
|
275 |
|
|
* @arg RI_Resistor_400KPU : 400K pull-up resistor
|
276 |
|
|
* @arg RI_Resistor_10KPD : 10K pull-down resistor
|
277 |
|
|
* @arg RI_Resistor_400KPD : 400K pull-down resistor
|
278 |
|
|
* @param NewState: New state of the analog switch associated to the selected resistor.
|
279 |
|
|
* This parameter can be:
|
280 |
|
|
* ENABLE so the selected resistor is connected
|
281 |
|
|
* or DISABLE so the selected resistor is disconnected
|
282 |
|
|
* @retval None
|
283 |
|
|
*/
|
284 |
|
|
void SYSCFG_RIResistorConfig(uint32_t RI_Resistor, FunctionalState NewState)
|
285 |
|
|
{
|
286 |
|
|
/* Check the parameters */
|
287 |
|
|
assert_param(IS_RI_RESISTOR(RI_Resistor));
|
288 |
|
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
289 |
|
|
|
290 |
|
|
if (NewState != DISABLE)
|
291 |
|
|
{
|
292 |
|
|
/* Enable the resistor */
|
293 |
|
|
COMP->CSR |= (uint32_t) RI_Resistor;
|
294 |
|
|
}
|
295 |
|
|
else
|
296 |
|
|
{
|
297 |
|
|
/* Disable the Resistor */
|
298 |
|
|
COMP->CSR &= (uint32_t) (~RI_Resistor);
|
299 |
|
|
}
|
300 |
|
|
}
|
301 |
|
|
|
302 |
|
|
/**
|
303 |
|
|
* @brief Close or Open the routing interface Input Output switches.
|
304 |
|
|
* @param RI_IOSwitch: selects the I/O analog switch number.
|
305 |
|
|
* This parameter can be one of the following values:
|
306 |
|
|
* @arg RI_IOSwitch_CH0 --> RI_IOSwitch_CH15
|
307 |
|
|
* @argRI_IOSwitch_CH18 --> RI_IOSwitch_CH25
|
308 |
|
|
* @arg RI_IOSwitch_GR10_1 --> RI_IOSwitch_GR10_4
|
309 |
|
|
* @arg RI_IOSwitch_GR6_1 --> RI_IOSwitch_GR6_2
|
310 |
|
|
* @arg RI_IOSwitch_GR5_1 --> RI_IOSwitch_GR5_3
|
311 |
|
|
* @arg RI_IOSwitch_GR4_1 --> RI_IOSwitch_GR4_3
|
312 |
|
|
* @arg RI_IOSwitch_VCOMP
|
313 |
|
|
* @param NewState: New state of the analog switch.
|
314 |
|
|
* This parameter can be
|
315 |
|
|
* ENABLE so the Input Output switch is closed
|
316 |
|
|
* or DISABLE so the Input Output switch is open
|
317 |
|
|
* @retval None
|
318 |
|
|
*/
|
319 |
|
|
void SYSCFG_RIIOSwitchConfig(uint32_t RI_IOSwitch, FunctionalState NewState)
|
320 |
|
|
{
|
321 |
|
|
uint32_t IOSwitchmask = 0;
|
322 |
|
|
|
323 |
|
|
/* Check the parameters */
|
324 |
|
|
assert_param(IS_RI_IOSWITCH(RI_IOSwitch));
|
325 |
|
|
|
326 |
|
|
/* Read Analog switch register index*/
|
327 |
|
|
IOSwitchmask = RI_IOSwitch >> 28;
|
328 |
|
|
|
329 |
|
|
/** Get Bits[27:0] of the IO switch */
|
330 |
|
|
RI_IOSwitch &= 0x0FFFFFFF;
|
331 |
|
|
|
332 |
|
|
|
333 |
|
|
if (NewState != DISABLE)
|
334 |
|
|
{
|
335 |
|
|
if (IOSwitchmask != 0)
|
336 |
|
|
{
|
337 |
|
|
/* Close the analog switches */
|
338 |
|
|
RI->ASCR1 |= RI_IOSwitch;
|
339 |
|
|
}
|
340 |
|
|
else
|
341 |
|
|
{
|
342 |
|
|
/* Open the analog switches */
|
343 |
|
|
RI->ASCR2 |= RI_IOSwitch;
|
344 |
|
|
}
|
345 |
|
|
}
|
346 |
|
|
else
|
347 |
|
|
{
|
348 |
|
|
if (IOSwitchmask != 0)
|
349 |
|
|
{
|
350 |
|
|
/* Close the analog switches */
|
351 |
|
|
RI->ASCR1 &= (~ (uint32_t)RI_IOSwitch);
|
352 |
|
|
}
|
353 |
|
|
else
|
354 |
|
|
{
|
355 |
|
|
/* Open the analog switches */
|
356 |
|
|
RI->ASCR2 &= (~ (uint32_t)RI_IOSwitch);
|
357 |
|
|
}
|
358 |
|
|
}
|
359 |
|
|
}
|
360 |
|
|
|
361 |
|
|
/**
|
362 |
|
|
* @brief Enable or disable the switch control mode.
|
363 |
|
|
* @param NewState: New state of the switch control mode. This parameter can
|
364 |
|
|
* be ENABLE: ADC analog switches closed if the corresponding
|
365 |
|
|
* I/O switch is also closed.
|
366 |
|
|
* or DISABLE: ADC analog switches open or controlled by the ADC interface.
|
367 |
|
|
* @retval None
|
368 |
|
|
*/
|
369 |
|
|
void SYSCFG_RISwitchControlModeCmd(FunctionalState NewState)
|
370 |
|
|
{
|
371 |
|
|
/* Check the parameters */
|
372 |
|
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
373 |
|
|
|
374 |
|
|
if (NewState != DISABLE)
|
375 |
|
|
{
|
376 |
|
|
/* Enable the Switch control mode */
|
377 |
|
|
RI->ASCR1 |= (uint32_t) RI_ASCR1_SCM;
|
378 |
|
|
}
|
379 |
|
|
else
|
380 |
|
|
{
|
381 |
|
|
/* Disable the Switch control mode */
|
382 |
|
|
RI->ASCR1 &= (uint32_t)(~RI_ASCR1_SCM);
|
383 |
|
|
}
|
384 |
|
|
}
|
385 |
|
|
|
386 |
|
|
/**
|
387 |
|
|
* @brief Enable or disable Hysteresis of the input schmitt triger of Ports A..E
|
388 |
|
|
* @param RI_Port: selects the GPIO Port.
|
389 |
|
|
* This parameter can be one of the following values:
|
390 |
|
|
* @arg RI_PortA : Port A is selected
|
391 |
|
|
* @arg RI_PortB : Port B is selected
|
392 |
|
|
* @arg RI_PortC : Port C is selected
|
393 |
|
|
* @arg RI_PortD : Port D is selected
|
394 |
|
|
* @arg RI_PortE : Port E is selected
|
395 |
|
|
* @param RI_Pin : Selects the pin(s) on which to enable or disable hysteresis.
|
396 |
|
|
* This parameter can any value from RI_Pin_x where x can be (0..15) or RI_Pin_All.
|
397 |
|
|
* @param NewState new state of the Hysteresis.
|
398 |
|
|
* This parameter can be:
|
399 |
|
|
* ENABLE so the Hysteresis is on
|
400 |
|
|
* or DISABLE so the Hysteresis is off
|
401 |
|
|
* @retval None
|
402 |
|
|
*/
|
403 |
|
|
void SYSCFG_RIHysteresisConfig(uint8_t RI_Port, uint16_t RI_Pin,
|
404 |
|
|
FunctionalState NewState)
|
405 |
|
|
{
|
406 |
|
|
/* Check the parameters */
|
407 |
|
|
assert_param(IS_RI_PORT(RI_Port));
|
408 |
|
|
assert_param(IS_RI_PIN(RI_Pin));
|
409 |
|
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
410 |
|
|
|
411 |
|
|
if(RI_Port == RI_PortA)
|
412 |
|
|
{
|
413 |
|
|
if (NewState != DISABLE)
|
414 |
|
|
{
|
415 |
|
|
/* Hysteresis on */
|
416 |
|
|
RI->HYSCR1 &= (uint32_t)~((uint32_t)RI_Pin);
|
417 |
|
|
}
|
418 |
|
|
else
|
419 |
|
|
{
|
420 |
|
|
/* Hysteresis off */
|
421 |
|
|
RI->HYSCR1 |= (uint32_t) RI_Pin;
|
422 |
|
|
}
|
423 |
|
|
}
|
424 |
|
|
|
425 |
|
|
else if(RI_Port == RI_PortB)
|
426 |
|
|
{
|
427 |
|
|
|
428 |
|
|
if (NewState != DISABLE)
|
429 |
|
|
{
|
430 |
|
|
/* Hysteresis on */
|
431 |
|
|
RI->HYSCR1 &= (uint32_t) (~((uint32_t)RI_Pin) << 16);
|
432 |
|
|
}
|
433 |
|
|
else
|
434 |
|
|
{
|
435 |
|
|
/* Hysteresis off */
|
436 |
|
|
RI->HYSCR1 |= (uint32_t) ((uint32_t)(RI_Pin) << 16);
|
437 |
|
|
}
|
438 |
|
|
}
|
439 |
|
|
|
440 |
|
|
else if(RI_Port == RI_PortC)
|
441 |
|
|
{
|
442 |
|
|
|
443 |
|
|
if (NewState != DISABLE)
|
444 |
|
|
{
|
445 |
|
|
/* Hysteresis on */
|
446 |
|
|
RI->HYSCR2 &= (uint32_t) (~((uint32_t)RI_Pin));
|
447 |
|
|
}
|
448 |
|
|
else
|
449 |
|
|
{
|
450 |
|
|
/* Hysteresis off */
|
451 |
|
|
RI->HYSCR2 |= (uint32_t) (RI_Pin );
|
452 |
|
|
}
|
453 |
|
|
}
|
454 |
|
|
else if(RI_Port == RI_PortD)
|
455 |
|
|
{
|
456 |
|
|
if (NewState != DISABLE)
|
457 |
|
|
{
|
458 |
|
|
/* Hysteresis on */
|
459 |
|
|
RI->HYSCR2 &= (uint32_t) (~((uint32_t)RI_Pin) << 16);
|
460 |
|
|
}
|
461 |
|
|
else
|
462 |
|
|
{
|
463 |
|
|
/* Hysteresis off */
|
464 |
|
|
RI->HYSCR2 |= (uint32_t) ((uint32_t)(RI_Pin) << 16);
|
465 |
|
|
|
466 |
|
|
}
|
467 |
|
|
}
|
468 |
|
|
else /* RI_Port == RI_PortE */
|
469 |
|
|
{
|
470 |
|
|
if (NewState != DISABLE)
|
471 |
|
|
{
|
472 |
|
|
/* Hysteresis on */
|
473 |
|
|
RI->HYSCR3 &= (uint32_t) (~((uint32_t)RI_Pin));
|
474 |
|
|
}
|
475 |
|
|
else
|
476 |
|
|
{
|
477 |
|
|
/* Hysteresis off */
|
478 |
|
|
RI->HYSCR3 |= (uint32_t) (RI_Pin );
|
479 |
|
|
}
|
480 |
|
|
}
|
481 |
|
|
}
|
482 |
|
|
|
483 |
|
|
/**
|
484 |
|
|
* @}
|
485 |
|
|
*/
|
486 |
|
|
|
487 |
|
|
/**
|
488 |
|
|
* @}
|
489 |
|
|
*/
|
490 |
|
|
|
491 |
|
|
/**
|
492 |
|
|
* @}
|
493 |
|
|
*/
|
494 |
|
|
/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
|