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jeremybenn |
/*
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FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* If you are: *
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* *
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* + New to FreeRTOS, *
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* + Wanting to learn FreeRTOS or multitasking in general quickly *
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* + Looking for basic training, *
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* + Wanting to improve your FreeRTOS skills and productivity *
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* *
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* then take a look at the FreeRTOS books - available as PDF or paperback *
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* *
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* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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* http://www.FreeRTOS.org/Documentation *
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* *
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* A pdf reference manual is also available. Both are usually delivered *
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* to your inbox within 20 minutes to two hours when purchased between 8am *
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* and 8pm GMT (although please allow up to 24 hours in case of *
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* exceptional circumstances). Thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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***NOTE*** The exception to the GPL is included to allow you to distribute
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a combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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#include "FreeRTOS.h"
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#include "task.h"
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/*
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* Two test tasks that fill the CPU registers with known values before
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* continuously looping round checking that each register still contains its
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* expected value. Both tasks use a separate set of values, with an incorrect
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* value being found at any time being indicative of an error in the context
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* switch mechanism. One of the tasks uses a yield instruction to increase the
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* test coverage. The nature of these tasks necessitates that they are written
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* in assembly code.
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*/
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static void vRegTest1( void *pvParameters );
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static void vRegTest2( void *pvParameters );
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/*
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* A task that tests the management of the Interrupt Controller (IC) during a
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* context switch. The state of the IC current mask level must be maintained
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* across context switches. Also, yields must be able to be performed when the
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* interrupt controller mask is not zero. This task tests both these
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* requirements.
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*/
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static void prvICCheck1Task( void *pvParameters );
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/* Counters used to ensure the tasks are still running. */
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static volatile unsigned long ulRegTest1Counter = 0UL, ulRegTest2Counter = 0UL, ulICTestCounter = 0UL;
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/* Handle to the task that checks the interrupt controller behaviour. This is
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used by the traceTASK_SWITCHED_OUT() macro, which is defined in
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FreeRTOSConfig.h and can be removed - it is just for the purpose of this test. */
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xTaskHandle xICTestTask = NULL;
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/* Variable that gets set to pdTRUE by traceTASK_SWITCHED_OUT each time
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is switched out. */
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volatile unsigned long ulTaskSwitchedOut;
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/*-----------------------------------------------------------*/
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void vStartRegTestTasks( void )
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{
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xTaskCreate( vRegTest1, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
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xTaskCreate( vRegTest2, ( signed char * ) "RTest1", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, NULL );
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xTaskCreate( prvICCheck1Task, ( signed char * ) "ICCheck", configMINIMAL_STACK_SIZE, NULL, tskIDLE_PRIORITY, &xICTestTask );
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}
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/*-----------------------------------------------------------*/
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static void vRegTest1( void *pvParameters )
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{
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__asm volatile
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(
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" mov r2, #0x02 \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */
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" mov r3, #0x03 \n"
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" mov r4, #0x04 \n"
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" mov r5, #0x05 \n"
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" mov r6, #0x06 \n"
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" mov r7, #0x07 \n"
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" mov r8, #0x08 \n"
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" mov r9, #0x09 \n"
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" mov r10, #0x0a \n"
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" mov r11, #0x0b \n"
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" mov r12, #0x0c \n"
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" mov r13, #0x0d \n"
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" mov r14, #0x0e \n"
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" mov r15, #0x0f \n"
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" \n"
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"reg_check_loop_1: \n"
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" trap #31 \n"
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" cmp r2, #0x02 \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */
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" bne.s reg_check_error_1 \n"
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" cmp r3, #0x03 \n"
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" bne.s reg_check_error_1 \n"
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" cmp r4, #0x04 \n"
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" bne.s reg_check_error_1 \n"
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" cmp r5, #0x05 \n"
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" bne.s reg_check_error_1 \n"
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" cmp r6, #0x06 \n"
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" bne.s reg_check_error_1 \n"
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" cmp r7, #0x07 \n"
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" bne.s reg_check_error_1 \n"
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" cmp r8, #0x08 \n"
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" bne.s reg_check_error_1 \n"
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" cmp r9, #0x09 \n"
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" bne.s reg_check_error_1 \n"
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" cmp r10, #0x0a \n"
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" bne.s reg_check_error_1 \n"
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" cmp r11, #0x0b \n"
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" bne.s reg_check_error_1 \n"
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" cmp r12, #0x0c \n"
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" bne.s reg_check_error_1 \n"
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" cmp r13, #0x0d \n"
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" bne.s reg_check_error_1 \n"
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" cmp r14, #0x0e \n"
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" bne.s reg_check_error_1 \n"
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" cmp r15, #0x0f \n"
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" bne.s reg_check_error_1 \n"
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" \n"
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" ld r2, [r0]+short(ulRegTest1Counter) \n" /* Increment the loop counter to show that this task is still running error free. */
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" add r2, #1 \n"
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" st r2, [r0]+short(ulRegTest1Counter) \n"
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" mov r2, #0x02 \n"
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" \n"
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" bra.s reg_check_loop_1 \n" /* Do it all again. */
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" \n"
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"reg_check_error_1: \n"
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"bra.s . \n"
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);
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}
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/*-----------------------------------------------------------*/
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static void vRegTest2( void *pvParameters )
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{
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__asm volatile
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(
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" mov r2, #0x12 \n" /* Fill the registers with known values, r0 is always 0 and r1 is the stack pointer. */
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" mov r3, #0x13 \n"
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" mov r4, #0x14 \n"
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" mov r5, #0x15 \n"
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" mov r6, #0x16 \n"
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" mov r7, #0x17 \n"
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" mov r8, #0x18 \n"
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" mov r9, #0x19 \n"
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" mov r10, #0x1a \n"
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" mov r11, #0x1b \n"
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" mov r12, #0x1c \n"
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" mov r13, #0x1d \n"
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" mov r14, #0x1e \n"
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" mov r15, #0x1f \n"
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" \n"
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"reg_check_loop_2: \n"
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" cmp r2, #0x12 \n" /* Check that each register still contains the expected value, jump to an infinite loop if an error is found. */
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" bne.s reg_check_error_2 \n"
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" cmp r3, #0x13 \n"
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" bne.s reg_check_error_2 \n"
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" cmp r4, #0x14 \n"
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" bne.s reg_check_error_2 \n"
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" cmp r5, #0x15 \n"
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" bne.s reg_check_error_2 \n"
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" cmp r6, #0x16 \n"
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" bne.s reg_check_error_2 \n"
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" cmp r7, #0x17 \n"
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" bne.s reg_check_error_2 \n"
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" cmp r8, #0x18 \n"
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" bne.s reg_check_error_2 \n"
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" cmp r9, #0x19 \n"
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" bne.s reg_check_error_2 \n"
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" cmp r10, #0x1a \n"
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" bne.s reg_check_error_2 \n"
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" cmp r11, #0x1b \n"
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" bne.s reg_check_error_2 \n"
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" cmp r12, #0x1c \n"
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" bne.s reg_check_error_2 \n"
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" cmp r13, #0x1d \n"
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" bne.s reg_check_error_2 \n"
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" cmp r14, #0x1e \n"
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" bne.s reg_check_error_2 \n"
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" cmp r15, #0x1f \n"
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" bne.s reg_check_error_2 \n"
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" \n"
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" ld r2, [r0]+short(ulRegTest2Counter) \n" /* Increment the loop counter to show that this task is still running error free. */
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" add r2, #1 \n"
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" st r2, [r0]+short(ulRegTest2Counter) \n"
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" mov r2, #0x12 \n"
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" \n"
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" bra.s reg_check_loop_2 \n" /* Do it all again. */
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" \n"
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"reg_check_error_2: \n"
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"bra.s . \n"
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);
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}
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/*-----------------------------------------------------------*/
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static void prvICCheck1Task( void *pvParameters )
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{
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long lICCheckStatus = pdPASS;
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for( ;; )
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{
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/* At this point the interrupt mask should be zero. */
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if( ic->cpl != 0 )
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{
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lICCheckStatus = pdFAIL;
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}
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/* If we yield here, it should still be 0 when the task next runs.
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ulTaskSwitchedOut is just used to check that a switch does actually
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happen. */
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ulTaskSwitchedOut = pdFALSE;
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taskYIELD();
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if( ( ulTaskSwitchedOut != pdTRUE ) || ( ic->cpl != 0 ) )
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{
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lICCheckStatus = pdFAIL;
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}
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/* Set the interrupt mask to portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1,
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before checking it is as expected. */
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taskENTER_CRITICAL();
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if( ic->cpl != ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 ) )
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{
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lICCheckStatus = pdFAIL;
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}
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/* If we yield here, it should still be
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portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 10 when the task next runs. */
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ulTaskSwitchedOut = pdFALSE;
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taskYIELD();
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if( ( ulTaskSwitchedOut != pdTRUE ) || ( ic->cpl != ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 ) ) )
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{
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lICCheckStatus = pdFAIL;
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}
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/* Return the interrupt mask to its default state. */
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taskEXIT_CRITICAL();
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/* Just increment a loop counter so the check task knows if this task
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is still running or not. */
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if( lICCheckStatus == pdPASS )
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{
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ulICTestCounter++;
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}
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}
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}
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/*-----------------------------------------------------------*/
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portBASE_TYPE xAreRegTestTasksStillRunning( void )
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{
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static unsigned long ulLastCounter1 = 0UL, ulLastCounter2 = 0UL, ulLastICTestCounter = 0UL;
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long lReturn;
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/* Check that both loop counters are still incrementing, indicating that
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both reg test tasks are still running error free. */
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if( ulLastCounter1 == ulRegTest1Counter )
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{
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lReturn = pdFAIL;
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}
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else if( ulLastCounter2 == ulRegTest2Counter )
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{
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lReturn = pdFAIL;
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}
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else if( ulLastICTestCounter == ulICTestCounter )
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{
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lReturn = pdFAIL;
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}
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else
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{
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lReturn = pdPASS;
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}
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ulLastCounter1 = ulRegTest1Counter;
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ulLastCounter2 = ulRegTest2Counter;
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ulLastICTestCounter = ulICTestCounter;
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return lReturn;
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}
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