OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ColdFire_MCF52221_CodeWarrior/] [headers/] [MCF52221_I2C.h] - Blame information for rev 615

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 578 jeremybenn 
/* Coldfire C Header File
2 
 * Copyright Freescale Semiconductor Inc
3 
 * All rights reserved.
4 
 *
5 
 * 2008/05/23 Revision: 0.95
6 
 *
7 
 * (c) Copyright UNIS, a.s. 1997-2008
8 
 * UNIS, a.s.
9 
 * Jundrovska 33
10 
 * 624 00 Brno
11 
 * Czech Republic
12 
 * http      : www.processorexpert.com
13 
 * mail      : info@processorexpert.com
14 
 */
15 
 
16 
#ifndef __MCF52221_I2C_H__
17 
#define __MCF52221_I2C_H__
18 
 
19 
 
20 
/*********************************************************************
21 
*
22 
* I2C Module (I2C)
23 
*
24 
*********************************************************************/
25 
 
26 
/* Register read/write macros */
27 
#define MCF_I2C_I2ADR                        (*(vuint8 *)(0x40000300))
28 
#define MCF_I2C_I2FDR                        (*(vuint8 *)(0x40000304))
29 
#define MCF_I2C_I2CR                         (*(vuint8 *)(0x40000308))
30 
#define MCF_I2C_I2SR                         (*(vuint8 *)(0x4000030C))
31 
#define MCF_I2C_I2DR                         (*(vuint8 *)(0x40000310))
32 
 
33 
 
34 
 
35 
/* Bit definitions and macros for MCF_I2C_I2ADR */
36 
#define MCF_I2C_I2ADR_ADR(x)                 (((x)&0x7F)<<0x1)
37 
 
38 
/* Bit definitions and macros for MCF_I2C_I2FDR */
39 
#define MCF_I2C_I2FDR_IC(x)                  (((x)&0x3F)<<0)
40 
 
41 
/* Bit definitions and macros for MCF_I2C_I2CR */
42 
#define MCF_I2C_I2CR_RSTA                    (0x4)
43 
#define MCF_I2C_I2CR_TXAK                    (0x8)
44 
#define MCF_I2C_I2CR_MTX                     (0x10)
45 
#define MCF_I2C_I2CR_MSTA                    (0x20)
46 
#define MCF_I2C_I2CR_IIEN                    (0x40)
47 
#define MCF_I2C_I2CR_IEN                     (0x80)
48 
 
49 
/* Bit definitions and macros for MCF_I2C_I2SR */
50 
#define MCF_I2C_I2SR_RXAK                    (0x1)
51 
#define MCF_I2C_I2SR_IIF                     (0x2)
52 
#define MCF_I2C_I2SR_SRW                     (0x4)
53 
#define MCF_I2C_I2SR_IAL                     (0x10)
54 
#define MCF_I2C_I2SR_IBB                     (0x20)
55 
#define MCF_I2C_I2SR_IAAS                    (0x40)
56 
#define MCF_I2C_I2SR_ICF                     (0x80)
57 
 
58 
/* Bit definitions and macros for MCF_I2C_I2DR */
59 
#define MCF_I2C_I2DR_DATA(x)                 (((x)&0xFF)<<0)
60 
 
61 
 
62 
#endif /* __MCF52221_I2C_H__ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.