OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ColdFire_MCF52221_CodeWarrior/] [sources/] [MCF52221_sysinit.c] - Blame information for rev 866

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 578 jeremybenn
/*
2
 * File:                mcf52221_sysinit.c
3
 * Purpose:             Power-on Reset configuration of the MCF52221.
4
 *
5
 * Notes:
6
 *
7
 */
8
#include "support_common.h"
9
#include "exceptions.h"
10
 
11
 
12
 
13
/********************************************************************/
14
static void pll_init(void)
15
{
16
 
17
   MCF_CLOCK_CCHR =0x05; // The PLL pre divider - 48MHz / 6 = 8MHz 
18
 
19
        /* The PLL pre-divider affects this!!!
20
         * Multiply 8Mhz reference crystal /CCHR by 10 to acheive system clock of 80Mhz
21
         */
22
 
23
        MCF_CLOCK_SYNCR = MCF_CLOCK_SYNCR_MFD(3) | MCF_CLOCK_SYNCR_CLKSRC| MCF_CLOCK_SYNCR_PLLMODE | MCF_CLOCK_SYNCR_PLLEN ;
24
 
25
        while (!(MCF_CLOCK_SYNSR & MCF_CLOCK_SYNSR_LOCK))
26
        {
27
        }
28
}
29
/********************************************************************/
30
static void scm_init(void)
31
{
32
        /*
33
         * Enable on-chip modules to access internal SRAM
34
         */
35
        MCF_SCM_RAMBAR = (0
36
                | MCF_SCM_RAMBAR_BA(RAMBAR_ADDRESS)
37
                | MCF_SCM_RAMBAR_BDE);
38
}
39
 
40
/********************************************************************/
41
 
42
        /*
43
 * Out of reset, the low-level assembly code calls this routine to
44
 * initialize the mcf5206e for this board. A temporary stack has been
45
 * setup in the internal SRAM, and the stack pointer will be changed
46
 * to point to DRAM once this routine returns.
47
         */
48
void __initialize_hardware(void)
49
{
50
        /*******************************************************
51
        *       Out of reset, the low-level assembly code calls this
52
        *       routine to initialize the MCF52221 modules for the
53
        *       M522223EVB board.
54
        ********************************************************/
55
 
56
 
57
        asm
58
        {
59
            /* Initialize IPSBAR */
60
            move.l  #__IPSBAR,d0
61
               andi.l  #0xC0000000,d0 // need to mask
62
            add.l   #0x1,d0
63
            move.l  d0,0x40000000
64
 
65
 
66
 
67
            /* Initialize FLASHBAR */
68
            move.l  #__FLASHBAR,d0
69
               andi.l  #0xFFF80000,d0 // need to mask
70
            add.l   #0x61,d0
71
            movec   d0,FLASHBAR
72
 
73
        }
74
 
75
 
76
        /* Set real time clock freq */
77
        MCF_CLOCK_RTCDR = 48000000;
78
 
79
        pll_init();
80
        scm_init();
81
 
82
        initialize_exceptions();
83
}
84
 
85
 
86
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.