OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ColdFire_MCF52233_Eclipse/] [RTOSDemo/] [MCF5223x/] [MCF52235_ADC.h] - Blame information for rev 578

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 578 jeremybenn
/* Coldfire C Header File
2
 * Copyright Freescale Semiconductor Inc
3
 * All rights reserved.
4
 *
5
 * 2007/03/19 Revision: 0.91
6
 */
7
 
8
#ifndef __MCF52235_ADC_H__
9
#define __MCF52235_ADC_H__
10
 
11
 
12
/*********************************************************************
13
*
14
* Analog-to-Digital Converter (ADC)
15
*
16
*********************************************************************/
17
 
18
/* Register read/write macros */
19
#define MCF_ADC_CTRL1                        (*(vuint16*)(&__IPSBAR[0x190000]))
20
#define MCF_ADC_CTRL2                        (*(vuint16*)(&__IPSBAR[0x190002]))
21
#define MCF_ADC_ADZCC                        (*(vuint16*)(&__IPSBAR[0x190004]))
22
#define MCF_ADC_ADLST1                       (*(vuint16*)(&__IPSBAR[0x190006]))
23
#define MCF_ADC_ADLST2                       (*(vuint16*)(&__IPSBAR[0x190008]))
24
#define MCF_ADC_ADSDIS                       (*(vuint16*)(&__IPSBAR[0x19000A]))
25
#define MCF_ADC_ADSTAT                       (*(vuint16*)(&__IPSBAR[0x19000C]))
26
#define MCF_ADC_ADLSTAT                      (*(vuint16*)(&__IPSBAR[0x19000E]))
27
#define MCF_ADC_ADZCSTAT                     (*(vuint16*)(&__IPSBAR[0x190010]))
28
#define MCF_ADC_ADRSLT0                      (*(vuint16*)(&__IPSBAR[0x190012]))
29
#define MCF_ADC_ADRSLT1                      (*(vuint16*)(&__IPSBAR[0x190014]))
30
#define MCF_ADC_ADRSLT2                      (*(vuint16*)(&__IPSBAR[0x190016]))
31
#define MCF_ADC_ADRSLT3                      (*(vuint16*)(&__IPSBAR[0x190018]))
32
#define MCF_ADC_ADRSLT4                      (*(vuint16*)(&__IPSBAR[0x19001A]))
33
#define MCF_ADC_ADRSLT5                      (*(vuint16*)(&__IPSBAR[0x19001C]))
34
#define MCF_ADC_ADRSLT6                      (*(vuint16*)(&__IPSBAR[0x19001E]))
35
#define MCF_ADC_ADRSLT7                      (*(vuint16*)(&__IPSBAR[0x190020]))
36
#define MCF_ADC_ADLLMT0                      (*(vuint16*)(&__IPSBAR[0x190022]))
37
#define MCF_ADC_ADLLMT1                      (*(vuint16*)(&__IPSBAR[0x190024]))
38
#define MCF_ADC_ADLLMT2                      (*(vuint16*)(&__IPSBAR[0x190026]))
39
#define MCF_ADC_ADLLMT3                      (*(vuint16*)(&__IPSBAR[0x190028]))
40
#define MCF_ADC_ADLLMT4                      (*(vuint16*)(&__IPSBAR[0x19002A]))
41
#define MCF_ADC_ADLLMT5                      (*(vuint16*)(&__IPSBAR[0x19002C]))
42
#define MCF_ADC_ADLLMT6                      (*(vuint16*)(&__IPSBAR[0x19002E]))
43
#define MCF_ADC_ADLLMT7                      (*(vuint16*)(&__IPSBAR[0x190030]))
44
#define MCF_ADC_ADHLMT0                      (*(vuint16*)(&__IPSBAR[0x190032]))
45
#define MCF_ADC_ADHLMT1                      (*(vuint16*)(&__IPSBAR[0x190034]))
46
#define MCF_ADC_ADHLMT2                      (*(vuint16*)(&__IPSBAR[0x190036]))
47
#define MCF_ADC_ADHLMT3                      (*(vuint16*)(&__IPSBAR[0x190038]))
48
#define MCF_ADC_ADHLMT4                      (*(vuint16*)(&__IPSBAR[0x19003A]))
49
#define MCF_ADC_ADHLMT5                      (*(vuint16*)(&__IPSBAR[0x19003C]))
50
#define MCF_ADC_ADHLMT6                      (*(vuint16*)(&__IPSBAR[0x19003E]))
51
#define MCF_ADC_ADHLMT7                      (*(vuint16*)(&__IPSBAR[0x190040]))
52
#define MCF_ADC_ADOFS0                       (*(vuint16*)(&__IPSBAR[0x190042]))
53
#define MCF_ADC_ADOFS1                       (*(vuint16*)(&__IPSBAR[0x190044]))
54
#define MCF_ADC_ADOFS2                       (*(vuint16*)(&__IPSBAR[0x190046]))
55
#define MCF_ADC_ADOFS3                       (*(vuint16*)(&__IPSBAR[0x190048]))
56
#define MCF_ADC_ADOFS4                       (*(vuint16*)(&__IPSBAR[0x19004A]))
57
#define MCF_ADC_ADOFS5                       (*(vuint16*)(&__IPSBAR[0x19004C]))
58
#define MCF_ADC_ADOFS6                       (*(vuint16*)(&__IPSBAR[0x19004E]))
59
#define MCF_ADC_ADOFS7                       (*(vuint16*)(&__IPSBAR[0x190050]))
60
#define MCF_ADC_POWER                        (*(vuint16*)(&__IPSBAR[0x190052]))
61
#define MCF_ADC_CAL                          (*(vuint16*)(&__IPSBAR[0x190054]))
62
#define MCF_ADC_ADRSLT(x)                    (*(vuint16*)(&__IPSBAR[0x190012 + ((x)*0x2)]))
63
#define MCF_ADC_ADLLMT(x)                    (*(vuint16*)(&__IPSBAR[0x190022 + ((x)*0x2)]))
64
#define MCF_ADC_ADHLMT(x)                    (*(vuint16*)(&__IPSBAR[0x190032 + ((x)*0x2)]))
65
#define MCF_ADC_ADOFS(x)                     (*(vuint16*)(&__IPSBAR[0x190042 + ((x)*0x2)]))
66
 
67
 
68
/* Bit definitions and macros for MCF_ADC_CTRL1 */
69
#define MCF_ADC_CTRL1_SMODE(x)               (((x)&0x7)<<0)
70
#define MCF_ADC_CTRL1_CHNCFG(x)              (((x)&0xF)<<0x4)
71
#define MCF_ADC_CTRL1_HLMTIE                 (0x100)
72
#define MCF_ADC_CTRL1_LLMTIE                 (0x200)
73
#define MCF_ADC_CTRL1_ZCIE                   (0x400)
74
#define MCF_ADC_CTRL1_EOSIE0                 (0x800)
75
#define MCF_ADC_CTRL1_SYNC0                  (0x1000)
76
#define MCF_ADC_CTRL1_START0                 (0x2000)
77
#define MCF_ADC_CTRL1_STOP0                  (0x4000)
78
 
79
/* Bit definitions and macros for MCF_ADC_CTRL2 */
80
#define MCF_ADC_CTRL2_DIV(x)                 (((x)&0x1F)<<0)
81
#define MCF_ADC_CTRL2_SIMULT                 (0x20)
82
#define MCF_ADC_CTRL2_EOSIE1                 (0x800)
83
#define MCF_ADC_CTRL2_SYNC1                  (0x1000)
84
#define MCF_ADC_CTRL2_START1                 (0x2000)
85
#define MCF_ADC_CTRL2_STOP1                  (0x4000)
86
 
87
/* Bit definitions and macros for MCF_ADC_ADZCC */
88
#define MCF_ADC_ADZCC_ZCE0(x)                (((x)&0x3)<<0)
89
#define MCF_ADC_ADZCC_ZCE1(x)                (((x)&0x3)<<0x2)
90
#define MCF_ADC_ADZCC_ZCE2(x)                (((x)&0x3)<<0x4)
91
#define MCF_ADC_ADZCC_ZCE3(x)                (((x)&0x3)<<0x6)
92
#define MCF_ADC_ADZCC_ZCE4(x)                (((x)&0x3)<<0x8)
93
#define MCF_ADC_ADZCC_ZCE5(x)                (((x)&0x3)<<0xA)
94
#define MCF_ADC_ADZCC_ZCE6(x)                (((x)&0x3)<<0xC)
95
#define MCF_ADC_ADZCC_ZCE7(x)                (((x)&0x3)<<0xE)
96
 
97
/* Bit definitions and macros for MCF_ADC_ADLST1 */
98
#define MCF_ADC_ADLST1_SAMPLE0(x)            (((x)&0x7)<<0)
99
#define MCF_ADC_ADLST1_SAMPLE1(x)            (((x)&0x7)<<0x4)
100
#define MCF_ADC_ADLST1_SAMPLE2(x)            (((x)&0x7)<<0x8)
101
#define MCF_ADC_ADLST1_SAMPLE3(x)            (((x)&0x7)<<0xC)
102
 
103
/* Bit definitions and macros for MCF_ADC_ADLST2 */
104
#define MCF_ADC_ADLST2_SAMPLE4(x)            (((x)&0x7)<<0)
105
#define MCF_ADC_ADLST2_SAMPLE5(x)            (((x)&0x7)<<0x4)
106
#define MCF_ADC_ADLST2_SAMPLE6(x)            (((x)&0x7)<<0x8)
107
#define MCF_ADC_ADLST2_SAMPLE7(x)            (((x)&0x7)<<0xC)
108
 
109
/* Bit definitions and macros for MCF_ADC_ADSDIS */
110
#define MCF_ADC_ADSDIS_DS0                   (0x1)
111
#define MCF_ADC_ADSDIS_DS1                   (0x2)
112
#define MCF_ADC_ADSDIS_DS2                   (0x4)
113
#define MCF_ADC_ADSDIS_DS3                   (0x8)
114
#define MCF_ADC_ADSDIS_DS4                   (0x10)
115
#define MCF_ADC_ADSDIS_DS5                   (0x20)
116
#define MCF_ADC_ADSDIS_DS6                   (0x40)
117
#define MCF_ADC_ADSDIS_DS7                   (0x80)
118
 
119
/* Bit definitions and macros for MCF_ADC_ADSTAT */
120
#define MCF_ADC_ADSTAT_RDY0                  (0x1)
121
#define MCF_ADC_ADSTAT_RDY1                  (0x2)
122
#define MCF_ADC_ADSTAT_RDY2                  (0x4)
123
#define MCF_ADC_ADSTAT_RDY3                  (0x8)
124
#define MCF_ADC_ADSTAT_RDY4                  (0x10)
125
#define MCF_ADC_ADSTAT_RDY5                  (0x20)
126
#define MCF_ADC_ADSTAT_RDY6                  (0x40)
127
#define MCF_ADC_ADSTAT_RDY7                  (0x80)
128
#define MCF_ADC_ADSTAT_HLMTI                 (0x100)
129
#define MCF_ADC_ADSTAT_LLMTI                 (0x200)
130
#define MCF_ADC_ADSTAT_ZCI                   (0x400)
131
#define MCF_ADC_ADSTAT_EOSI0                 (0x800)
132
#define MCF_ADC_ADSTAT_EOSI1                 (0x1000)
133
#define MCF_ADC_ADSTAT_CIP1                  (0x4000)
134
#define MCF_ADC_ADSTAT_CIP0                  (0x8000)
135
 
136
/* Bit definitions and macros for MCF_ADC_ADLSTAT */
137
#define MCF_ADC_ADLSTAT_LLS0                 (0x1)
138
#define MCF_ADC_ADLSTAT_LLS1                 (0x2)
139
#define MCF_ADC_ADLSTAT_LLS2                 (0x4)
140
#define MCF_ADC_ADLSTAT_LLS3                 (0x8)
141
#define MCF_ADC_ADLSTAT_LLS4                 (0x10)
142
#define MCF_ADC_ADLSTAT_LLS5                 (0x20)
143
#define MCF_ADC_ADLSTAT_LLS6                 (0x40)
144
#define MCF_ADC_ADLSTAT_LLS7                 (0x80)
145
#define MCF_ADC_ADLSTAT_HLS0                 (0x100)
146
#define MCF_ADC_ADLSTAT_HLS1                 (0x200)
147
#define MCF_ADC_ADLSTAT_HLS2                 (0x400)
148
#define MCF_ADC_ADLSTAT_HLS3                 (0x800)
149
#define MCF_ADC_ADLSTAT_HLS4                 (0x1000)
150
#define MCF_ADC_ADLSTAT_HLS5                 (0x2000)
151
#define MCF_ADC_ADLSTAT_HLS6                 (0x4000)
152
#define MCF_ADC_ADLSTAT_HLS7                 (0x8000)
153
 
154
/* Bit definitions and macros for MCF_ADC_ADZCSTAT */
155
#define MCF_ADC_ADZCSTAT_ZCS0                (0x1)
156
#define MCF_ADC_ADZCSTAT_ZCS1                (0x2)
157
#define MCF_ADC_ADZCSTAT_ZCS2                (0x4)
158
#define MCF_ADC_ADZCSTAT_ZCS3                (0x8)
159
#define MCF_ADC_ADZCSTAT_ZCS4                (0x10)
160
#define MCF_ADC_ADZCSTAT_ZCS5                (0x20)
161
#define MCF_ADC_ADZCSTAT_ZCS6                (0x40)
162
#define MCF_ADC_ADZCSTAT_ZCS7                (0x80)
163
 
164
/* Bit definitions and macros for MCF_ADC_ADRSLT */
165
#define MCF_ADC_ADRSLT_RSLT(x)               (((x)&0xFFF)<<0x3)
166
#define MCF_ADC_ADRSLT_SEXT                  (0x8000)
167
 
168
/* Bit definitions and macros for MCF_ADC_ADLLMT */
169
#define MCF_ADC_ADLLMT_LLMT(x)               (((x)&0xFFF)<<0x3)
170
 
171
/* Bit definitions and macros for MCF_ADC_ADHLMT */
172
#define MCF_ADC_ADHLMT_HLMT(x)               (((x)&0xFFF)<<0x3)
173
 
174
/* Bit definitions and macros for MCF_ADC_ADOFS */
175
#define MCF_ADC_ADOFS_OFFSET(x)              (((x)&0xFFF)<<0x3)
176
 
177
/* Bit definitions and macros for MCF_ADC_POWER */
178
#define MCF_ADC_POWER_PD0                    (0x1)
179
#define MCF_ADC_POWER_PD1                    (0x2)
180
#define MCF_ADC_POWER_PD2                    (0x4)
181
#define MCF_ADC_POWER_APD                    (0x8)
182
#define MCF_ADC_POWER_PUDELAY(x)             (((x)&0x3F)<<0x4)
183
#define MCF_ADC_POWER_PSTS0                  (0x400)
184
#define MCF_ADC_POWER_PSTS1                  (0x800)
185
#define MCF_ADC_POWER_PSTS2                  (0x1000)
186
#define MCF_ADC_POWER_ASB                    (0x8000)
187
 
188
/* Bit definitions and macros for MCF_ADC_CAL */
189
#define MCF_ADC_CAL_SEL_VREFL                (0x4000)
190
#define MCF_ADC_CAL_SEL_VREFH                (0x8000)
191
 
192
 
193
#endif /* __MCF52235_ADC_H__ */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.