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jeremybenn |
/* Coldfire C Header File
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* Copyright Freescale Semiconductor Inc
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* All rights reserved.
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*
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* 2007/03/19 Revision: 0.91
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*/
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#ifndef __MCF52235_INTC_H__
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#define __MCF52235_INTC_H__
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/*********************************************************************
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*
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* Interrupt Controller (INTC)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_INTC0_IPRH (*(vuint32*)(&__IPSBAR[0xC00]))
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#define MCF_INTC0_IPRL (*(vuint32*)(&__IPSBAR[0xC04]))
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#define MCF_INTC0_IMRH (*(vuint32*)(&__IPSBAR[0xC08]))
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#define MCF_INTC0_IMRL (*(vuint32*)(&__IPSBAR[0xC0C]))
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#define MCF_INTC0_INTFRCH (*(vuint32*)(&__IPSBAR[0xC10]))
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#define MCF_INTC0_INTFRCL (*(vuint32*)(&__IPSBAR[0xC14]))
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#define MCF_INTC0_IRLR (*(vuint8 *)(&__IPSBAR[0xC18]))
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#define MCF_INTC0_IACKLPR (*(vuint8 *)(&__IPSBAR[0xC19]))
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#define MCF_INTC0_ICR01 (*(vuint8 *)(&__IPSBAR[0xC41]))
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#define MCF_INTC0_ICR02 (*(vuint8 *)(&__IPSBAR[0xC42]))
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#define MCF_INTC0_ICR03 (*(vuint8 *)(&__IPSBAR[0xC43]))
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#define MCF_INTC0_ICR04 (*(vuint8 *)(&__IPSBAR[0xC44]))
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#define MCF_INTC0_ICR05 (*(vuint8 *)(&__IPSBAR[0xC45]))
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#define MCF_INTC0_ICR06 (*(vuint8 *)(&__IPSBAR[0xC46]))
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#define MCF_INTC0_ICR07 (*(vuint8 *)(&__IPSBAR[0xC47]))
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#define MCF_INTC0_ICR08 (*(vuint8 *)(&__IPSBAR[0xC48]))
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#define MCF_INTC0_ICR09 (*(vuint8 *)(&__IPSBAR[0xC49]))
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#define MCF_INTC0_ICR10 (*(vuint8 *)(&__IPSBAR[0xC4A]))
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#define MCF_INTC0_ICR11 (*(vuint8 *)(&__IPSBAR[0xC4B]))
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#define MCF_INTC0_ICR12 (*(vuint8 *)(&__IPSBAR[0xC4C]))
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#define MCF_INTC0_ICR13 (*(vuint8 *)(&__IPSBAR[0xC4D]))
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#define MCF_INTC0_ICR14 (*(vuint8 *)(&__IPSBAR[0xC4E]))
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#define MCF_INTC0_ICR15 (*(vuint8 *)(&__IPSBAR[0xC4F]))
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#define MCF_INTC0_ICR16 (*(vuint8 *)(&__IPSBAR[0xC50]))
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#define MCF_INTC0_ICR17 (*(vuint8 *)(&__IPSBAR[0xC51]))
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#define MCF_INTC0_ICR18 (*(vuint8 *)(&__IPSBAR[0xC52]))
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#define MCF_INTC0_ICR19 (*(vuint8 *)(&__IPSBAR[0xC53]))
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#define MCF_INTC0_ICR20 (*(vuint8 *)(&__IPSBAR[0xC54]))
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#define MCF_INTC0_ICR21 (*(vuint8 *)(&__IPSBAR[0xC55]))
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#define MCF_INTC0_ICR22 (*(vuint8 *)(&__IPSBAR[0xC56]))
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#define MCF_INTC0_ICR23 (*(vuint8 *)(&__IPSBAR[0xC57]))
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#define MCF_INTC0_ICR24 (*(vuint8 *)(&__IPSBAR[0xC58]))
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#define MCF_INTC0_ICR25 (*(vuint8 *)(&__IPSBAR[0xC59]))
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#define MCF_INTC0_ICR26 (*(vuint8 *)(&__IPSBAR[0xC5A]))
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#define MCF_INTC0_ICR27 (*(vuint8 *)(&__IPSBAR[0xC5B]))
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#define MCF_INTC0_ICR28 (*(vuint8 *)(&__IPSBAR[0xC5C]))
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#define MCF_INTC0_ICR29 (*(vuint8 *)(&__IPSBAR[0xC5D]))
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#define MCF_INTC0_ICR30 (*(vuint8 *)(&__IPSBAR[0xC5E]))
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#define MCF_INTC0_ICR31 (*(vuint8 *)(&__IPSBAR[0xC5F]))
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#define MCF_INTC0_ICR32 (*(vuint8 *)(&__IPSBAR[0xC60]))
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#define MCF_INTC0_ICR33 (*(vuint8 *)(&__IPSBAR[0xC61]))
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#define MCF_INTC0_ICR34 (*(vuint8 *)(&__IPSBAR[0xC62]))
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#define MCF_INTC0_ICR35 (*(vuint8 *)(&__IPSBAR[0xC63]))
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#define MCF_INTC0_ICR36 (*(vuint8 *)(&__IPSBAR[0xC64]))
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#define MCF_INTC0_ICR37 (*(vuint8 *)(&__IPSBAR[0xC65]))
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#define MCF_INTC0_ICR38 (*(vuint8 *)(&__IPSBAR[0xC66]))
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#define MCF_INTC0_ICR39 (*(vuint8 *)(&__IPSBAR[0xC67]))
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#define MCF_INTC0_ICR40 (*(vuint8 *)(&__IPSBAR[0xC68]))
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#define MCF_INTC0_ICR41 (*(vuint8 *)(&__IPSBAR[0xC69]))
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#define MCF_INTC0_ICR42 (*(vuint8 *)(&__IPSBAR[0xC6A]))
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#define MCF_INTC0_ICR43 (*(vuint8 *)(&__IPSBAR[0xC6B]))
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#define MCF_INTC0_ICR44 (*(vuint8 *)(&__IPSBAR[0xC6C]))
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#define MCF_INTC0_ICR45 (*(vuint8 *)(&__IPSBAR[0xC6D]))
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#define MCF_INTC0_ICR46 (*(vuint8 *)(&__IPSBAR[0xC6E]))
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#define MCF_INTC0_ICR47 (*(vuint8 *)(&__IPSBAR[0xC6F]))
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#define MCF_INTC0_ICR48 (*(vuint8 *)(&__IPSBAR[0xC70]))
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#define MCF_INTC0_ICR49 (*(vuint8 *)(&__IPSBAR[0xC71]))
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#define MCF_INTC0_ICR50 (*(vuint8 *)(&__IPSBAR[0xC72]))
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#define MCF_INTC0_ICR51 (*(vuint8 *)(&__IPSBAR[0xC73]))
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#define MCF_INTC0_ICR52 (*(vuint8 *)(&__IPSBAR[0xC74]))
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#define MCF_INTC0_ICR53 (*(vuint8 *)(&__IPSBAR[0xC75]))
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#define MCF_INTC0_ICR54 (*(vuint8 *)(&__IPSBAR[0xC76]))
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#define MCF_INTC0_ICR55 (*(vuint8 *)(&__IPSBAR[0xC77]))
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#define MCF_INTC0_ICR56 (*(vuint8 *)(&__IPSBAR[0xC78]))
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#define MCF_INTC0_ICR57 (*(vuint8 *)(&__IPSBAR[0xC79]))
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#define MCF_INTC0_ICR58 (*(vuint8 *)(&__IPSBAR[0xC7A]))
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#define MCF_INTC0_ICR59 (*(vuint8 *)(&__IPSBAR[0xC7B]))
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#define MCF_INTC0_ICR60 (*(vuint8 *)(&__IPSBAR[0xC7C]))
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#define MCF_INTC0_ICR61 (*(vuint8 *)(&__IPSBAR[0xC7D]))
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#define MCF_INTC0_ICR62 (*(vuint8 *)(&__IPSBAR[0xC7E]))
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#define MCF_INTC0_ICR63 (*(vuint8 *)(&__IPSBAR[0xC7F]))
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#define MCF_INTC0_SWIACK (*(vuint8 *)(&__IPSBAR[0xCE0]))
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#define MCF_INTC0_L1IACK (*(vuint8 *)(&__IPSBAR[0xCE4]))
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#define MCF_INTC0_L2IACK (*(vuint8 *)(&__IPSBAR[0xCE8]))
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#define MCF_INTC0_L3IACK (*(vuint8 *)(&__IPSBAR[0xCEC]))
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#define MCF_INTC0_L4IACK (*(vuint8 *)(&__IPSBAR[0xCF0]))
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#define MCF_INTC0_L5IACK (*(vuint8 *)(&__IPSBAR[0xCF4]))
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#define MCF_INTC0_L6IACK (*(vuint8 *)(&__IPSBAR[0xCF8]))
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#define MCF_INTC0_L7IACK (*(vuint8 *)(&__IPSBAR[0xCFC]))
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#define MCF_INTC0_ICR(x) (*(vuint8 *)(&__IPSBAR[0xC41 + ((x-1)*0x1)]))
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#define MCF_INTC0_LIACK(x) (*(vuint8 *)(&__IPSBAR[0xCE4 + ((x-1)*0x4)]))
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#define MCF_INTC1_IPRH (*(vuint32*)(&__IPSBAR[0xD00]))
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#define MCF_INTC1_IPRL (*(vuint32*)(&__IPSBAR[0xD04]))
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#define MCF_INTC1_IMRH (*(vuint32*)(&__IPSBAR[0xD08]))
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#define MCF_INTC1_IMRL (*(vuint32*)(&__IPSBAR[0xD0C]))
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#define MCF_INTC1_INTFRCH (*(vuint32*)(&__IPSBAR[0xD10]))
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#define MCF_INTC1_INTFRCL (*(vuint32*)(&__IPSBAR[0xD14]))
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#define MCF_INTC1_IRLR (*(vuint8 *)(&__IPSBAR[0xD18]))
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#define MCF_INTC1_IACKLPR (*(vuint8 *)(&__IPSBAR[0xD19]))
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#define MCF_INTC1_ICR01 (*(vuint8 *)(&__IPSBAR[0xD41]))
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#define MCF_INTC1_ICR02 (*(vuint8 *)(&__IPSBAR[0xD42]))
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#define MCF_INTC1_ICR03 (*(vuint8 *)(&__IPSBAR[0xD43]))
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#define MCF_INTC1_ICR04 (*(vuint8 *)(&__IPSBAR[0xD44]))
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#define MCF_INTC1_ICR05 (*(vuint8 *)(&__IPSBAR[0xD45]))
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#define MCF_INTC1_ICR06 (*(vuint8 *)(&__IPSBAR[0xD46]))
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#define MCF_INTC1_ICR07 (*(vuint8 *)(&__IPSBAR[0xD47]))
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#define MCF_INTC1_ICR08 (*(vuint8 *)(&__IPSBAR[0xD48]))
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#define MCF_INTC1_ICR09 (*(vuint8 *)(&__IPSBAR[0xD49]))
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#define MCF_INTC1_ICR10 (*(vuint8 *)(&__IPSBAR[0xD4A]))
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#define MCF_INTC1_ICR11 (*(vuint8 *)(&__IPSBAR[0xD4B]))
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#define MCF_INTC1_ICR12 (*(vuint8 *)(&__IPSBAR[0xD4C]))
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#define MCF_INTC1_ICR13 (*(vuint8 *)(&__IPSBAR[0xD4D]))
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#define MCF_INTC1_ICR14 (*(vuint8 *)(&__IPSBAR[0xD4E]))
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#define MCF_INTC1_ICR15 (*(vuint8 *)(&__IPSBAR[0xD4F]))
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#define MCF_INTC1_ICR16 (*(vuint8 *)(&__IPSBAR[0xD50]))
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#define MCF_INTC1_ICR17 (*(vuint8 *)(&__IPSBAR[0xD51]))
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#define MCF_INTC1_ICR18 (*(vuint8 *)(&__IPSBAR[0xD52]))
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#define MCF_INTC1_ICR19 (*(vuint8 *)(&__IPSBAR[0xD53]))
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#define MCF_INTC1_ICR20 (*(vuint8 *)(&__IPSBAR[0xD54]))
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#define MCF_INTC1_ICR21 (*(vuint8 *)(&__IPSBAR[0xD55]))
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#define MCF_INTC1_ICR22 (*(vuint8 *)(&__IPSBAR[0xD56]))
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#define MCF_INTC1_ICR23 (*(vuint8 *)(&__IPSBAR[0xD57]))
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#define MCF_INTC1_ICR24 (*(vuint8 *)(&__IPSBAR[0xD58]))
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#define MCF_INTC1_ICR25 (*(vuint8 *)(&__IPSBAR[0xD59]))
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#define MCF_INTC1_ICR26 (*(vuint8 *)(&__IPSBAR[0xD5A]))
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#define MCF_INTC1_ICR27 (*(vuint8 *)(&__IPSBAR[0xD5B]))
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#define MCF_INTC1_ICR28 (*(vuint8 *)(&__IPSBAR[0xD5C]))
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#define MCF_INTC1_ICR29 (*(vuint8 *)(&__IPSBAR[0xD5D]))
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#define MCF_INTC1_ICR30 (*(vuint8 *)(&__IPSBAR[0xD5E]))
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#define MCF_INTC1_ICR31 (*(vuint8 *)(&__IPSBAR[0xD5F]))
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#define MCF_INTC1_ICR32 (*(vuint8 *)(&__IPSBAR[0xD60]))
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#define MCF_INTC1_ICR33 (*(vuint8 *)(&__IPSBAR[0xD61]))
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#define MCF_INTC1_ICR34 (*(vuint8 *)(&__IPSBAR[0xD62]))
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#define MCF_INTC1_ICR35 (*(vuint8 *)(&__IPSBAR[0xD63]))
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#define MCF_INTC1_ICR36 (*(vuint8 *)(&__IPSBAR[0xD64]))
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#define MCF_INTC1_ICR37 (*(vuint8 *)(&__IPSBAR[0xD65]))
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#define MCF_INTC1_ICR38 (*(vuint8 *)(&__IPSBAR[0xD66]))
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#define MCF_INTC1_ICR39 (*(vuint8 *)(&__IPSBAR[0xD67]))
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#define MCF_INTC1_ICR40 (*(vuint8 *)(&__IPSBAR[0xD68]))
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#define MCF_INTC1_ICR41 (*(vuint8 *)(&__IPSBAR[0xD69]))
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#define MCF_INTC1_ICR42 (*(vuint8 *)(&__IPSBAR[0xD6A]))
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#define MCF_INTC1_ICR43 (*(vuint8 *)(&__IPSBAR[0xD6B]))
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#define MCF_INTC1_ICR44 (*(vuint8 *)(&__IPSBAR[0xD6C]))
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#define MCF_INTC1_ICR45 (*(vuint8 *)(&__IPSBAR[0xD6D]))
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#define MCF_INTC1_ICR46 (*(vuint8 *)(&__IPSBAR[0xD6E]))
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#define MCF_INTC1_ICR47 (*(vuint8 *)(&__IPSBAR[0xD6F]))
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#define MCF_INTC1_ICR48 (*(vuint8 *)(&__IPSBAR[0xD70]))
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#define MCF_INTC1_ICR49 (*(vuint8 *)(&__IPSBAR[0xD71]))
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#define MCF_INTC1_ICR50 (*(vuint8 *)(&__IPSBAR[0xD72]))
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#define MCF_INTC1_ICR51 (*(vuint8 *)(&__IPSBAR[0xD73]))
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#define MCF_INTC1_ICR52 (*(vuint8 *)(&__IPSBAR[0xD74]))
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#define MCF_INTC1_ICR53 (*(vuint8 *)(&__IPSBAR[0xD75]))
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#define MCF_INTC1_ICR54 (*(vuint8 *)(&__IPSBAR[0xD76]))
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#define MCF_INTC1_ICR55 (*(vuint8 *)(&__IPSBAR[0xD77]))
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#define MCF_INTC1_ICR56 (*(vuint8 *)(&__IPSBAR[0xD78]))
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#define MCF_INTC1_ICR57 (*(vuint8 *)(&__IPSBAR[0xD79]))
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#define MCF_INTC1_ICR58 (*(vuint8 *)(&__IPSBAR[0xD7A]))
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#define MCF_INTC1_ICR59 (*(vuint8 *)(&__IPSBAR[0xD7B]))
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#define MCF_INTC1_ICR60 (*(vuint8 *)(&__IPSBAR[0xD7C]))
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#define MCF_INTC1_ICR61 (*(vuint8 *)(&__IPSBAR[0xD7D]))
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#define MCF_INTC1_ICR62 (*(vuint8 *)(&__IPSBAR[0xD7E]))
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#define MCF_INTC1_ICR63 (*(vuint8 *)(&__IPSBAR[0xD7F]))
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#define MCF_INTC1_SWIACK (*(vuint8 *)(&__IPSBAR[0xDE0]))
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#define MCF_INTC1_L1IACK (*(vuint8 *)(&__IPSBAR[0xDE4]))
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#define MCF_INTC1_L2IACK (*(vuint8 *)(&__IPSBAR[0xDE8]))
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#define MCF_INTC1_L3IACK (*(vuint8 *)(&__IPSBAR[0xDEC]))
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#define MCF_INTC1_L4IACK (*(vuint8 *)(&__IPSBAR[0xDF0]))
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#define MCF_INTC1_L5IACK (*(vuint8 *)(&__IPSBAR[0xDF4]))
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#define MCF_INTC1_L6IACK (*(vuint8 *)(&__IPSBAR[0xDF8]))
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#define MCF_INTC1_L7IACK (*(vuint8 *)(&__IPSBAR[0xDFC]))
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#define MCF_INTC1_ICR(x) (*(vuint8 *)(&__IPSBAR[0xD41 + ((x-1)*0x1)]))
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#define MCF_INTC1_LIACK(x) (*(vuint8 *)(&__IPSBAR[0xDE4 + ((x-1)*0x4)]))
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#define MCF_INTC_IPRH(x) (*(vuint32*)(&__IPSBAR[0xC00 + ((x)*0x100)]))
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#define MCF_INTC_IPRL(x) (*(vuint32*)(&__IPSBAR[0xC04 + ((x)*0x100)]))
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#define MCF_INTC_IMRH(x) (*(vuint32*)(&__IPSBAR[0xC08 + ((x)*0x100)]))
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#define MCF_INTC_IMRL(x) (*(vuint32*)(&__IPSBAR[0xC0C + ((x)*0x100)]))
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#define MCF_INTC_INTFRCH(x) (*(vuint32*)(&__IPSBAR[0xC10 + ((x)*0x100)]))
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#define MCF_INTC_INTFRCL(x) (*(vuint32*)(&__IPSBAR[0xC14 + ((x)*0x100)]))
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#define MCF_INTC_IRLR(x) (*(vuint8 *)(&__IPSBAR[0xC18 + ((x)*0x100)]))
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#define MCF_INTC_IACKLPR(x) (*(vuint8 *)(&__IPSBAR[0xC19 + ((x)*0x100)]))
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#define MCF_INTC_ICR01(x) (*(vuint8 *)(&__IPSBAR[0xC41 + ((x)*0x100)]))
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#define MCF_INTC_ICR02(x) (*(vuint8 *)(&__IPSBAR[0xC42 + ((x)*0x100)]))
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| 193 |
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|
#define MCF_INTC_ICR03(x) (*(vuint8 *)(&__IPSBAR[0xC43 + ((x)*0x100)]))
|
| 194 |
|
|
#define MCF_INTC_ICR04(x) (*(vuint8 *)(&__IPSBAR[0xC44 + ((x)*0x100)]))
|
| 195 |
|
|
#define MCF_INTC_ICR05(x) (*(vuint8 *)(&__IPSBAR[0xC45 + ((x)*0x100)]))
|
| 196 |
|
|
#define MCF_INTC_ICR06(x) (*(vuint8 *)(&__IPSBAR[0xC46 + ((x)*0x100)]))
|
| 197 |
|
|
#define MCF_INTC_ICR07(x) (*(vuint8 *)(&__IPSBAR[0xC47 + ((x)*0x100)]))
|
| 198 |
|
|
#define MCF_INTC_ICR08(x) (*(vuint8 *)(&__IPSBAR[0xC48 + ((x)*0x100)]))
|
| 199 |
|
|
#define MCF_INTC_ICR09(x) (*(vuint8 *)(&__IPSBAR[0xC49 + ((x)*0x100)]))
|
| 200 |
|
|
#define MCF_INTC_ICR10(x) (*(vuint8 *)(&__IPSBAR[0xC4A + ((x)*0x100)]))
|
| 201 |
|
|
#define MCF_INTC_ICR11(x) (*(vuint8 *)(&__IPSBAR[0xC4B + ((x)*0x100)]))
|
| 202 |
|
|
#define MCF_INTC_ICR12(x) (*(vuint8 *)(&__IPSBAR[0xC4C + ((x)*0x100)]))
|
| 203 |
|
|
#define MCF_INTC_ICR13(x) (*(vuint8 *)(&__IPSBAR[0xC4D + ((x)*0x100)]))
|
| 204 |
|
|
#define MCF_INTC_ICR14(x) (*(vuint8 *)(&__IPSBAR[0xC4E + ((x)*0x100)]))
|
| 205 |
|
|
#define MCF_INTC_ICR15(x) (*(vuint8 *)(&__IPSBAR[0xC4F + ((x)*0x100)]))
|
| 206 |
|
|
#define MCF_INTC_ICR16(x) (*(vuint8 *)(&__IPSBAR[0xC50 + ((x)*0x100)]))
|
| 207 |
|
|
#define MCF_INTC_ICR17(x) (*(vuint8 *)(&__IPSBAR[0xC51 + ((x)*0x100)]))
|
| 208 |
|
|
#define MCF_INTC_ICR18(x) (*(vuint8 *)(&__IPSBAR[0xC52 + ((x)*0x100)]))
|
| 209 |
|
|
#define MCF_INTC_ICR19(x) (*(vuint8 *)(&__IPSBAR[0xC53 + ((x)*0x100)]))
|
| 210 |
|
|
#define MCF_INTC_ICR20(x) (*(vuint8 *)(&__IPSBAR[0xC54 + ((x)*0x100)]))
|
| 211 |
|
|
#define MCF_INTC_ICR21(x) (*(vuint8 *)(&__IPSBAR[0xC55 + ((x)*0x100)]))
|
| 212 |
|
|
#define MCF_INTC_ICR22(x) (*(vuint8 *)(&__IPSBAR[0xC56 + ((x)*0x100)]))
|
| 213 |
|
|
#define MCF_INTC_ICR23(x) (*(vuint8 *)(&__IPSBAR[0xC57 + ((x)*0x100)]))
|
| 214 |
|
|
#define MCF_INTC_ICR24(x) (*(vuint8 *)(&__IPSBAR[0xC58 + ((x)*0x100)]))
|
| 215 |
|
|
#define MCF_INTC_ICR25(x) (*(vuint8 *)(&__IPSBAR[0xC59 + ((x)*0x100)]))
|
| 216 |
|
|
#define MCF_INTC_ICR26(x) (*(vuint8 *)(&__IPSBAR[0xC5A + ((x)*0x100)]))
|
| 217 |
|
|
#define MCF_INTC_ICR27(x) (*(vuint8 *)(&__IPSBAR[0xC5B + ((x)*0x100)]))
|
| 218 |
|
|
#define MCF_INTC_ICR28(x) (*(vuint8 *)(&__IPSBAR[0xC5C + ((x)*0x100)]))
|
| 219 |
|
|
#define MCF_INTC_ICR29(x) (*(vuint8 *)(&__IPSBAR[0xC5D + ((x)*0x100)]))
|
| 220 |
|
|
#define MCF_INTC_ICR30(x) (*(vuint8 *)(&__IPSBAR[0xC5E + ((x)*0x100)]))
|
| 221 |
|
|
#define MCF_INTC_ICR31(x) (*(vuint8 *)(&__IPSBAR[0xC5F + ((x)*0x100)]))
|
| 222 |
|
|
#define MCF_INTC_ICR32(x) (*(vuint8 *)(&__IPSBAR[0xC60 + ((x)*0x100)]))
|
| 223 |
|
|
#define MCF_INTC_ICR33(x) (*(vuint8 *)(&__IPSBAR[0xC61 + ((x)*0x100)]))
|
| 224 |
|
|
#define MCF_INTC_ICR34(x) (*(vuint8 *)(&__IPSBAR[0xC62 + ((x)*0x100)]))
|
| 225 |
|
|
#define MCF_INTC_ICR35(x) (*(vuint8 *)(&__IPSBAR[0xC63 + ((x)*0x100)]))
|
| 226 |
|
|
#define MCF_INTC_ICR36(x) (*(vuint8 *)(&__IPSBAR[0xC64 + ((x)*0x100)]))
|
| 227 |
|
|
#define MCF_INTC_ICR37(x) (*(vuint8 *)(&__IPSBAR[0xC65 + ((x)*0x100)]))
|
| 228 |
|
|
#define MCF_INTC_ICR38(x) (*(vuint8 *)(&__IPSBAR[0xC66 + ((x)*0x100)]))
|
| 229 |
|
|
#define MCF_INTC_ICR39(x) (*(vuint8 *)(&__IPSBAR[0xC67 + ((x)*0x100)]))
|
| 230 |
|
|
#define MCF_INTC_ICR40(x) (*(vuint8 *)(&__IPSBAR[0xC68 + ((x)*0x100)]))
|
| 231 |
|
|
#define MCF_INTC_ICR41(x) (*(vuint8 *)(&__IPSBAR[0xC69 + ((x)*0x100)]))
|
| 232 |
|
|
#define MCF_INTC_ICR42(x) (*(vuint8 *)(&__IPSBAR[0xC6A + ((x)*0x100)]))
|
| 233 |
|
|
#define MCF_INTC_ICR43(x) (*(vuint8 *)(&__IPSBAR[0xC6B + ((x)*0x100)]))
|
| 234 |
|
|
#define MCF_INTC_ICR44(x) (*(vuint8 *)(&__IPSBAR[0xC6C + ((x)*0x100)]))
|
| 235 |
|
|
#define MCF_INTC_ICR45(x) (*(vuint8 *)(&__IPSBAR[0xC6D + ((x)*0x100)]))
|
| 236 |
|
|
#define MCF_INTC_ICR46(x) (*(vuint8 *)(&__IPSBAR[0xC6E + ((x)*0x100)]))
|
| 237 |
|
|
#define MCF_INTC_ICR47(x) (*(vuint8 *)(&__IPSBAR[0xC6F + ((x)*0x100)]))
|
| 238 |
|
|
#define MCF_INTC_ICR48(x) (*(vuint8 *)(&__IPSBAR[0xC70 + ((x)*0x100)]))
|
| 239 |
|
|
#define MCF_INTC_ICR49(x) (*(vuint8 *)(&__IPSBAR[0xC71 + ((x)*0x100)]))
|
| 240 |
|
|
#define MCF_INTC_ICR50(x) (*(vuint8 *)(&__IPSBAR[0xC72 + ((x)*0x100)]))
|
| 241 |
|
|
#define MCF_INTC_ICR51(x) (*(vuint8 *)(&__IPSBAR[0xC73 + ((x)*0x100)]))
|
| 242 |
|
|
#define MCF_INTC_ICR52(x) (*(vuint8 *)(&__IPSBAR[0xC74 + ((x)*0x100)]))
|
| 243 |
|
|
#define MCF_INTC_ICR53(x) (*(vuint8 *)(&__IPSBAR[0xC75 + ((x)*0x100)]))
|
| 244 |
|
|
#define MCF_INTC_ICR54(x) (*(vuint8 *)(&__IPSBAR[0xC76 + ((x)*0x100)]))
|
| 245 |
|
|
#define MCF_INTC_ICR55(x) (*(vuint8 *)(&__IPSBAR[0xC77 + ((x)*0x100)]))
|
| 246 |
|
|
#define MCF_INTC_ICR56(x) (*(vuint8 *)(&__IPSBAR[0xC78 + ((x)*0x100)]))
|
| 247 |
|
|
#define MCF_INTC_ICR57(x) (*(vuint8 *)(&__IPSBAR[0xC79 + ((x)*0x100)]))
|
| 248 |
|
|
#define MCF_INTC_ICR58(x) (*(vuint8 *)(&__IPSBAR[0xC7A + ((x)*0x100)]))
|
| 249 |
|
|
#define MCF_INTC_ICR59(x) (*(vuint8 *)(&__IPSBAR[0xC7B + ((x)*0x100)]))
|
| 250 |
|
|
#define MCF_INTC_ICR60(x) (*(vuint8 *)(&__IPSBAR[0xC7C + ((x)*0x100)]))
|
| 251 |
|
|
#define MCF_INTC_ICR61(x) (*(vuint8 *)(&__IPSBAR[0xC7D + ((x)*0x100)]))
|
| 252 |
|
|
#define MCF_INTC_ICR62(x) (*(vuint8 *)(&__IPSBAR[0xC7E + ((x)*0x100)]))
|
| 253 |
|
|
#define MCF_INTC_ICR63(x) (*(vuint8 *)(&__IPSBAR[0xC7F + ((x)*0x100)]))
|
| 254 |
|
|
#define MCF_INTC_SWIACK(x) (*(vuint8 *)(&__IPSBAR[0xCE0 + ((x)*0x100)]))
|
| 255 |
|
|
#define MCF_INTC_L1IACK(x) (*(vuint8 *)(&__IPSBAR[0xCE4 + ((x)*0x100)]))
|
| 256 |
|
|
#define MCF_INTC_L2IACK(x) (*(vuint8 *)(&__IPSBAR[0xCE8 + ((x)*0x100)]))
|
| 257 |
|
|
#define MCF_INTC_L3IACK(x) (*(vuint8 *)(&__IPSBAR[0xCEC + ((x)*0x100)]))
|
| 258 |
|
|
#define MCF_INTC_L4IACK(x) (*(vuint8 *)(&__IPSBAR[0xCF0 + ((x)*0x100)]))
|
| 259 |
|
|
#define MCF_INTC_L5IACK(x) (*(vuint8 *)(&__IPSBAR[0xCF4 + ((x)*0x100)]))
|
| 260 |
|
|
#define MCF_INTC_L6IACK(x) (*(vuint8 *)(&__IPSBAR[0xCF8 + ((x)*0x100)]))
|
| 261 |
|
|
#define MCF_INTC_L7IACK(x) (*(vuint8 *)(&__IPSBAR[0xCFC + ((x)*0x100)]))
|
| 262 |
|
|
|
| 263 |
|
|
|
| 264 |
|
|
/* Bit definitions and macros for MCF_INTC_IPRH */
|
| 265 |
|
|
#define MCF_INTC_IPRH_INT32 (0x1)
|
| 266 |
|
|
#define MCF_INTC_IPRH_INT33 (0x2)
|
| 267 |
|
|
#define MCF_INTC_IPRH_INT34 (0x4)
|
| 268 |
|
|
#define MCF_INTC_IPRH_INT35 (0x8)
|
| 269 |
|
|
#define MCF_INTC_IPRH_INT36 (0x10)
|
| 270 |
|
|
#define MCF_INTC_IPRH_INT37 (0x20)
|
| 271 |
|
|
#define MCF_INTC_IPRH_INT38 (0x40)
|
| 272 |
|
|
#define MCF_INTC_IPRH_INT39 (0x80)
|
| 273 |
|
|
#define MCF_INTC_IPRH_INT40 (0x100)
|
| 274 |
|
|
#define MCF_INTC_IPRH_INT41 (0x200)
|
| 275 |
|
|
#define MCF_INTC_IPRH_INT42 (0x400)
|
| 276 |
|
|
#define MCF_INTC_IPRH_INT43 (0x800)
|
| 277 |
|
|
#define MCF_INTC_IPRH_INT44 (0x1000)
|
| 278 |
|
|
#define MCF_INTC_IPRH_INT45 (0x2000)
|
| 279 |
|
|
#define MCF_INTC_IPRH_INT46 (0x4000)
|
| 280 |
|
|
#define MCF_INTC_IPRH_INT47 (0x8000)
|
| 281 |
|
|
#define MCF_INTC_IPRH_INT48 (0x10000)
|
| 282 |
|
|
#define MCF_INTC_IPRH_INT49 (0x20000)
|
| 283 |
|
|
#define MCF_INTC_IPRH_INT50 (0x40000)
|
| 284 |
|
|
#define MCF_INTC_IPRH_INT51 (0x80000)
|
| 285 |
|
|
#define MCF_INTC_IPRH_INT52 (0x100000)
|
| 286 |
|
|
#define MCF_INTC_IPRH_INT53 (0x200000)
|
| 287 |
|
|
#define MCF_INTC_IPRH_INT54 (0x400000)
|
| 288 |
|
|
#define MCF_INTC_IPRH_INT55 (0x800000)
|
| 289 |
|
|
#define MCF_INTC_IPRH_INT56 (0x1000000)
|
| 290 |
|
|
#define MCF_INTC_IPRH_INT57 (0x2000000)
|
| 291 |
|
|
#define MCF_INTC_IPRH_INT58 (0x4000000)
|
| 292 |
|
|
#define MCF_INTC_IPRH_INT59 (0x8000000)
|
| 293 |
|
|
#define MCF_INTC_IPRH_INT60 (0x10000000)
|
| 294 |
|
|
#define MCF_INTC_IPRH_INT61 (0x20000000)
|
| 295 |
|
|
#define MCF_INTC_IPRH_INT62 (0x40000000)
|
| 296 |
|
|
#define MCF_INTC_IPRH_INT63 (0x80000000)
|
| 297 |
|
|
|
| 298 |
|
|
/* Bit definitions and macros for MCF_INTC_IPRL */
|
| 299 |
|
|
#define MCF_INTC_IPRL_INT1 (0x2)
|
| 300 |
|
|
#define MCF_INTC_IPRL_INT2 (0x4)
|
| 301 |
|
|
#define MCF_INTC_IPRL_INT3 (0x8)
|
| 302 |
|
|
#define MCF_INTC_IPRL_INT4 (0x10)
|
| 303 |
|
|
#define MCF_INTC_IPRL_INT5 (0x20)
|
| 304 |
|
|
#define MCF_INTC_IPRL_INT6 (0x40)
|
| 305 |
|
|
#define MCF_INTC_IPRL_INT7 (0x80)
|
| 306 |
|
|
#define MCF_INTC_IPRL_INT8 (0x100)
|
| 307 |
|
|
#define MCF_INTC_IPRL_INT9 (0x200)
|
| 308 |
|
|
#define MCF_INTC_IPRL_INT10 (0x400)
|
| 309 |
|
|
#define MCF_INTC_IPRL_INT11 (0x800)
|
| 310 |
|
|
#define MCF_INTC_IPRL_INT12 (0x1000)
|
| 311 |
|
|
#define MCF_INTC_IPRL_INT13 (0x2000)
|
| 312 |
|
|
#define MCF_INTC_IPRL_INT14 (0x4000)
|
| 313 |
|
|
#define MCF_INTC_IPRL_INT15 (0x8000)
|
| 314 |
|
|
#define MCF_INTC_IPRL_INT16 (0x10000)
|
| 315 |
|
|
#define MCF_INTC_IPRL_INT17 (0x20000)
|
| 316 |
|
|
#define MCF_INTC_IPRL_INT18 (0x40000)
|
| 317 |
|
|
#define MCF_INTC_IPRL_INT19 (0x80000)
|
| 318 |
|
|
#define MCF_INTC_IPRL_INT20 (0x100000)
|
| 319 |
|
|
#define MCF_INTC_IPRL_INT21 (0x200000)
|
| 320 |
|
|
#define MCF_INTC_IPRL_INT22 (0x400000)
|
| 321 |
|
|
#define MCF_INTC_IPRL_INT23 (0x800000)
|
| 322 |
|
|
#define MCF_INTC_IPRL_INT24 (0x1000000)
|
| 323 |
|
|
#define MCF_INTC_IPRL_INT25 (0x2000000)
|
| 324 |
|
|
#define MCF_INTC_IPRL_INT26 (0x4000000)
|
| 325 |
|
|
#define MCF_INTC_IPRL_INT27 (0x8000000)
|
| 326 |
|
|
#define MCF_INTC_IPRL_INT28 (0x10000000)
|
| 327 |
|
|
#define MCF_INTC_IPRL_INT29 (0x20000000)
|
| 328 |
|
|
#define MCF_INTC_IPRL_INT30 (0x40000000)
|
| 329 |
|
|
#define MCF_INTC_IPRL_INT31 (0x80000000)
|
| 330 |
|
|
|
| 331 |
|
|
/* Bit definitions and macros for MCF_INTC_IMRH */
|
| 332 |
|
|
#define MCF_INTC_IMRH_INT_MASK32 (0x1)
|
| 333 |
|
|
#define MCF_INTC_IMRH_INT_MASK33 (0x2)
|
| 334 |
|
|
#define MCF_INTC_IMRH_INT_MASK34 (0x4)
|
| 335 |
|
|
#define MCF_INTC_IMRH_INT_MASK35 (0x8)
|
| 336 |
|
|
#define MCF_INTC_IMRH_INT_MASK36 (0x10)
|
| 337 |
|
|
#define MCF_INTC_IMRH_INT_MASK37 (0x20)
|
| 338 |
|
|
#define MCF_INTC_IMRH_INT_MASK38 (0x40)
|
| 339 |
|
|
#define MCF_INTC_IMRH_INT_MASK39 (0x80)
|
| 340 |
|
|
#define MCF_INTC_IMRH_INT_MASK40 (0x100)
|
| 341 |
|
|
#define MCF_INTC_IMRH_INT_MASK41 (0x200)
|
| 342 |
|
|
#define MCF_INTC_IMRH_INT_MASK42 (0x400)
|
| 343 |
|
|
#define MCF_INTC_IMRH_INT_MASK43 (0x800)
|
| 344 |
|
|
#define MCF_INTC_IMRH_INT_MASK44 (0x1000)
|
| 345 |
|
|
#define MCF_INTC_IMRH_INT_MASK45 (0x2000)
|
| 346 |
|
|
#define MCF_INTC_IMRH_INT_MASK46 (0x4000)
|
| 347 |
|
|
#define MCF_INTC_IMRH_INT_MASK47 (0x8000)
|
| 348 |
|
|
#define MCF_INTC_IMRH_INT_MASK48 (0x10000)
|
| 349 |
|
|
#define MCF_INTC_IMRH_INT_MASK49 (0x20000)
|
| 350 |
|
|
#define MCF_INTC_IMRH_INT_MASK50 (0x40000)
|
| 351 |
|
|
#define MCF_INTC_IMRH_INT_MASK51 (0x80000)
|
| 352 |
|
|
#define MCF_INTC_IMRH_INT_MASK52 (0x100000)
|
| 353 |
|
|
#define MCF_INTC_IMRH_INT_MASK53 (0x200000)
|
| 354 |
|
|
#define MCF_INTC_IMRH_INT_MASK54 (0x400000)
|
| 355 |
|
|
#define MCF_INTC_IMRH_INT_MASK55 (0x800000)
|
| 356 |
|
|
#define MCF_INTC_IMRH_INT_MASK56 (0x1000000)
|
| 357 |
|
|
#define MCF_INTC_IMRH_INT_MASK57 (0x2000000)
|
| 358 |
|
|
#define MCF_INTC_IMRH_INT_MASK58 (0x4000000)
|
| 359 |
|
|
#define MCF_INTC_IMRH_INT_MASK59 (0x8000000)
|
| 360 |
|
|
#define MCF_INTC_IMRH_INT_MASK60 (0x10000000)
|
| 361 |
|
|
#define MCF_INTC_IMRH_INT_MASK61 (0x20000000)
|
| 362 |
|
|
#define MCF_INTC_IMRH_INT_MASK62 (0x40000000)
|
| 363 |
|
|
#define MCF_INTC_IMRH_INT_MASK63 (0x80000000)
|
| 364 |
|
|
|
| 365 |
|
|
/* Bit definitions and macros for MCF_INTC_IMRL */
|
| 366 |
|
|
#define MCF_INTC_IMRL_MASKALL (0x1)
|
| 367 |
|
|
#define MCF_INTC_IMRL_INT_MASK1 (0x2)
|
| 368 |
|
|
#define MCF_INTC_IMRL_INT_MASK2 (0x4)
|
| 369 |
|
|
#define MCF_INTC_IMRL_INT_MASK3 (0x8)
|
| 370 |
|
|
#define MCF_INTC_IMRL_INT_MASK4 (0x10)
|
| 371 |
|
|
#define MCF_INTC_IMRL_INT_MASK5 (0x20)
|
| 372 |
|
|
#define MCF_INTC_IMRL_INT_MASK6 (0x40)
|
| 373 |
|
|
#define MCF_INTC_IMRL_INT_MASK7 (0x80)
|
| 374 |
|
|
#define MCF_INTC_IMRL_INT_MASK8 (0x100)
|
| 375 |
|
|
#define MCF_INTC_IMRL_INT_MASK9 (0x200)
|
| 376 |
|
|
#define MCF_INTC_IMRL_INT_MASK10 (0x400)
|
| 377 |
|
|
#define MCF_INTC_IMRL_INT_MASK11 (0x800)
|
| 378 |
|
|
#define MCF_INTC_IMRL_INT_MASK12 (0x1000)
|
| 379 |
|
|
#define MCF_INTC_IMRL_INT_MASK13 (0x2000)
|
| 380 |
|
|
#define MCF_INTC_IMRL_INT_MASK14 (0x4000)
|
| 381 |
|
|
#define MCF_INTC_IMRL_INT_MASK15 (0x8000)
|
| 382 |
|
|
#define MCF_INTC_IMRL_INT_MASK16 (0x10000)
|
| 383 |
|
|
#define MCF_INTC_IMRL_INT_MASK17 (0x20000)
|
| 384 |
|
|
#define MCF_INTC_IMRL_INT_MASK18 (0x40000)
|
| 385 |
|
|
#define MCF_INTC_IMRL_INT_MASK19 (0x80000)
|
| 386 |
|
|
#define MCF_INTC_IMRL_INT_MASK20 (0x100000)
|
| 387 |
|
|
#define MCF_INTC_IMRL_INT_MASK21 (0x200000)
|
| 388 |
|
|
#define MCF_INTC_IMRL_INT_MASK22 (0x400000)
|
| 389 |
|
|
#define MCF_INTC_IMRL_INT_MASK23 (0x800000)
|
| 390 |
|
|
#define MCF_INTC_IMRL_INT_MASK24 (0x1000000)
|
| 391 |
|
|
#define MCF_INTC_IMRL_INT_MASK25 (0x2000000)
|
| 392 |
|
|
#define MCF_INTC_IMRL_INT_MASK26 (0x4000000)
|
| 393 |
|
|
#define MCF_INTC_IMRL_INT_MASK27 (0x8000000)
|
| 394 |
|
|
#define MCF_INTC_IMRL_INT_MASK28 (0x10000000)
|
| 395 |
|
|
#define MCF_INTC_IMRL_INT_MASK29 (0x20000000)
|
| 396 |
|
|
#define MCF_INTC_IMRL_INT_MASK30 (0x40000000)
|
| 397 |
|
|
#define MCF_INTC_IMRL_INT_MASK31 (0x80000000)
|
| 398 |
|
|
|
| 399 |
|
|
/* Bit definitions and macros for MCF_INTC_INTFRCH */
|
| 400 |
|
|
#define MCF_INTC_INTFRCH_INTFRC32 (0x1)
|
| 401 |
|
|
#define MCF_INTC_INTFRCH_INTFRC33 (0x2)
|
| 402 |
|
|
#define MCF_INTC_INTFRCH_INTFRC34 (0x4)
|
| 403 |
|
|
#define MCF_INTC_INTFRCH_INTFRC35 (0x8)
|
| 404 |
|
|
#define MCF_INTC_INTFRCH_INTFRC36 (0x10)
|
| 405 |
|
|
#define MCF_INTC_INTFRCH_INTFRC37 (0x20)
|
| 406 |
|
|
#define MCF_INTC_INTFRCH_INTFRC38 (0x40)
|
| 407 |
|
|
#define MCF_INTC_INTFRCH_INTFRC39 (0x80)
|
| 408 |
|
|
#define MCF_INTC_INTFRCH_INTFRC40 (0x100)
|
| 409 |
|
|
#define MCF_INTC_INTFRCH_INTFRC41 (0x200)
|
| 410 |
|
|
#define MCF_INTC_INTFRCH_INTFRC42 (0x400)
|
| 411 |
|
|
#define MCF_INTC_INTFRCH_INTFRC43 (0x800)
|
| 412 |
|
|
#define MCF_INTC_INTFRCH_INTFRC44 (0x1000)
|
| 413 |
|
|
#define MCF_INTC_INTFRCH_INTFRC45 (0x2000)
|
| 414 |
|
|
#define MCF_INTC_INTFRCH_INTFRC46 (0x4000)
|
| 415 |
|
|
#define MCF_INTC_INTFRCH_INTFRC47 (0x8000)
|
| 416 |
|
|
#define MCF_INTC_INTFRCH_INTFRC48 (0x10000)
|
| 417 |
|
|
#define MCF_INTC_INTFRCH_INTFRC49 (0x20000)
|
| 418 |
|
|
#define MCF_INTC_INTFRCH_INTFRC50 (0x40000)
|
| 419 |
|
|
#define MCF_INTC_INTFRCH_INTFRC51 (0x80000)
|
| 420 |
|
|
#define MCF_INTC_INTFRCH_INTFRC52 (0x100000)
|
| 421 |
|
|
#define MCF_INTC_INTFRCH_INTFRC53 (0x200000)
|
| 422 |
|
|
#define MCF_INTC_INTFRCH_INTFRC54 (0x400000)
|
| 423 |
|
|
#define MCF_INTC_INTFRCH_INTFRC55 (0x800000)
|
| 424 |
|
|
#define MCF_INTC_INTFRCH_INTFRC56 (0x1000000)
|
| 425 |
|
|
#define MCF_INTC_INTFRCH_INTFRC57 (0x2000000)
|
| 426 |
|
|
#define MCF_INTC_INTFRCH_INTFRC58 (0x4000000)
|
| 427 |
|
|
#define MCF_INTC_INTFRCH_INTFRC59 (0x8000000)
|
| 428 |
|
|
#define MCF_INTC_INTFRCH_INTFRC60 (0x10000000)
|
| 429 |
|
|
#define MCF_INTC_INTFRCH_INTFRC61 (0x20000000)
|
| 430 |
|
|
#define MCF_INTC_INTFRCH_INTFRC62 (0x40000000)
|
| 431 |
|
|
#define MCF_INTC_INTFRCH_INTFRC63 (0x80000000)
|
| 432 |
|
|
|
| 433 |
|
|
/* Bit definitions and macros for MCF_INTC_INTFRCL */
|
| 434 |
|
|
#define MCF_INTC_INTFRCL_INTFRC1 (0x2)
|
| 435 |
|
|
#define MCF_INTC_INTFRCL_INTFRC2 (0x4)
|
| 436 |
|
|
#define MCF_INTC_INTFRCL_INTFRC3 (0x8)
|
| 437 |
|
|
#define MCF_INTC_INTFRCL_INTFRC4 (0x10)
|
| 438 |
|
|
#define MCF_INTC_INTFRCL_INTFRC5 (0x20)
|
| 439 |
|
|
#define MCF_INTC_INTFRCL_INTFRC6 (0x40)
|
| 440 |
|
|
#define MCF_INTC_INTFRCL_INTFRC7 (0x80)
|
| 441 |
|
|
#define MCF_INTC_INTFRCL_INTFRC8 (0x100)
|
| 442 |
|
|
#define MCF_INTC_INTFRCL_INTFRC9 (0x200)
|
| 443 |
|
|
#define MCF_INTC_INTFRCL_INTFRC10 (0x400)
|
| 444 |
|
|
#define MCF_INTC_INTFRCL_INTFRC11 (0x800)
|
| 445 |
|
|
#define MCF_INTC_INTFRCL_INTFRC12 (0x1000)
|
| 446 |
|
|
#define MCF_INTC_INTFRCL_INTFRC13 (0x2000)
|
| 447 |
|
|
#define MCF_INTC_INTFRCL_INTFRC14 (0x4000)
|
| 448 |
|
|
#define MCF_INTC_INTFRCL_INTFRC15 (0x8000)
|
| 449 |
|
|
#define MCF_INTC_INTFRCL_INTFRC16 (0x10000)
|
| 450 |
|
|
#define MCF_INTC_INTFRCL_INTFRC17 (0x20000)
|
| 451 |
|
|
#define MCF_INTC_INTFRCL_INTFRC18 (0x40000)
|
| 452 |
|
|
#define MCF_INTC_INTFRCL_INTFRC19 (0x80000)
|
| 453 |
|
|
#define MCF_INTC_INTFRCL_INTFRC20 (0x100000)
|
| 454 |
|
|
#define MCF_INTC_INTFRCL_INTFRC21 (0x200000)
|
| 455 |
|
|
#define MCF_INTC_INTFRCL_INTFRC22 (0x400000)
|
| 456 |
|
|
#define MCF_INTC_INTFRCL_INTFRC23 (0x800000)
|
| 457 |
|
|
#define MCF_INTC_INTFRCL_INTFRC24 (0x1000000)
|
| 458 |
|
|
#define MCF_INTC_INTFRCL_INTFRC25 (0x2000000)
|
| 459 |
|
|
#define MCF_INTC_INTFRCL_INTFRC26 (0x4000000)
|
| 460 |
|
|
#define MCF_INTC_INTFRCL_INTFRC27 (0x8000000)
|
| 461 |
|
|
#define MCF_INTC_INTFRCL_INTFRC28 (0x10000000)
|
| 462 |
|
|
#define MCF_INTC_INTFRCL_INTFRC29 (0x20000000)
|
| 463 |
|
|
#define MCF_INTC_INTFRCL_INTFRC30 (0x40000000)
|
| 464 |
|
|
#define MCF_INTC_INTFRCL_INTFRC31 (0x80000000)
|
| 465 |
|
|
|
| 466 |
|
|
/* Bit definitions and macros for MCF_INTC_IRLR */
|
| 467 |
|
|
#define MCF_INTC_IRLR_IRQ(x) (((x)&0x7F)<<0x1)
|
| 468 |
|
|
|
| 469 |
|
|
/* Bit definitions and macros for MCF_INTC_IACKLPR */
|
| 470 |
|
|
#define MCF_INTC_IACKLPR_PRI(x) (((x)&0xF)<<0)
|
| 471 |
|
|
#define MCF_INTC_IACKLPR_LEVEL(x) (((x)&0x7)<<0x4)
|
| 472 |
|
|
|
| 473 |
|
|
/* Bit definitions and macros for MCF_INTC_ICR */
|
| 474 |
|
|
#define MCF_INTC_ICR_IP(x) (((x)&0x7)<<0)
|
| 475 |
|
|
#define MCF_INTC_ICR_IL(x) (((x)&0x7)<<0x3)
|
| 476 |
|
|
|
| 477 |
|
|
/* Bit definitions and macros for MCF_INTC_SWIACK */
|
| 478 |
|
|
#define MCF_INTC_SWIACK_VECTOR(x) (((x)&0xFF)<<0)
|
| 479 |
|
|
|
| 480 |
|
|
/* Bit definitions and macros for MCF_INTC_LIACK */
|
| 481 |
|
|
#define MCF_INTC_LIACK_VECTOR(x) (((x)&0xFF)<<0)
|
| 482 |
|
|
|
| 483 |
|
|
|
| 484 |
|
|
#endif /* __MCF52235_INTC_H__ */
|
