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jeremybenn |
/*!
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* \file eth.h
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* \brief Definitions for Ethernet Physical Layer Interface
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* \version $Revision: 2 $
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* \author Michael Norman
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*/
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#ifndef _ETH_PHY_H
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#define _ETH_PHY_H
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/*******************************************************************/
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int
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eth_phy_autoneg(int phy_addr, MII_SPEED speed, MII_DUPLEX duplex);
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int
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eth_phy_manual(int phy_addr, MII_SPEED speed, MII_DUPLEX duplex, int loop);
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int
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eth_phy_get_speed(int, int*);
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int
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eth_phy_get_duplex(int, int*);
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int
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eth_phy_reg_dump(int);
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/*******************************************************************/
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/* MII Register Addresses */
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#define PHY_BMCR (0x00)
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#define PHY_BMSR (0x01)
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#define PHY_PHYIDR1 (0x02)
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#define PHY_PHYIDR2 (0x03)
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#define PHY_ANAR (0x04)
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#define PHY_ANLPAR (0x05)
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/* Bit definitions and macros for PHY_CTRL */
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#define PHY_BMCR_RESET (0x8000)
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#define PHY_BMCR_LOOP (0x4000)
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#define PHY_BMCR_SPEED (0x2000)
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#define PHY_BMCR_AN_ENABLE (0x1000)
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#define PHY_BMCR_POWERDOWN (0x0800)
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#define PHY_BMCR_ISOLATE (0x0400)
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#define PHY_BMCR_AN_RESTART (0x0200)
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#define PHY_BMCR_FDX (0x0100)
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#define PHY_BMCR_COL_TEST (0x0080)
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/* Bit definitions and macros for PHY_STAT */
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#define PHY_BMSR_100BT4 (0x8000)
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#define PHY_BMSR_100BTX_FDX (0x4000)
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#define PHY_BMSR_100BTX (0x2000)
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#define PHY_BMSR_10BT_FDX (0x1000)
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#define PHY_BMSR_10BT (0x0800)
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#define PHY_BMSR_NO_PREAMBLE (0x0040)
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#define PHY_BMSR_AN_COMPLETE (0x0020)
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#define PHY_BMSR_REMOTE_FAULT (0x0010)
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#define PHY_BMSR_AN_ABILITY (0x0008)
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#define PHY_BMSR_LINK (0x0004)
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#define PHY_BMSR_JABBER (0x0002)
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#define PHY_BMSR_EXTENDED (0x0001)
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/* Bit definitions and macros for PHY_AN_ADV */
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#define PHY_ANAR_NEXT_PAGE (0x8001)
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#define PHY_ANAR_REM_FAULT (0x2001)
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#define PHY_ANAR_PAUSE (0x0401)
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#define PHY_ANAR_100BT4 (0x0201)
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#define PHY_ANAR_100BTX_FDX (0x0101)
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#define PHY_ANAR_100BTX (0x0081)
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#define PHY_ANAR_10BT_FDX (0x0041)
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#define PHY_ANAR_10BT (0x0021)
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#define PHY_ANAR_802_3 (0x0001)
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/* Bit definitions and macros for PHY_AN_LINK_PAR */
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#define PHY_ANLPAR_NEXT_PAGE (0x8000)
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#define PHY_ANLPAR_ACK (0x4000)
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#define PHY_ANLPAR_REM_FAULT (0x2000)
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#define PHY_ANLPAR_PAUSE (0x0400)
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#define PHY_ANLPAR_100BT4 (0x0200)
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#define PHY_ANLPAR_100BTX_FDX (0x0100)
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#define PHY_ANLPAR_100BTX (0x0080)
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#define PHY_ANLPAR_10BTX_FDX (0x0040)
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#define PHY_ANLPAR_10BT (0x0020)
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/*******************************************************************/
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#endif /* _ETH_PHY_H */
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