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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ColdFire_MCF52259_CodeWarrior/] [cpu/] [mcf5225x_lo.s] - Blame information for rev 578

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Line No. Rev Author Line
1 578 jeremybenn
/*
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 * File:        mcf5225x_lo.s
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 * Purpose:     Low-level routines for the MCF5225x.
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 *
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 * Notes:
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 *
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 * License:     All software covered by license agreement in -
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 *              docs/Freescale_Software_License.pdf
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 */
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#define mcf5225x_init   _mcf5225x_init
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#define common_startup  _common_startup
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#define cpu_startup     _cpu_startup
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#define main            _main
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#define __IPSBAR        ___IPSBAR
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#define __SRAM          ___SRAM
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#define __FLASH         ___FLASH
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#define __SP_INIT       ___SP_INIT
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        .extern __IPSBAR
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        .extern __SRAM
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        .extern __FLASH
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        .extern __SP_INIT
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        .extern mcf5225x_init
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    .extern common_startup
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    .extern cpu_startup
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        .extern main
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        .global asm_startmeup
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        .global _asm_startmeup
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        .global d0_reset
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        .global _d0_reset
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        .global d1_reset
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        .global _d1_reset
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    .data
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d0_reset:
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_d0_reset:  .long   0
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d1_reset:
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_d1_reset:  .long   0
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        .text
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/********************************************************************
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 *
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 * This is the main entry point upon hard reset.  The memory map is
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 * setup based on linker file definitions, then the higher level
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 * system initialization routine is called.  Finally, we jump to the
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 * "main" process.
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 */
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asm_startmeup:
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_asm_startmeup:
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    move.w      #0x2700,sr
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    /* Save off reset values of D0 and D1 */
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    move.l  d0,d6
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    move.l  d1,d7
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    /* Initialize RAMBAR1: locate SRAM and validate it */
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        move.l  #__SRAM,d0
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        andi.l  #0xFFFF0000,d0
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    add.l   #0x21,d0
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    movec   d0,RAMBAR1
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        /* Locate Stack Pointer */
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        move.l  #__SP_INIT,sp
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    /* Initialize IPSBAR */
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        move.l  #__IPSBAR,d0
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    add.l   #0x1,d0
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        move.l  d0,0x40000000
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    /* Initialize FLASHBAR */
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    move.l  #__FLASH,d0
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    cmp.l   #0x00000000,d0
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    bne     change_flashbar
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    add.l   #0x61,d0
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    movec   d0,RAMBAR0
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_continue_startup:
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        /* Locate Stack Pointer */
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        move.l  #__SP_INIT,sp
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        /* Initialize the system */
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        jsr             mcf5225x_init
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    /* Common startup code */
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    //jsr     common_startup
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    /* Save off intial D0 and D1 to RAM */
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    move.l  d6,d0_reset
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    move.l  d7,d1_reset
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    /* CPU specific startup code */
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        //jsr     cpu_startup
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        /* Jump to the main process */
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        jsr             main
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        bra             .
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        nop
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        nop
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        halt
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change_flashbar:
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    /*
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     * The following sequence is used to set FLASHBAR. Since we may
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     * be executing from Flash, we must put the routine into SRAM for
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     * execution and then jump back to Flash using the new address.
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     *
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     * The following instructions are coded into the SRAM:
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     *
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     * move.l   #(__FLASH + 0x21),d0
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     * movec    d0, RAMBAR0
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     * jmp              _continue_startup
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     *
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     * An arbitrary SRAM address is chosen until the real address
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     * can be loaded.
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     *
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     * This routine is not necessary if the default Flash address
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     * (0x00000000) is used.
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     *
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     * If running in SRAM, change_flashbar should not be executed
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     */
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        move.l  #__SRAM,a0
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        /* Code "move.l #(__FLASH + 0x21),d0" into SRAM */
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        move.w  #0x203C,d0
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        move.w  d0,(a0)+
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        move.l  #__FLASH,d0
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    add.l   #0x21,d0
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    move.l  d0,(a0)+
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        /* Code "movec d0,FLASHBAR" into SRAM */
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        move.l  #0x4e7b0C04,d0
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        move.l  d0,(a0)+
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        /* Code "jmp _continue_startup" into SRAM */
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        move.w  #0x4EF9,d0
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        move.w  d0,(a0)+
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        move.l  #_continue_startup,d0
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        move.l  d0,(a0)+
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        /* Jump to code segment in internal SRAM */
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        jmp         __SRAM
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/********************************************************************/
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        .end

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