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jeremybenn |
/* Coldfire C Header File
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* Copyright Freescale Semiconductor Inc
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* All rights reserved.
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*
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* 2007/03/19 Revision: 0.9
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*/
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#ifndef __MCF5282_PIT_H__
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#define __MCF5282_PIT_H__
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/*********************************************************************
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*
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* Programmable Interrupt Timer (PIT)
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*
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*********************************************************************/
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/* Register read/write macros */
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#define MCF_PIT0_PCSR (*(vuint16*)(&__IPSBAR[0x150000]))
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#define MCF_PIT0_PMR (*(vuint16*)(&__IPSBAR[0x150002]))
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#define MCF_PIT0_PCNTR (*(vuint16*)(&__IPSBAR[0x150004]))
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#define MCF_PIT1_PCSR (*(vuint16*)(&__IPSBAR[0x160000]))
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#define MCF_PIT1_PMR (*(vuint16*)(&__IPSBAR[0x160002]))
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#define MCF_PIT1_PCNTR (*(vuint16*)(&__IPSBAR[0x160004]))
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#define MCF_PIT2_PCSR (*(vuint16*)(&__IPSBAR[0x170000]))
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#define MCF_PIT2_PMR (*(vuint16*)(&__IPSBAR[0x170002]))
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#define MCF_PIT2_PCNTR (*(vuint16*)(&__IPSBAR[0x170004]))
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#define MCF_PIT3_PCSR (*(vuint16*)(&__IPSBAR[0x180000]))
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#define MCF_PIT3_PMR (*(vuint16*)(&__IPSBAR[0x180002]))
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#define MCF_PIT3_PCNTR (*(vuint16*)(&__IPSBAR[0x180004]))
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#define MCF_PIT_PCSR(x) (*(vuint16*)(&__IPSBAR[0x150000 + ((x)*0x10000)]))
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#define MCF_PIT_PMR(x) (*(vuint16*)(&__IPSBAR[0x150002 + ((x)*0x10000)]))
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#define MCF_PIT_PCNTR(x) (*(vuint16*)(&__IPSBAR[0x150004 + ((x)*0x10000)]))
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/* Bit definitions and macros for MCF_PIT_PCSR */
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#define MCF_PIT_PCSR_EN (0x1)
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#define MCF_PIT_PCSR_RLD (0x2)
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#define MCF_PIT_PCSR_PIF (0x4)
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#define MCF_PIT_PCSR_PIE (0x8)
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#define MCF_PIT_PCSR_OVW (0x10)
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#define MCF_PIT_PCSR_HALTED (0x20)
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#define MCF_PIT_PCSR_DOZE (0x40)
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#define MCF_PIT_PCSR_PRE(x) (((x)&0xF)<<0x8)
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/* Bit definitions and macros for MCF_PIT_PMR */
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#define MCF_PIT_PMR_PM(x) (((x)&0xFFFF)<<0)
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/* Bit definitions and macros for MCF_PIT_PCNTR */
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#define MCF_PIT_PCNTR_PC(x) (((x)&0xFFFF)<<0)
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#endif /* __MCF5282_PIT_H__ */
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