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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [ColdFire_MCF5282_Eclipse/] [RTOSDemo/] [serial/] [serial.c] - Blame information for rev 578

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1 578 jeremybenn
/*
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    FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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    ***************************************************************************
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    *                                                                         *
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    * If you are:                                                             *
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    *                                                                         *
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    *    + New to FreeRTOS,                                                   *
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    *    + Wanting to learn FreeRTOS or multitasking in general quickly       *
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    *    + Looking for basic training,                                        *
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    *    + Wanting to improve your FreeRTOS skills and productivity           *
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    *                                                                         *
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    * then take a look at the FreeRTOS books - available as PDF or paperback  *
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    *                                                                         *
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    *        "Using the FreeRTOS Real Time Kernel - a Practical Guide"        *
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    *                  http://www.FreeRTOS.org/Documentation                  *
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    *                                                                         *
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    * A pdf reference manual is also available.  Both are usually delivered   *
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    * to your inbox within 20 minutes to two hours when purchased between 8am *
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    * and 8pm GMT (although please allow up to 24 hours in case of            *
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    * exceptional circumstances).  Thank you for your support!                *
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    *                                                                         *
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    ***************************************************************************
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    This file is part of the FreeRTOS distribution.
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    FreeRTOS is free software; you can redistribute it and/or modify it under
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    the terms of the GNU General Public License (version 2) as published by the
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    Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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    ***NOTE*** The exception to the GPL is included to allow you to distribute
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    a combined work that includes FreeRTOS without being obliged to provide the
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    source code for proprietary components outside of the FreeRTOS kernel.
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    FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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    more details. You should have received a copy of the GNU General Public
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    License and the FreeRTOS license exception along with FreeRTOS; if not it
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    can be viewed here: http://www.freertos.org/a00114.html and also obtained
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    by writing to Richard Barry, contact details for whom are available on the
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    FreeRTOS WEB site.
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    1 tab == 4 spaces!
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    http://www.FreeRTOS.org - Documentation, latest information, license and
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    contact details.
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    http://www.SafeRTOS.com - A version that is certified for use in safety
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    critical systems.
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    http://www.OpenRTOS.com - Commercial support, development, porting,
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    licensing and training services.
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*/
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/* BASIC INTERRUPT DRIVEN SERIAL PORT DRIVER.
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NOTE:  This driver is primarily to test the scheduler functionality.  It does
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not effectively use the buffers or DMA and is therefore not intended to be
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an example of an efficient driver. */
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/* Standard include file. */
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#include <stdlib.h>
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "queue.h"
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#include "task.h"
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/* Demo app include files. */
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#include "serial.h"
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/* Hardware definitions. */
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#define serNO_PARITY            ( ( unsigned portCHAR ) 0x02 << 3 )
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#define ser8DATA_BITS           ( ( unsigned portCHAR ) 0x03 )
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#define ser1STOP_BIT            ( ( unsigned portCHAR ) 0x07 )
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#define serSYSTEM_CLOCK         ( ( unsigned portCHAR ) 0xdd )
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#define serTX_OUTPUT            ( ( unsigned portCHAR ) 0x04 )
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#define serRX_INPUT                     ( ( unsigned portCHAR ) 0x08 )
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#define serTX_ENABLE            ( ( unsigned portCHAR ) 0x04 )
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#define serRX_ENABLE            ( ( unsigned portCHAR ) 0x01 )
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#define serTX_INT                       ( ( unsigned portCHAR ) 0x01 )
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#define serRX_INT                       ( ( unsigned portCHAR ) 0x02 )
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/* The queues used to communicate between tasks and ISR's. */
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static xQueueHandle xRxedChars;
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static xQueueHandle xCharsForTx;
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/* Flag used to indicate the tx status. */
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static portBASE_TYPE xTxHasEnded = pdTRUE;
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/*-----------------------------------------------------------*/
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/* The UART interrupt handler. */
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void __attribute__( ( interrupt ) ) __cs3_isr_interrupt_78( void );
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/*-----------------------------------------------------------*/
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xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
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{
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const unsigned portLONG ulBaudRateDivisor = ( configCPU_CLOCK_HZ / ( 32UL * ulWantedBaud ) );
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        /* Create the queues used by the com test task. */
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        xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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        xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
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        xTxHasEnded = pdTRUE;
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        /* Set the pins to UART mode. */
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        MCF_PAD_PUAPAR |= ( serTX_OUTPUT | serRX_INPUT );
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        /* Reset the peripheral. */
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        MCF_UART1_UCR = MCF_UART_UCR_RESET_RX;
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        MCF_UART1_UCR = MCF_UART_UCR_RESET_TX;
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        MCF_UART1_UCR = MCF_UART_UCR_RESET_ERROR;
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        MCF_UART1_UCR = MCF_UART_UCR_RESET_BKCHGINT;
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        MCF_UART1_UCR = MCF_UART_UCR_RESET_MR | MCF_UART_UCR_RX_DISABLED | MCF_UART_UCR_TX_DISABLED;
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        /* Configure the UART. */
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        MCF_UART1_UMR1 = serNO_PARITY | ser8DATA_BITS;
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        MCF_UART1_UMR2 = ser1STOP_BIT;
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        MCF_UART1_UCSR = serSYSTEM_CLOCK;
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        MCF_UART1_UBG1 = ( unsigned portCHAR ) ( ( ulBaudRateDivisor >> 8UL ) & 0xffUL );
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        MCF_UART1_UBG2 = ( unsigned portCHAR ) ( ulBaudRateDivisor & 0xffUL );
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        /* Turn it on. */
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        MCF_UART1_UCR = serTX_ENABLE | serRX_ENABLE;
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        /* Configure the interrupt controller.  Run the UARTs above the kernel
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        interrupt priority for demo purposes. */
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    MCF_INTC0_ICR14 = ( ( configMAX_SYSCALL_INTERRUPT_PRIORITY - 2  ) << 3 );
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    MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK14 | 0x01 );
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        /* The Tx interrupt is not enabled until there is data to send. */
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        MCF_UART1_UIMR = serRX_INT;
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        /* Only a single port is implemented so we don't need to return anything. */
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        return NULL;
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
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{
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        /* Only one port is supported. */
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        ( void ) pxPort;
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        /* Get the next character from the buffer.  Return false if no characters
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        are available or arrive before xBlockTime expires. */
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        if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
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        {
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                return pdTRUE;
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        }
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        else
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        {
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                return pdFALSE;
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        }
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}
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/*-----------------------------------------------------------*/
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signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
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{
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        /* Only one port is supported. */
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        ( void ) pxPort;
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        /* Return false if after the block time there is no room on the Tx queue. */
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        if( xQueueSend( xCharsForTx, &cOutChar, xBlockTime ) != pdPASS )
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        {
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                return pdFAIL;
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        }
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        /* A critical section should not be required as xTxHasEnded will not be
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        written to by the ISR if it is already 0 (is this correct?). */
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        if( xTxHasEnded != pdFALSE )
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        {
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                xTxHasEnded = pdFALSE;
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                MCF_UART1_UIMR = serRX_INT | serTX_INT;
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        }
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        return pdPASS;
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}
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/*-----------------------------------------------------------*/
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void vSerialClose( xComPortHandle xPort )
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{
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        ( void ) xPort;
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}
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/*-----------------------------------------------------------*/
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void __cs3_isr_interrupt_78( void )
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{
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unsigned portCHAR ucChar;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE, xDoneSomething = pdTRUE;
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        while( xDoneSomething != pdFALSE )
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        {
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                xDoneSomething = pdFALSE;
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                /* Does the tx buffer contain space? */
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                if( ( MCF_UART1_USR & MCF_UART_USR_TXRDY ) != 0x00 )
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                {
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                        /* Are there any characters queued to be sent? */
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                        if( xQueueReceiveFromISR( xCharsForTx, &ucChar, &xHigherPriorityTaskWoken ) == pdTRUE )
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                        {
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                                /* Send the next char. */
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                                MCF_UART1_UTB = ucChar;
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                                xDoneSomething = pdTRUE;
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                        }
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                        else
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                        {
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                                /* Turn off the Tx interrupt until such time as another character
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                                is being transmitted. */
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                                MCF_UART1_UIMR = serRX_INT;
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                                xTxHasEnded = pdTRUE;
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                        }
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                }
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                if( MCF_UART1_USR & MCF_UART_USR_RXRDY )
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                {
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                        ucChar = MCF_UART1_URB;
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                        xQueueSendFromISR( xRxedChars, &ucChar, &xHigherPriorityTaskWoken );
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                        xDoneSomething = pdTRUE;
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                }
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        }
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    portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
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}
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