| 1 |
608 |
jeremybenn |
/* ----------------------------------------------------------------------------
|
| 2 |
|
|
* ATMEL Microcontroller Software Support
|
| 3 |
|
|
* ----------------------------------------------------------------------------
|
| 4 |
|
|
* Copyright (c) 2008, Atmel Corporation
|
| 5 |
|
|
*
|
| 6 |
|
|
* All rights reserved.
|
| 7 |
|
|
*
|
| 8 |
|
|
* Redistribution and use in source and binary forms, with or without
|
| 9 |
|
|
* modification, are permitted provided that the following conditions are met:
|
| 10 |
|
|
*
|
| 11 |
|
|
* - Redistributions of source code must retain the above copyright notice,
|
| 12 |
|
|
* this list of conditions and the disclaimer below.
|
| 13 |
|
|
*
|
| 14 |
|
|
* Atmel's name may not be used to endorse or promote products derived from
|
| 15 |
|
|
* this software without specific prior written permission.
|
| 16 |
|
|
*
|
| 17 |
|
|
* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
|
| 18 |
|
|
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
| 19 |
|
|
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
| 20 |
|
|
* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
|
| 21 |
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
| 22 |
|
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
|
| 23 |
|
|
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
|
| 24 |
|
|
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
|
| 25 |
|
|
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
|
| 26 |
|
|
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
| 27 |
|
|
* ----------------------------------------------------------------------------
|
| 28 |
|
|
*/
|
| 29 |
|
|
|
| 30 |
|
|
//------------------------------------------------------------------------------
|
| 31 |
|
|
// Headers
|
| 32 |
|
|
//------------------------------------------------------------------------------
|
| 33 |
|
|
|
| 34 |
|
|
#include "ssc.h"
|
| 35 |
|
|
#include <utility/trace.h>
|
| 36 |
|
|
|
| 37 |
|
|
//------------------------------------------------------------------------------
|
| 38 |
|
|
// Exported functions
|
| 39 |
|
|
//------------------------------------------------------------------------------
|
| 40 |
|
|
//------------------------------------------------------------------------------
|
| 41 |
|
|
/// Configures a SSC peripheral. If the divided clock is not used, the master
|
| 42 |
|
|
/// clock frequency can be set to 0.
|
| 43 |
|
|
/// \note The emitter and transmitter are disabled by this function.
|
| 44 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 45 |
|
|
/// \param id Peripheral ID of the SSC.
|
| 46 |
|
|
//------------------------------------------------------------------------------
|
| 47 |
|
|
void SSC_Configure(AT91S_SSC *ssc,
|
| 48 |
|
|
unsigned int id,
|
| 49 |
|
|
unsigned int bitRate,
|
| 50 |
|
|
unsigned int masterClock)
|
| 51 |
|
|
{
|
| 52 |
|
|
// Enable SSC peripheral clock
|
| 53 |
|
|
AT91C_BASE_PMC->PMC_PCER = 1 << id;
|
| 54 |
|
|
|
| 55 |
|
|
// Reset, disable receiver & transmitter
|
| 56 |
|
|
ssc->SSC_CR = AT91C_SSC_RXDIS | AT91C_SSC_TXDIS | AT91C_SSC_SWRST;
|
| 57 |
|
|
ssc->SSC_PTCR = AT91C_PDC_RXTDIS | AT91C_PDC_TXTDIS;
|
| 58 |
|
|
|
| 59 |
|
|
// Configure clock frequency
|
| 60 |
|
|
if (bitRate != 0) {
|
| 61 |
|
|
|
| 62 |
|
|
ssc->SSC_CMR = masterClock / (2 * bitRate);
|
| 63 |
|
|
}
|
| 64 |
|
|
else {
|
| 65 |
|
|
|
| 66 |
|
|
ssc->SSC_CMR = 0;
|
| 67 |
|
|
}
|
| 68 |
|
|
}
|
| 69 |
|
|
|
| 70 |
|
|
//------------------------------------------------------------------------------
|
| 71 |
|
|
/// Configures the transmitter of a SSC peripheral. Several macros can be used
|
| 72 |
|
|
/// to compute the values of the Transmit Clock Mode Register (TCMR) and the
|
| 73 |
|
|
/// Transmit Frame Mode Register (TFMR) (see "SSC configuration macros").
|
| 74 |
|
|
/// \param ssc Pointer to a AT91S_SSC instance.
|
| 75 |
|
|
/// \param tcmr Transmit Clock Mode Register value.
|
| 76 |
|
|
/// \param tfmr Transmit Frame Mode Register value.
|
| 77 |
|
|
//------------------------------------------------------------------------------
|
| 78 |
|
|
void SSC_ConfigureTransmitter(AT91S_SSC *ssc,
|
| 79 |
|
|
unsigned int tcmr,
|
| 80 |
|
|
unsigned int tfmr)
|
| 81 |
|
|
{
|
| 82 |
|
|
ssc->SSC_TCMR = tcmr;
|
| 83 |
|
|
ssc->SSC_TFMR = tfmr;
|
| 84 |
|
|
}
|
| 85 |
|
|
|
| 86 |
|
|
//------------------------------------------------------------------------------
|
| 87 |
|
|
/// Configures the receiver of a SSC peripheral. Several macros can be used
|
| 88 |
|
|
/// to compute the values of the Receive Clock Mode Register (TCMR) and the
|
| 89 |
|
|
/// Receive Frame Mode Register (TFMR) (see "SSC configuration macros").
|
| 90 |
|
|
/// \param ssc Pointer to a AT91S_SSC instance.
|
| 91 |
|
|
/// \param rcmr Receive Clock Mode Register value.
|
| 92 |
|
|
/// \param rfmr Receive Frame Mode Register value.
|
| 93 |
|
|
//------------------------------------------------------------------------------
|
| 94 |
|
|
void SSC_ConfigureReceiver(AT91S_SSC *ssc,
|
| 95 |
|
|
unsigned int rcmr,
|
| 96 |
|
|
unsigned int rfmr)
|
| 97 |
|
|
{
|
| 98 |
|
|
ssc->SSC_RCMR = rcmr;
|
| 99 |
|
|
ssc->SSC_RFMR = rfmr;
|
| 100 |
|
|
}
|
| 101 |
|
|
|
| 102 |
|
|
//------------------------------------------------------------------------------
|
| 103 |
|
|
/// Enables the transmitter of a SSC peripheral.
|
| 104 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 105 |
|
|
//------------------------------------------------------------------------------
|
| 106 |
|
|
void SSC_EnableTransmitter(AT91S_SSC *ssc)
|
| 107 |
|
|
{
|
| 108 |
|
|
ssc->SSC_CR = AT91C_SSC_TXEN;
|
| 109 |
|
|
}
|
| 110 |
|
|
|
| 111 |
|
|
//------------------------------------------------------------------------------
|
| 112 |
|
|
/// Disables the transmitter of a SSC peripheral.
|
| 113 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 114 |
|
|
//------------------------------------------------------------------------------
|
| 115 |
|
|
void SSC_DisableTransmitter(AT91S_SSC *ssc)
|
| 116 |
|
|
{
|
| 117 |
|
|
ssc->SSC_CR = AT91C_SSC_TXDIS;
|
| 118 |
|
|
}
|
| 119 |
|
|
|
| 120 |
|
|
//------------------------------------------------------------------------------
|
| 121 |
|
|
/// Enables the receiver of a SSC peripheral.
|
| 122 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 123 |
|
|
//------------------------------------------------------------------------------
|
| 124 |
|
|
void SSC_EnableReceiver(AT91S_SSC *ssc)
|
| 125 |
|
|
{
|
| 126 |
|
|
ssc->SSC_CR = AT91C_SSC_RXEN;
|
| 127 |
|
|
}
|
| 128 |
|
|
|
| 129 |
|
|
//------------------------------------------------------------------------------
|
| 130 |
|
|
/// Disables the receiver of a SSC peripheral.
|
| 131 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 132 |
|
|
//------------------------------------------------------------------------------
|
| 133 |
|
|
void SSC_DisableReceiver(AT91S_SSC *ssc)
|
| 134 |
|
|
{
|
| 135 |
|
|
ssc->SSC_CR = AT91C_SSC_RXDIS;
|
| 136 |
|
|
}
|
| 137 |
|
|
|
| 138 |
|
|
//------------------------------------------------------------------------------
|
| 139 |
|
|
/// Enables one or more interrupt sources of a SSC peripheral.
|
| 140 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 141 |
|
|
/// \param sources Interrupt sources to enable.
|
| 142 |
|
|
//------------------------------------------------------------------------------
|
| 143 |
|
|
void SSC_EnableInterrupts(AT91S_SSC *ssc, unsigned int sources)
|
| 144 |
|
|
{
|
| 145 |
|
|
ssc->SSC_IER = sources;
|
| 146 |
|
|
}
|
| 147 |
|
|
|
| 148 |
|
|
//------------------------------------------------------------------------------
|
| 149 |
|
|
/// Disables one or more interrupt sources of a SSC peripheral.
|
| 150 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 151 |
|
|
/// \param sources Interrupt source to disable.
|
| 152 |
|
|
//------------------------------------------------------------------------------
|
| 153 |
|
|
void SSC_DisableInterrupts(AT91S_SSC *ssc, unsigned int sources)
|
| 154 |
|
|
{
|
| 155 |
|
|
ssc->SSC_IDR = sources;
|
| 156 |
|
|
}
|
| 157 |
|
|
|
| 158 |
|
|
//------------------------------------------------------------------------------
|
| 159 |
|
|
/// Sends one data frame through a SSC peripheral. If another frame is currently
|
| 160 |
|
|
/// being sent, this function waits for the previous transfer to complete.
|
| 161 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 162 |
|
|
/// \param frame Data frame to send.
|
| 163 |
|
|
//------------------------------------------------------------------------------
|
| 164 |
|
|
void SSC_Write(AT91S_SSC *ssc, unsigned int frame)
|
| 165 |
|
|
{
|
| 166 |
|
|
while ((ssc->SSC_SR & AT91C_SSC_TXRDY) == 0);
|
| 167 |
|
|
ssc->SSC_THR = frame;
|
| 168 |
|
|
}
|
| 169 |
|
|
|
| 170 |
|
|
//------------------------------------------------------------------------------
|
| 171 |
|
|
/// Sends the contents of a data buffer a SSC peripheral, using the PDC. Returns
|
| 172 |
|
|
/// true if the buffer has been queued for transmission; otherwise returns
|
| 173 |
|
|
/// false.
|
| 174 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 175 |
|
|
/// \param buffer Data buffer to send.
|
| 176 |
|
|
/// \param length Size of the data buffer.
|
| 177 |
|
|
//------------------------------------------------------------------------------
|
| 178 |
|
|
unsigned char SSC_WriteBuffer(AT91S_SSC *ssc,
|
| 179 |
|
|
void *buffer,
|
| 180 |
|
|
unsigned int length)
|
| 181 |
|
|
{
|
| 182 |
|
|
// Check if first bank is free
|
| 183 |
|
|
if (ssc->SSC_TCR == 0) {
|
| 184 |
|
|
|
| 185 |
|
|
ssc->SSC_TPR = (unsigned int) buffer;
|
| 186 |
|
|
ssc->SSC_TCR = length;
|
| 187 |
|
|
ssc->SSC_PTCR = AT91C_PDC_TXTEN;
|
| 188 |
|
|
return 1;
|
| 189 |
|
|
}
|
| 190 |
|
|
// Check if second bank is free
|
| 191 |
|
|
else if (ssc->SSC_TNCR == 0) {
|
| 192 |
|
|
|
| 193 |
|
|
ssc->SSC_TNPR = (unsigned int) buffer;
|
| 194 |
|
|
ssc->SSC_TNCR = length;
|
| 195 |
|
|
return 1;
|
| 196 |
|
|
}
|
| 197 |
|
|
|
| 198 |
|
|
// No free banks
|
| 199 |
|
|
return 0;
|
| 200 |
|
|
}
|
| 201 |
|
|
|
| 202 |
|
|
//------------------------------------------------------------------------------
|
| 203 |
|
|
/// Waits until one frame is received on a SSC peripheral, and returns it.
|
| 204 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 205 |
|
|
//------------------------------------------------------------------------------
|
| 206 |
|
|
unsigned int SSC_Read(AT91S_SSC *ssc)
|
| 207 |
|
|
{
|
| 208 |
|
|
while ((ssc->SSC_SR & AT91C_SSC_RXRDY) == 0);
|
| 209 |
|
|
return ssc->SSC_RHR;
|
| 210 |
|
|
}
|
| 211 |
|
|
|
| 212 |
|
|
//------------------------------------------------------------------------------
|
| 213 |
|
|
/// Reads data coming from a SSC peripheral receiver and stores it into the
|
| 214 |
|
|
/// provided buffer. Returns true if the buffer has been queued for reception;
|
| 215 |
|
|
/// otherwise returns false.
|
| 216 |
|
|
/// \param ssc Pointer to an AT91S_SSC instance.
|
| 217 |
|
|
/// \param buffer Data buffer used for reception.
|
| 218 |
|
|
/// \param length Size in bytes of the data buffer.
|
| 219 |
|
|
//------------------------------------------------------------------------------
|
| 220 |
|
|
unsigned char SSC_ReadBuffer(AT91S_SSC *ssc,
|
| 221 |
|
|
void *buffer,
|
| 222 |
|
|
unsigned int length)
|
| 223 |
|
|
{
|
| 224 |
|
|
// Check if the first bank is free
|
| 225 |
|
|
if (ssc->SSC_RCR == 0) {
|
| 226 |
|
|
|
| 227 |
|
|
ssc->SSC_RPR = (unsigned int) buffer;
|
| 228 |
|
|
ssc->SSC_RCR = length;
|
| 229 |
|
|
ssc->SSC_PTCR = AT91C_PDC_RXTEN;
|
| 230 |
|
|
return 1;
|
| 231 |
|
|
}
|
| 232 |
|
|
// Check if second bank is free
|
| 233 |
|
|
else if (ssc->SSC_RNCR == 0) {
|
| 234 |
|
|
|
| 235 |
|
|
ssc->SSC_RNPR = (unsigned int) buffer;
|
| 236 |
|
|
ssc->SSC_RNCR = length;
|
| 237 |
|
|
return 1;
|
| 238 |
|
|
}
|
| 239 |
|
|
|
| 240 |
|
|
// No free bank
|
| 241 |
|
|
return 0;
|
| 242 |
|
|
}
|
| 243 |
|
|
|