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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [Common/] [drivers/] [LuminaryMicro/] [hw_ints.h] - Blame information for rev 636

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1 610 jeremybenn
//*****************************************************************************
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//
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// hw_ints.h - Macros that define the interrupt assignment on Stellaris.
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//
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// Copyright (c) 2005-2008 Luminary Micro, Inc.  All rights reserved.
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// 
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// Software License Agreement
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// 
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// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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// exclusively on LMI's microcontroller products.
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// 
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// The software is owned by LMI and/or its suppliers, and is protected under
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// applicable copyright laws.  All rights are reserved.  You may not combine
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// this software with "viral" open-source software in order to form a larger
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// program.  Any use in violation of the foregoing restrictions may subject
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// the user to criminal sanctions under applicable laws, as well as to civil
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// liability for the breach of the terms and conditions of this license.
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// 
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// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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// 
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// This is part of revision 2523 of the Stellaris Peripheral Driver Library.
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//
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//*****************************************************************************
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#ifndef __HW_INTS_H__
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#define __HW_INTS_H__
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//*****************************************************************************
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//
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// The following are defines for the fault assignments.
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//
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//*****************************************************************************
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#define FAULT_NMI               2           // NMI fault
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#define FAULT_HARD              3           // Hard fault
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#define FAULT_MPU               4           // MPU fault
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#define FAULT_BUS               5           // Bus fault
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#define FAULT_USAGE             6           // Usage fault
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#define FAULT_SVCALL            11          // SVCall
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#define FAULT_DEBUG             12          // Debug monitor
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#define FAULT_PENDSV            14          // PendSV
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#define FAULT_SYSTICK           15          // System Tick
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//*****************************************************************************
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//
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// The following are defines for the interrupt assignments.
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//
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//*****************************************************************************
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#define INT_GPIOA               16          // GPIO Port A
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#define INT_GPIOB               17          // GPIO Port B
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#define INT_GPIOC               18          // GPIO Port C
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#define INT_GPIOD               19          // GPIO Port D
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#define INT_GPIOE               20          // GPIO Port E
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#define INT_UART0               21          // UART0 Rx and Tx
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#define INT_UART1               22          // UART1 Rx and Tx
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#define INT_SSI0                23          // SSI0 Rx and Tx
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#define INT_I2C0                24          // I2C0 Master and Slave
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#define INT_PWM_FAULT           25          // PWM Fault
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#define INT_PWM0                26          // PWM Generator 0
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#define INT_PWM1                27          // PWM Generator 1
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#define INT_PWM2                28          // PWM Generator 2
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#define INT_QEI0                29          // Quadrature Encoder 0
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#define INT_ADC0                30          // ADC Sequence 0
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#define INT_ADC1                31          // ADC Sequence 1
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#define INT_ADC2                32          // ADC Sequence 2
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#define INT_ADC3                33          // ADC Sequence 3
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#define INT_WATCHDOG            34          // Watchdog timer
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#define INT_TIMER0A             35          // Timer 0 subtimer A
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#define INT_TIMER0B             36          // Timer 0 subtimer B
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#define INT_TIMER1A             37          // Timer 1 subtimer A
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#define INT_TIMER1B             38          // Timer 1 subtimer B
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#define INT_TIMER2A             39          // Timer 2 subtimer A
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#define INT_TIMER2B             40          // Timer 2 subtimer B
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#define INT_COMP0               41          // Analog Comparator 0
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#define INT_COMP1               42          // Analog Comparator 1
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#define INT_COMP2               43          // Analog Comparator 2
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#define INT_SYSCTL              44          // System Control (PLL, OSC, BO)
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#define INT_FLASH               45          // FLASH Control
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#define INT_GPIOF               46          // GPIO Port F
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#define INT_GPIOG               47          // GPIO Port G
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#define INT_GPIOH               48          // GPIO Port H
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#define INT_UART2               49          // UART2 Rx and Tx
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#define INT_SSI1                50          // SSI1 Rx and Tx
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#define INT_TIMER3A             51          // Timer 3 subtimer A
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#define INT_TIMER3B             52          // Timer 3 subtimer B
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#define INT_I2C1                53          // I2C1 Master and Slave
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#define INT_QEI1                54          // Quadrature Encoder 1
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#define INT_CAN0                55          // CAN0
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#define INT_CAN1                56          // CAN1
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#define INT_CAN2                57          // CAN2
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#define INT_ETH                 58          // Ethernet
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#define INT_HIBERNATE           59          // Hibernation module
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#define INT_USB0                60          // USB 0 Controller
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#define INT_PWM3                61          // PWM Generator 3
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#define INT_UDMA                62          // uDMA controller
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#define INT_UDMAERR             63          // uDMA Error
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//*****************************************************************************
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//
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// The following are defines for the total number of interrupts.
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//
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//*****************************************************************************
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#define NUM_INTERRUPTS          64
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//*****************************************************************************
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//
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// The following are defines for the total number of priority levels.
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//
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//*****************************************************************************
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#define NUM_PRIORITY            8
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#define NUM_PRIORITY_BITS       3
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//*****************************************************************************
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//
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// The following definitions are deprecated.
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//
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//*****************************************************************************
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#ifndef DEPRECATED
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//*****************************************************************************
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//
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// The following are deprecated defines for the interrupt assignments.
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//
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//*****************************************************************************
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#define INT_SSI                 23          // SSI Rx and Tx
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#define INT_I2C                 24          // I2C Master and Slave
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#define INT_QEI                 29          // Quadrature Encoder
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#endif
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#endif // __HW_INTS_H__

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