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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [Common/] [drivers/] [LuminaryMicro/] [hw_qei.h] - Blame information for rev 610

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1 610 jeremybenn
//*****************************************************************************
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//
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// hw_qei.h - Macros used when accessing the QEI hardware.
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//
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// Copyright (c) 2005-2008 Luminary Micro, Inc.  All rights reserved.
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// 
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// Software License Agreement
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// 
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// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
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// exclusively on LMI's microcontroller products.
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// 
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// The software is owned by LMI and/or its suppliers, and is protected under
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// applicable copyright laws.  All rights are reserved.  You may not combine
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// this software with "viral" open-source software in order to form a larger
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// program.  Any use in violation of the foregoing restrictions may subject
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// the user to criminal sanctions under applicable laws, as well as to civil
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// liability for the breach of the terms and conditions of this license.
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// 
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// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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// 
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// This is part of revision 2523 of the Stellaris Peripheral Driver Library.
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//
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//*****************************************************************************
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#ifndef __HW_QEI_H__
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#define __HW_QEI_H__
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//*****************************************************************************
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//
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// The following are defines for the QEI register offsets.
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//
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//*****************************************************************************
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#define QEI_O_CTL               0x00000000  // Configuration and control reg.
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#define QEI_O_STAT              0x00000004  // Status register
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#define QEI_O_POS               0x00000008  // Current position register
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#define QEI_O_MAXPOS            0x0000000C  // Maximum position register
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#define QEI_O_LOAD              0x00000010  // Velocity timer load register
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#define QEI_O_TIME              0x00000014  // Velocity timer register
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#define QEI_O_COUNT             0x00000018  // Velocity pulse count register
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#define QEI_O_SPEED             0x0000001C  // Velocity speed register
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#define QEI_O_INTEN             0x00000020  // Interrupt enable register
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#define QEI_O_RIS               0x00000024  // Raw interrupt status register
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#define QEI_O_ISC               0x00000028  // Interrupt status register
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_CTL register.
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//
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//*****************************************************************************
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#define QEI_CTL_STALLEN         0x00001000  // Stall enable
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#define QEI_CTL_INVI            0x00000800  // Invert Index input
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#define QEI_CTL_INVB            0x00000400  // Invert PhB input
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#define QEI_CTL_INVA            0x00000200  // Invert PhA input
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#define QEI_CTL_VELDIV_M        0x000001C0  // Velocity predivider mask
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#define QEI_CTL_VELDIV_1        0x00000000  // Predivide by 1
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#define QEI_CTL_VELDIV_2        0x00000040  // Predivide by 2
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#define QEI_CTL_VELDIV_4        0x00000080  // Predivide by 4
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#define QEI_CTL_VELDIV_8        0x000000C0  // Predivide by 8
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#define QEI_CTL_VELDIV_16       0x00000100  // Predivide by 16
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#define QEI_CTL_VELDIV_32       0x00000140  // Predivide by 32
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#define QEI_CTL_VELDIV_64       0x00000180  // Predivide by 64
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#define QEI_CTL_VELDIV_128      0x000001C0  // Predivide by 128
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#define QEI_CTL_VELEN           0x00000020  // Velocity enable
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#define QEI_CTL_RESMODE         0x00000010  // Position counter reset mode
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#define QEI_CTL_CAPMODE         0x00000008  // Edge capture mode
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#define QEI_CTL_SIGMODE         0x00000004  // Encoder signaling mode
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#define QEI_CTL_SWAP            0x00000002  // Swap input signals
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#define QEI_CTL_ENABLE          0x00000001  // QEI enable
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_STAT register.
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//
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//*****************************************************************************
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#define QEI_STAT_DIRECTION      0x00000002  // Direction of rotation
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#define QEI_STAT_ERROR          0x00000001  // Signalling error detected
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_POS register.
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//
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//*****************************************************************************
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#define QEI_POS_M               0xFFFFFFFF  // Current encoder position
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#define QEI_POS_S               0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_MAXPOS register.
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//
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//*****************************************************************************
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#define QEI_MAXPOS_M            0xFFFFFFFF  // Maximum encoder position
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#define QEI_MAXPOS_S            0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_LOAD register.
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//
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//*****************************************************************************
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#define QEI_LOAD_M              0xFFFFFFFF  // Velocity timer load value
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#define QEI_LOAD_S              0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_TIME register.
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//
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//*****************************************************************************
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#define QEI_TIME_M              0xFFFFFFFF  // Velocity timer current value
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#define QEI_TIME_S              0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_COUNT register.
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//
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//*****************************************************************************
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#define QEI_COUNT_M             0xFFFFFFFF  // Encoder running pulse count
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#define QEI_COUNT_S             0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_SPEED register.
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//
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//*****************************************************************************
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#define QEI_SPEED_M             0xFFFFFFFF  // Encoder pulse count
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#define QEI_SPEED_S             0
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_INTEN register.
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//
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//*****************************************************************************
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#define QEI_INTEN_ERROR         0x00000008  // Phase error detected
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#define QEI_INTEN_DIR           0x00000004  // Direction change
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#define QEI_INTEN_TIMER         0x00000002  // Velocity timer expired
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#define QEI_INTEN_INDEX         0x00000001  // Index pulse detected
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_RIS register.
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//
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//*****************************************************************************
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#define QEI_RIS_ERROR           0x00000008  // Phase error detected
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#define QEI_RIS_DIR             0x00000004  // Direction change
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#define QEI_RIS_TIMER           0x00000002  // Velocity timer expired
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#define QEI_RIS_INDEX           0x00000001  // Index pulse detected
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//*****************************************************************************
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//
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// The following are defines for the bit fields in the QEI_O_ISC register.
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//
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//*****************************************************************************
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#define QEI_ISC_ERROR           0x00000008  // Phase Error Interrupt.
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#define QEI_ISC_DIR             0x00000004  // Direction Change Interrupt.
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#define QEI_ISC_TIMER           0x00000002  // Velocity Timer Expired
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                                            // Interrupt.
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#define QEI_ISC_INDEX           0x00000001  // Index Pulse Interrupt.
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//*****************************************************************************
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//
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// The following definitions are deprecated.
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//
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//*****************************************************************************
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#ifndef DEPRECATED
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//*****************************************************************************
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//
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// The following are deprecated defines for the bit fields in the QEI_ISC
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// register.
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//
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//*****************************************************************************
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#define QEI_INT_ERROR           0x00000008  // Phase error detected
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#define QEI_INT_DIR             0x00000004  // Direction change
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#define QEI_INT_TIMER           0x00000002  // Velocity timer expired
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#define QEI_INT_INDEX           0x00000001  // Index pulse detected
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//*****************************************************************************
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//
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// The following are deprecated defines for the reset values for the QEI
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// registers.
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//
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//*****************************************************************************
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#define QEI_RV_POS              0x00000000  // Current position register
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#define QEI_RV_LOAD             0x00000000  // Velocity timer load register
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#define QEI_RV_CTL              0x00000000  // Configuration and control reg.
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#define QEI_RV_RIS              0x00000000  // Raw interrupt status register
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#define QEI_RV_ISC              0x00000000  // Interrupt status register
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#define QEI_RV_SPEED            0x00000000  // Velocity speed register
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#define QEI_RV_INTEN            0x00000000  // Interrupt enable register
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#define QEI_RV_STAT             0x00000000  // Status register
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#define QEI_RV_COUNT            0x00000000  // Velocity pulse count register
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#define QEI_RV_MAXPOS           0x00000000  // Maximum position register
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#define QEI_RV_TIME             0x00000000  // Velocity timer register
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#endif
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#endif // __HW_QEI_H__

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