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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [Common/] [drivers/] [ST/] [STM32F10xFWLib/] [inc/] [stm32f10x_i2c.h] - Blame information for rev 867

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1 608 jeremybenn 
/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2 
* File Name          : stm32f10x_i2c.h
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* Author             : MCD Application Team
4 
* Date First Issued  : 09/29/2006
5 
* Description        : This file contains all the functions prototypes for the
6 
*                      I2C firmware library.
7 
********************************************************************************
8 
* History:
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* 04/02/2007: V0.2
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* 02/05/2007: V0.1
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* 09/29/2006: V0.01
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********************************************************************************
13 
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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21 
/* Define to prevent recursive inclusion -------------------------------------*/
22 
#ifndef __STM32F10x_I2C_H
23 
#define __STM32F10x_I2C_H
24 
 
25 
/* Includes ------------------------------------------------------------------*/
26 
#include "stm32f10x_map.h"
27 
 
28 
/* Exported types ------------------------------------------------------------*/
29 
/* I2C Init structure definition */
30 
typedef struct
31 
{
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  u16 I2C_Mode;
33 
  u16 I2C_DutyCycle;
34 
  u16 I2C_OwnAddress1;
35 
  u16 I2C_Ack;
36 
  u16 I2C_AcknowledgedAddress;
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  u32 I2C_ClockSpeed;
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}I2C_InitTypeDef;
39 
 
40 
/* Exported constants --------------------------------------------------------*/
41 
/* I2C modes */
42 
#define I2C_Mode_I2C                    ((u16)0x0000)
43 
#define I2C_Mode_SMBusDevice            ((u16)0x0002)
44 
#define I2C_Mode_SMBusHost              ((u16)0x000A)
45 
 
46 
#define IS_I2C_MODE(MODE) ((MODE == I2C_Mode_I2C) || \
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                           (MODE == I2C_Mode_SMBusDevice) || \
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                           (MODE == I2C_Mode_SMBusHost))
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/* I2C duty cycle in fast mode */
50 
#define I2C_DutyCycle_16_9              ((u16)0x4000)
51 
#define I2C_DutyCycle_2                 ((u16)0xBFFF)
52 
 
53 
#define IS_I2C_DUTY_CYCLE(CYCLE) ((CYCLE == I2C_DutyCycle_16_9) || \
54 
                                  (CYCLE == I2C_DutyCycle_2))
55 
 
56 
/* I2C cknowledgementy */
57 
#define I2C_Ack_Enable                  ((u16)0x0400)
58 
#define I2C_Ack_Disable                 ((u16)0x0000)
59 
 
60 
#define IS_I2C_ACK_STATE(STATE) ((STATE == I2C_Ack_Enable) || \
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                                 (STATE == I2C_Ack_Disable))
62 
 
63 
/* I2C transfer direction */
64 
#define  I2C_Direction_Transmitter      ((u8)0x00)
65 
#define  I2C_Direction_Receiver         ((u8)0x01)
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67 
#define IS_I2C_DIRECTION(DIRECTION) ((DIRECTION == I2C_Direction_Transmitter) || \
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                                     (DIRECTION == I2C_Direction_Receiver))
69 
 
70 
/* I2C acknowledged address defines */
71 
#define I2C_AcknowledgedAddress_7bit    ((u16)0x4000)
72 
#define I2C_AcknowledgedAddress_10bit   ((u16)0xC000)
73 
 
74 
#define IS_I2C_ACKNOWLEDGE_ADDRESS(ADDRESS) ((ADDRESS == I2C_AcknowledgedAddress_7bit) || \
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                                             (ADDRESS == I2C_AcknowledgedAddress_10bit))
76 
 
77 
/* I2C registers */
78 
#define I2C_Register_CR1                ((u8)0x00)
79 
#define I2C_Register_CR2                ((u8)0x04)
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#define I2C_Register_OAR1               ((u8)0x08)
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#define I2C_Register_OAR2               ((u8)0x0C)
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#define I2C_Register_DR                 ((u8)0x10)
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#define I2C_Register_SR1                ((u8)0x14)
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#define I2C_Register_SR2                ((u8)0x18)
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#define I2C_Register_CCR                ((u8)0x1C)
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#define I2C_Register_TRISE              ((u8)0x20)
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88 
#define IS_I2C_REGISTER(REGISTER) ((REGISTER == I2C_Register_CR1) || \
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                                   (REGISTER == I2C_Register_CR2) || \
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                                   (REGISTER == I2C_Register_OAR1) || \
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                                   (REGISTER == I2C_Register_OAR2) || \
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                                   (REGISTER == I2C_Register_DR) || \
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                                   (REGISTER == I2C_Register_SR1) || \
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                                   (REGISTER == I2C_Register_SR2) || \
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                                   (REGISTER == I2C_Register_CCR) || \
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                                   (REGISTER == I2C_Register_TRISE))
97 
 
98 
/* I2C SMBus alert pin level */
99 
#define I2C_SMBusAlert_Low              ((u16)0x2000)
100 
#define I2C_SMBusAlert_High             ((u16)0xCFFF)
101 
 
102 
#define IS_I2C_SMBUS_ALERT(ALERT) ((ALERT == I2C_SMBusAlert_Low) || \
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                                   (ALERT == I2C_SMBusAlert_High))
104 
 
105 
/* I2C PEC position */
106 
#define I2C_PECPosition_Next            ((u16)0x0800)
107 
#define I2C_PECPosition_Current         ((u16)0xF7FF)
108 
 
109 
#define IS_I2C_PEC_POSITION(POSITION) ((POSITION == I2C_PECPosition_Next) || \
110 
                                       (POSITION == I2C_PECPosition_Current))
111 
 
112 
/* I2C interrupts definition */
113 
#define I2C_IT_BUF                      ((u16)0x0400)
114 
#define I2C_IT_EVT                      ((u16)0x0200)
115 
#define I2C_IT_ERR                      ((u16)0x0100)
116 
 
117 
#define IS_I2C_CONFIG_IT(IT) (((IT & (u16)0xF8FF) == 0x00) && (IT != 0x00))
118 
 
119 
/* I2C interrupts definition */
120 
#define I2C_IT_SMBALERT                 ((u32)0x10008000)
121 
#define I2C_IT_TIMEOUT                  ((u32)0x10004000)
122 
#define I2C_IT_PECERR                   ((u32)0x10001000)
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#define I2C_IT_OVR                      ((u32)0x10000800)
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#define I2C_IT_AF                       ((u32)0x10000400)
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#define I2C_IT_ARLO                     ((u32)0x10000200)
126 
#define I2C_IT_BERR                     ((u32)0x10000100)
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#define I2C_IT_TXE                      ((u32)0x00000080)
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#define I2C_IT_RXNE                     ((u32)0x00000040)
129 
#define I2C_IT_STOPF                    ((u32)0x60000010)
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#define I2C_IT_ADD10                    ((u32)0x20000008)
131 
#define I2C_IT_BTF                      ((u32)0x60000004)
132 
#define I2C_IT_ADDR                     ((u32)0xA0000002)
133 
#define I2C_IT_SB                       ((u32)0x20000001)
134 
 
135 
#define IS_I2C_CLEAR_IT(IT) ((IT == I2C_IT_SMBALERT) || (IT == I2C_IT_TIMEOUT) || \
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                             (IT == I2C_IT_PECERR) || (IT == I2C_IT_OVR) || \
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                             (IT == I2C_IT_AF) || (IT == I2C_IT_ARLO) || \
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                             (IT == I2C_IT_BERR) || (IT == I2C_IT_STOPF) || \
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                             (IT == I2C_IT_ADD10) || (IT == I2C_IT_BTF) || \
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                             (IT == I2C_IT_ADDR) || (IT == I2C_IT_SB))
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142 
#define IS_I2C_GET_IT(IT) ((IT == I2C_IT_SMBALERT) || (IT == I2C_IT_TIMEOUT) || \
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                           (IT == I2C_IT_PECERR) || (IT == I2C_IT_OVR) || \
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                           (IT == I2C_IT_AF) || (IT == I2C_IT_ARLO) || \
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                           (IT == I2C_IT_BERR) || (IT == I2C_IT_TXE) || \
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                           (IT == I2C_IT_RXNE) || (IT == I2C_IT_STOPF) || \
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                           (IT == I2C_IT_ADD10) || (IT == I2C_IT_BTF) || \
148 
                           (IT == I2C_IT_ADDR) || (IT == I2C_IT_SB))
149 
 
150 
/* I2C flags definition */
151 
#define I2C_FLAG_DUALF                  ((u32)0x00800000)
152 
#define I2C_FLAG_SMBHOST                ((u32)0x00400000)
153 
#define I2C_FLAG_SMBDEFAULT             ((u32)0x00200000)
154 
#define I2C_FLAG_GENCALL                ((u32)0x00100000)
155 
#define I2C_FLAG_TRA                    ((u32)0x00040000)
156 
#define I2C_FLAG_BUSY                   ((u32)0x00020000)
157 
#define I2C_FLAG_MSL                    ((u32)0x00010000)
158 
#define I2C_FLAG_SMBALERT               ((u32)0x10008000)
159 
#define I2C_FLAG_TIMEOUT                ((u32)0x10004000)
160 
#define I2C_FLAG_PECERR                 ((u32)0x10001000)
161 
#define I2C_FLAG_OVR                    ((u32)0x10000800)
162 
#define I2C_FLAG_AF                     ((u32)0x10000400)
163 
#define I2C_FLAG_ARLO                   ((u32)0x10000200)
164 
#define I2C_FLAG_BERR                   ((u32)0x10000100)
165 
#define I2C_FLAG_TXE                    ((u32)0x00000080)
166 
#define I2C_FLAG_RXNE                   ((u32)0x00000040)
167 
#define I2C_FLAG_STOPF                  ((u32)0x60000010)
168 
#define I2C_FLAG_ADD10                  ((u32)0x20000008)
169 
#define I2C_FLAG_BTF                    ((u32)0x60000004)
170 
#define I2C_FLAG_ADDR                   ((u32)0xA0000002)
171 
#define I2C_FLAG_SB                     ((u32)0x20000001)
172 
 
173 
#define IS_I2C_CLEAR_FLAG(FLAG) ((FLAG == I2C_FLAG_SMBALERT) || (FLAG == I2C_FLAG_TIMEOUT) || \
174 
                                 (FLAG == I2C_FLAG_PECERR) || (FLAG == I2C_FLAG_OVR) || \
175 
                                 (FLAG == I2C_FLAG_AF) || (FLAG == I2C_FLAG_ARLO) || \
176 
                                 (FLAG == I2C_FLAG_BERR) || (FLAG == I2C_FLAG_STOPF) || \
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                                 (FLAG == I2C_FLAG_ADD10) || (FLAG == I2C_FLAG_BTF) || \
178 
                                 (FLAG == I2C_FLAG_ADDR) || (FLAG == I2C_FLAG_SB))
179 
 
180 
#define IS_I2C_GET_FLAG(FLAG) ((FLAG == I2C_FLAG_DUALF) || (FLAG == I2C_FLAG_SMBHOST) || \
181 
                               (FLAG == I2C_FLAG_SMBDEFAULT) || (FLAG == I2C_FLAG_GENCALL) || \
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                               (FLAG == I2C_FLAG_TRA) || (FLAG == I2C_FLAG_BUSY) || \
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                               (FLAG == I2C_FLAG_MSL) || (FLAG == I2C_FLAG_SMBALERT) || \
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                               (FLAG == I2C_FLAG_TIMEOUT) || (FLAG == I2C_FLAG_PECERR) || \
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                                                           (FLAG == I2C_FLAG_OVR) || (FLAG == I2C_FLAG_AF) || \
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                                                           (FLAG == I2C_FLAG_ARLO) || (FLAG == I2C_FLAG_BERR) || \
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                                                           (FLAG == I2C_FLAG_TXE) || (FLAG == I2C_FLAG_RXNE) || \
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                                                           (FLAG == I2C_FLAG_STOPF) || (FLAG == I2C_FLAG_ADD10) || \
189 
                                                           (FLAG == I2C_FLAG_BTF) || (FLAG == I2C_FLAG_ADDR) || \
190 
                                                           (FLAG == I2C_FLAG_SB))
191 
 
192 
/* I2C Events */
193 
/* EV1 */
194 
#define  I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((u32)0x00060082) /* TRA, BUSY, TXE and ADDR flags */
195 
#define  I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED  ((u32)0x00020002) /* BUSY and ADDR flags */
196 
#define  I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((u32)0x00860080)  /* DUALF, TRA, BUSY and TXE flags */
197 
#define  I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((u32)0x00820000)  /* DUALF and BUSY flags */
198 
#define  I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((u32)0x00120000)  /* GENCALL and BUSY flags */
199 
 
200 
/* EV2 */
201 
#define  I2C_EVENT_SLAVE_BYTE_RECEIVED  ((u32)0x00020040)  /* BUSY and RXNE flags */
202 
 
203 
/* EV3 */
204 
#define  I2C_EVENT_SLAVE_BYTE_TRANSMITTED  ((u32)0x00060084)  /* TRA, BUSY, TXE and BTF flags */
205 
 
206 
/* EV4 */
207 
#define  I2C_EVENT_SLAVE_STOP_DETECTED  ((u32)0x00000010)  /* STOPF flag */
208 
 
209 
/* EV5 */
210 
#define  I2C_EVENT_MASTER_MODE_SELECT  ((u32)0x00030001)  /* BUSY, MSL and SB flag */
211 
 
212 
/* EV6 */
213 
#define  I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED  ((u32)0x00070082)  /* BUSY, MSL, ADDR, TXE and TRA flags */
214 
#define  I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED  ((u32)0x00030002)  /* BUSY, MSL and ADDR flags */
215 
 
216 
/* EV7 */
217 
#define  I2C_EVENT_MASTER_BYTE_RECEIVED  ((u32)0x00030040)  /* BUSY, MSL and RXNE flags */
218 
 
219 
/* EV8 */
220 
#define  I2C_EVENT_MASTER_BYTE_TRANSMITTED  ((u32)0x00070084)  /* TRA, BUSY, MSL, TXE and BTF flags */
221 
 
222 
/* EV9 */
223 
#define  I2C_EVENT_MASTER_MODE_ADDRESS10  ((u32)0x00030008)  /* BUSY, MSL and ADD10 flags */
224 
 
225 
/* EV3_1 */
226 
#define  I2C_EVENT_SLAVE_ACK_FAILURE  ((u32)0x00000400)  /* AF flag */
227 
 
228 
#define IS_I2C_EVENT(EVENT) ((EVENT == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \
229 
                             (EVENT == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \
230 
                             (EVENT == I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED) || \
231 
                             (EVENT == I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED) || \
232 
                             (EVENT == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \
233 
                             (EVENT == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \
234 
                             (EVENT == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \
235 
                             (EVENT == I2C_EVENT_SLAVE_STOP_DETECTED) || \
236 
                             (EVENT == I2C_EVENT_MASTER_MODE_SELECT) || \
237 
                             (EVENT == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \
238 
                             (EVENT == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \
239 
                             (EVENT == I2C_EVENT_MASTER_BYTE_RECEIVED) || \
240 
                             (EVENT == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \
241 
                             (EVENT == I2C_EVENT_MASTER_MODE_ADDRESS10) || \
242 
                             (EVENT == I2C_EVENT_SLAVE_ACK_FAILURE))
243 
 
244 
/* I2C own address1 -----------------------------------------------------------*/
245 
#define IS_I2C_OWN_ADDRESS1(ADDRESS1) (ADDRESS1 <= 0x3FF)
246 
/* I2C clock speed ------------------------------------------------------------*/
247 
#define IS_I2C_CLOCK_SPEED(SPEED) ((SPEED >= 0x1) && (SPEED <= 400000))
248 
 
249 
/* Exported macro ------------------------------------------------------------*/
250 
/* Exported functions ------------------------------------------------------- */
251 
void I2C_DeInit(I2C_TypeDef* I2Cx);
252 
void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct);
253 
void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct);
254 
void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
255 
void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
256 
void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
257 
void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState);
258 
void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState);
259 
void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState);
260 
void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, u8 Address);
261 
void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
262 
void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
263 
void I2C_ITConfig(I2C_TypeDef* I2Cx, u16 I2C_IT, FunctionalState NewState);
264 
void I2C_SendData(I2C_TypeDef* I2Cx, u8 Data);
265 
u8 I2C_ReceiveData(I2C_TypeDef* I2Cx);
266 
void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, u8 Address, u8 I2C_Direction);
267 
u16 I2C_ReadRegister(I2C_TypeDef* I2Cx, u8 I2C_Register);
268 
void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
269 
void I2C_SMBusAlertConfig(I2C_TypeDef* I2Cx, u16 I2C_SMBusAlert);
270 
void I2C_TransmitPEC(I2C_TypeDef* I2Cx);
271 
void I2C_PECPositionConfig(I2C_TypeDef* I2Cx, u16 I2C_PECPosition);
272 
void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState);
273 
u8 I2C_GetPEC(I2C_TypeDef* I2Cx);
274 
void I2C_ARPCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
275 
void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState);
276 
void I2C_FastModeDutyCycleConfig(I2C_TypeDef* I2Cx, u16 I2C_DutyCycle);
277 
u32 I2C_GetLastEvent(I2C_TypeDef* I2Cx);
278 
ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx, u32 I2C_EVENT);
279 
FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, u32 I2C_FLAG);
280 
void I2C_ClearFlag(I2C_TypeDef* I2Cx, u32 I2C_FLAG);
281 
ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, u32 I2C_IT);
282 
void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, u32 I2C_IT);
283 
 
284 
#endif /*__STM32F10x_I2C_H */
285 
 
286 
/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/

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