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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [Common/] [drivers/] [ST/] [STM32F10xFWLib/] [inc/] [stm32f10x_spi.h] - Blame information for rev 608

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/**
  ******************************************************************************
  * @file  stm32f10x_spi.h
  * @author  MCD Application Team
  * @version  V3.0.0
  * @date  04/06/2009
  * @brief  This file contains all the functions prototypes for the SPI firmware
  *         library.
  ******************************************************************************
  * @copy
  *
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  *
  * <h2><center>&copy; COPYRIGHT 2009 STMicroelectronics</center></h2>
  */
 
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F10x_SPI_H
#define __STM32F10x_SPI_H
 
/* Includes ------------------------------------------------------------------*/
//#include "stm32f10x.h"
#include "stm32f10x_map.h"
 
#define uint16_t unsigned short
#define uint8_t unsigned char
#define uint32_t unsigned long
 
#define RCC_APB1Periph_SPI3     ((uint32_t)0x00008000)
#define SPI3_BASE                       (APB1PERIPH_BASE + 0x3C00)
#define SPI3                            ((SPI_TypeDef *) SPI3_BASE)
#define GPIO_Remap_SPI3         ( 1UL << 28UL )
/** @addtogroup StdPeriph_Driver
  * @{
  */
 
/** @addtogroup SPI
  * @{
  */
 
/** @defgroup SPI_Exported_Types
  * @{
  */
 
/**
  * @brief  SPI Init structure definition
  */
 
typedef struct
{
  uint16_t SPI_Direction;
  uint16_t SPI_Mode;
  uint16_t SPI_DataSize;
  uint16_t SPI_CPOL;
  uint16_t SPI_CPHA;
  uint16_t SPI_NSS;
  uint16_t SPI_BaudRatePrescaler;
  uint16_t SPI_FirstBit;
  uint16_t SPI_CRCPolynomial;
}SPI_InitTypeDef;
 
/**
  * @brief  I2S Init structure definition
  */
 
typedef struct
{
  uint16_t I2S_Mode;
  uint16_t I2S_Standard;
  uint16_t I2S_DataFormat;
  uint16_t I2S_MCLKOutput;
  uint16_t I2S_AudioFreq;
  uint16_t I2S_CPOL;
}I2S_InitTypeDef;
 
/**
  * @}
  */
 
/** @defgroup SPI_Exported_Constants
  * @{
  */
 
#define IS_SPI_ALL_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI1_BASE) || \
                                   ((*(uint32_t*)&(PERIPH)) == SPI2_BASE) || \
                                   ((*(uint32_t*)&(PERIPH)) == SPI3_BASE))
#define IS_SPI_23_PERIPH(PERIPH) (((*(uint32_t*)&(PERIPH)) == SPI2_BASE) || \
                                  ((*(uint32_t*)&(PERIPH)) == SPI3_BASE))
 
/** @defgroup SPI_data_direction_mode
  * @{
  */
 
#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)
#define SPI_Direction_2Lines_RxOnly     ((uint16_t)0x0400)
#define SPI_Direction_1Line_Rx          ((uint16_t)0x8000)
#define SPI_Direction_1Line_Tx          ((uint16_t)0xC000)
#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
                                     ((MODE) == SPI_Direction_2Lines_RxOnly) || \
                                     ((MODE) == SPI_Direction_1Line_Rx) || \
                                     ((MODE) == SPI_Direction_1Line_Tx))
/**
  * @}
  */
 
/** @defgroup SPI_master_slave_mode
  * @{
  */
 
#define SPI_Mode_Master                 ((uint16_t)0x0104)
#define SPI_Mode_Slave                  ((uint16_t)0x0000)
#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
                           ((MODE) == SPI_Mode_Slave))
/**
  * @}
  */
 
/** @defgroup SPI_data_size
  * @{
  */
 
#define SPI_DataSize_16b                ((uint16_t)0x0800)
#define SPI_DataSize_8b                 ((uint16_t)0x0000)
#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
                                   ((DATASIZE) == SPI_DataSize_8b))
/**
  * @}
  */
 
/** @defgroup SPI_Clock_Polarity
  * @{
  */
 
#define SPI_CPOL_Low                    ((uint16_t)0x0000)
#define SPI_CPOL_High                   ((uint16_t)0x0002)
#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
                           ((CPOL) == SPI_CPOL_High))
/**
  * @}
  */
 
/** @defgroup SPI_Clock_Phase
  * @{
  */
 
#define SPI_CPHA_1Edge                  ((uint16_t)0x0000)
#define SPI_CPHA_2Edge                  ((uint16_t)0x0001)
#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
                           ((CPHA) == SPI_CPHA_2Edge))
/**
  * @}
  */
 
/** @defgroup SPI_Slave_Select_management
  * @{
  */
 
#define SPI_NSS_Soft                    ((uint16_t)0x0200)
#define SPI_NSS_Hard                    ((uint16_t)0x0000)
#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
                         ((NSS) == SPI_NSS_Hard))
/**
  * @}
  */
 
/** @defgroup SPI_BaudRate_Prescaler_
  * @{
  */
 
#define SPI_BaudRatePrescaler_2         ((uint16_t)0x0000)
#define SPI_BaudRatePrescaler_4         ((uint16_t)0x0008)
#define SPI_BaudRatePrescaler_8         ((uint16_t)0x0010)
#define SPI_BaudRatePrescaler_16        ((uint16_t)0x0018)
#define SPI_BaudRatePrescaler_32        ((uint16_t)0x0020)
#define SPI_BaudRatePrescaler_64        ((uint16_t)0x0028)
#define SPI_BaudRatePrescaler_128       ((uint16_t)0x0030)
#define SPI_BaudRatePrescaler_256       ((uint16_t)0x0038)
#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_4) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_8) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_16) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_32) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_64) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_128) || \
                                              ((PRESCALER) == SPI_BaudRatePrescaler_256))
/**
  * @}
  */
 
/** @defgroup SPI_MSB_LSB_transmission
  * @{
  */
 
#define SPI_FirstBit_MSB                ((uint16_t)0x0000)
#define SPI_FirstBit_LSB                ((uint16_t)0x0080)
#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
                               ((BIT) == SPI_FirstBit_LSB))
/**
  * @}
  */
 
/** @defgroup I2S_Mode
  * @{
  */
 
#define I2S_Mode_SlaveTx                ((uint16_t)0x0000)
#define I2S_Mode_SlaveRx                ((uint16_t)0x0100)
#define I2S_Mode_MasterTx               ((uint16_t)0x0200)
#define I2S_Mode_MasterRx               ((uint16_t)0x0300)
#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
                           ((MODE) == I2S_Mode_SlaveRx) || \
                           ((MODE) == I2S_Mode_MasterTx) || \
                           ((MODE) == I2S_Mode_MasterRx) )
/**
  * @}
  */
 
/** @defgroup I2S_Standard
  * @{
  */
 
#define I2S_Standard_Phillips           ((uint16_t)0x0000)
#define I2S_Standard_MSB                ((uint16_t)0x0010)
#define I2S_Standard_LSB                ((uint16_t)0x0020)
#define I2S_Standard_PCMShort           ((uint16_t)0x0030)
#define I2S_Standard_PCMLong            ((uint16_t)0x00B0)
#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
                                   ((STANDARD) == I2S_Standard_MSB) || \
                                   ((STANDARD) == I2S_Standard_LSB) || \
                                   ((STANDARD) == I2S_Standard_PCMShort) || \
                                   ((STANDARD) == I2S_Standard_PCMLong))
/**
  * @}
  */
 
/** @defgroup I2S_Data_Format
  * @{
  */
 
#define I2S_DataFormat_16b              ((uint16_t)0x0000)
#define I2S_DataFormat_16bextended      ((uint16_t)0x0001)
#define I2S_DataFormat_24b              ((uint16_t)0x0003)
#define I2S_DataFormat_32b              ((uint16_t)0x0005)
#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
                                    ((FORMAT) == I2S_DataFormat_16bextended) || \
                                    ((FORMAT) == I2S_DataFormat_24b) || \
                                    ((FORMAT) == I2S_DataFormat_32b))
/**
  * @}
  */
 
/** @defgroup I2S_MCLK_Output
  * @{
  */
 
#define I2S_MCLKOutput_Enable           ((uint16_t)0x0200)
#define I2S_MCLKOutput_Disable          ((uint16_t)0x0000)
#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
                                    ((OUTPUT) == I2S_MCLKOutput_Disable))
/**
  * @}
  */
 
/** @defgroup I2S_Audio_Frequency
  * @{
  */
 
#define I2S_AudioFreq_48k                ((uint16_t)48000)
#define I2S_AudioFreq_44k                ((uint16_t)44100)
#define I2S_AudioFreq_22k                ((uint16_t)22050)
#define I2S_AudioFreq_16k                ((uint16_t)16000)
#define I2S_AudioFreq_8k                 ((uint16_t)8000)
#define I2S_AudioFreq_Default            ((uint16_t)2)
#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_48k) || \
                                 ((FREQ) == I2S_AudioFreq_44k) || \
                                 ((FREQ) == I2S_AudioFreq_22k) || \
                                 ((FREQ) == I2S_AudioFreq_16k) || \
                                 ((FREQ) == I2S_AudioFreq_8k)  || \
                                 ((FREQ) == I2S_AudioFreq_Default))
/**
  * @}
  */
 
/** @defgroup I2S_Clock_Polarity
  * @{
  */
 
#define I2S_CPOL_Low                    ((uint16_t)0x0000)
#define I2S_CPOL_High                   ((uint16_t)0x0008)
#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
                           ((CPOL) == I2S_CPOL_High))
/**
  * @}
  */
 
/** @defgroup SPI_I2S_DMA_transfer_requests
  * @{
  */
 
#define SPI_I2S_DMAReq_Tx               ((uint16_t)0x0002)
#define SPI_I2S_DMAReq_Rx               ((uint16_t)0x0001)
#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))
/**
  * @}
  */
 
/** @defgroup SPI_NSS_internal_software_mangement
  * @{
  */
 
#define SPI_NSSInternalSoft_Set         ((uint16_t)0x0100)
#define SPI_NSSInternalSoft_Reset       ((uint16_t)0xFEFF)
#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
                                       ((INTERNAL) == SPI_NSSInternalSoft_Reset))
/**
  * @}
  */
 
/** @defgroup SPI_CRC_Transmit_Receive
  * @{
  */
 
#define SPI_CRC_Tx                      ((uint8_t)0x00)
#define SPI_CRC_Rx                      ((uint8_t)0x01)
#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
/**
  * @}
  */
 
/** @defgroup SPI_direction_transmit_receive
  * @{
  */
 
#define SPI_Direction_Rx                ((uint16_t)0xBFFF)
#define SPI_Direction_Tx                ((uint16_t)0x4000)
#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
                                     ((DIRECTION) == SPI_Direction_Tx))
/**
  * @}
  */
 
/** @defgroup SPI_I2S_interrupts_definition
  * @{
  */
 
#define SPI_I2S_IT_TXE                  ((uint8_t)0x71)
#define SPI_I2S_IT_RXNE                 ((uint8_t)0x60)
#define SPI_I2S_IT_ERR                  ((uint8_t)0x50)
#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
                                 ((IT) == SPI_I2S_IT_RXNE) || \
                                 ((IT) == SPI_I2S_IT_ERR))
#define SPI_I2S_IT_OVR                  ((uint8_t)0x56)
#define SPI_IT_MODF                     ((uint8_t)0x55)
#define SPI_IT_CRCERR                   ((uint8_t)0x54)
#define I2S_IT_UDR                      ((uint8_t)0x53)
#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
                               ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \
                               ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR))
/**
  * @}
  */
 
/** @defgroup SPI_I2S_flags_definition
  * @{
  */
 
#define SPI_I2S_FLAG_RXNE               ((uint16_t)0x0001)
#define SPI_I2S_FLAG_TXE                ((uint16_t)0x0002)
#define I2S_FLAG_CHSIDE                 ((uint16_t)0x0004)
#define I2S_FLAG_UDR                    ((uint16_t)0x0008)
#define SPI_FLAG_CRCERR                 ((uint16_t)0x0010)
#define SPI_FLAG_MODF                   ((uint16_t)0x0020)
#define SPI_I2S_FLAG_OVR                ((uint16_t)0x0040)
#define SPI_I2S_FLAG_BSY                ((uint16_t)0x0080)
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
                                   ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \
                                   ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \
                                   ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE))
/**
  * @}
  */
 
/** @defgroup SPI_CRC_polynomial
  * @{
  */
 
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)
/**
  * @}
  */
 
/**
  * @}
  */
 
/** @defgroup SPI_Exported_Macros
  * @{
  */
 
/**
  * @}
  */
 
/** @defgroup SPI_Exported_Functions
  * @{
  */
 
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
 
#endif /*__STM32F10x_SPI_H */
/**
  * @}
  */
 
/**
  * @}
  */
 
/**
  * @}
  */
 
/******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/

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Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [Common/] [drivers/] [ST/] [STM32F10xFWLib/] [inc/] [stm32f10x_spi.h] - Blame information for rev 608

Line No.	Rev	Author	Line
1	608	jeremybenn	`/**`
2			`******************************************************************************`
3			`* @file stm32f10x_spi.h`
4			`* @author MCD Application Team`
5			`* @version V3.0.0`
6			`* @date 04/06/2009`
7			`* @brief This file contains all the functions prototypes for the SPI firmware`
8			`* library.`
9			`******************************************************************************`
10			`* @copy`
11			`*`
12			`* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS`
13			`* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE`
14			`* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY`
15			`* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING`
16			`* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE`
17			`* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.`
18			`*`
19			`* <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>`
20			`*/`
21
22			`/* Define to prevent recursive inclusion -------------------------------------*/`
23			`#ifndef __STM32F10x_SPI_H`
24			`#define __STM32F10x_SPI_H`
25
26			`/* Includes ------------------------------------------------------------------*/`
27			`//#include "stm32f10x.h"`
28			`#include "stm32f10x_map.h"`
29
30			`#define uint16_t unsigned short`
31			`#define uint8_t unsigned char`
32			`#define uint32_t unsigned long`
33
34			`#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)`
35			`#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00)`
36			`#define SPI3 ((SPI_TypeDef *) SPI3_BASE)`
37			`#define GPIO_Remap_SPI3 ( 1UL << 28UL )`
38			`/** @addtogroup StdPeriph_Driver`
39			`* @{`
40			`*/`
41
42			`/** @addtogroup SPI`
43			`* @{`
44			`*/`
45
46			`/** @defgroup SPI_Exported_Types`
47			`* @{`
48			`*/`
49
50			`/**`
51			`* @brief SPI Init structure definition`
52			`*/`
53
54			`typedef struct`
55			`{`
56			`uint16_t SPI_Direction;`
57			`uint16_t SPI_Mode;`
58			`uint16_t SPI_DataSize;`
59			`uint16_t SPI_CPOL;`
60			`uint16_t SPI_CPHA;`
61			`uint16_t SPI_NSS;`
62			`uint16_t SPI_BaudRatePrescaler;`
63			`uint16_t SPI_FirstBit;`
64			`uint16_t SPI_CRCPolynomial;`
65			`}SPI_InitTypeDef;`
66
67			`/**`
68			`* @brief I2S Init structure definition`
69			`*/`
70
71			`typedef struct`
72			`{`
73			`uint16_t I2S_Mode;`
74			`uint16_t I2S_Standard;`
75			`uint16_t I2S_DataFormat;`
76			`uint16_t I2S_MCLKOutput;`
77			`uint16_t I2S_AudioFreq;`
78			`uint16_t I2S_CPOL;`
79			`}I2S_InitTypeDef;`
80
81			`/**`
82			`* @}`
83			`*/`
84
85			`/** @defgroup SPI_Exported_Constants`
86			`* @{`
87			`*/`
88
89			`#define IS_SPI_ALL_PERIPH(PERIPH) ((((uint32_t)&(PERIPH)) == SPI1_BASE) \|\| \`
90			`(((uint32_t)&(PERIPH)) == SPI2_BASE) \|\| \`
91			`(((uint32_t)&(PERIPH)) == SPI3_BASE))`
92			`#define IS_SPI_23_PERIPH(PERIPH) ((((uint32_t)&(PERIPH)) == SPI2_BASE) \|\| \`
93			`(((uint32_t)&(PERIPH)) == SPI3_BASE))`
94
95			`/** @defgroup SPI_data_direction_mode`
96			`* @{`
97			`*/`
98
99			`#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000)`
100			`#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400)`
101			`#define SPI_Direction_1Line_Rx ((uint16_t)0x8000)`
102			`#define SPI_Direction_1Line_Tx ((uint16_t)0xC000)`
103			`#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) \|\| \`
104			`((MODE) == SPI_Direction_2Lines_RxOnly) \|\| \`
105			`((MODE) == SPI_Direction_1Line_Rx) \|\| \`
106			`((MODE) == SPI_Direction_1Line_Tx))`
107			`/**`
108			`* @}`
109			`*/`
110
111			`/** @defgroup SPI_master_slave_mode`
112			`* @{`
113			`*/`
114
115			`#define SPI_Mode_Master ((uint16_t)0x0104)`
116			`#define SPI_Mode_Slave ((uint16_t)0x0000)`
117			`#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) \|\| \`
118			`((MODE) == SPI_Mode_Slave))`
119			`/**`
120			`* @}`
121			`*/`
122
123			`/** @defgroup SPI_data_size`
124			`* @{`
125			`*/`
126
127			`#define SPI_DataSize_16b ((uint16_t)0x0800)`
128			`#define SPI_DataSize_8b ((uint16_t)0x0000)`
129			`#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) \|\| \`
130			`((DATASIZE) == SPI_DataSize_8b))`
131			`/**`
132			`* @}`
133			`*/`
134
135			`/** @defgroup SPI_Clock_Polarity`
136			`* @{`
137			`*/`
138
139			`#define SPI_CPOL_Low ((uint16_t)0x0000)`
140			`#define SPI_CPOL_High ((uint16_t)0x0002)`
141			`#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) \|\| \`
142			`((CPOL) == SPI_CPOL_High))`
143			`/**`
144			`* @}`
145			`*/`
146
147			`/** @defgroup SPI_Clock_Phase`
148			`* @{`
149			`*/`
150
151			`#define SPI_CPHA_1Edge ((uint16_t)0x0000)`
152			`#define SPI_CPHA_2Edge ((uint16_t)0x0001)`
153			`#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) \|\| \`
154			`((CPHA) == SPI_CPHA_2Edge))`
155			`/**`
156			`* @}`
157			`*/`
158
159			`/** @defgroup SPI_Slave_Select_management`
160			`* @{`
161			`*/`
162
163			`#define SPI_NSS_Soft ((uint16_t)0x0200)`
164			`#define SPI_NSS_Hard ((uint16_t)0x0000)`
165			`#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) \|\| \`
166			`((NSS) == SPI_NSS_Hard))`
167			`/**`
168			`* @}`
169			`*/`
170
171			`/** @defgroup SPI_BaudRate_Prescaler_`
172			`* @{`
173			`*/`
174
175			`#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000)`
176			`#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008)`
177			`#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010)`
178			`#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018)`
179			`#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020)`
180			`#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028)`
181			`#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030)`
182			`#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038)`
183			`#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) \|\| \`
184			`((PRESCALER) == SPI_BaudRatePrescaler_4) \|\| \`
185			`((PRESCALER) == SPI_BaudRatePrescaler_8) \|\| \`
186			`((PRESCALER) == SPI_BaudRatePrescaler_16) \|\| \`
187			`((PRESCALER) == SPI_BaudRatePrescaler_32) \|\| \`
188			`((PRESCALER) == SPI_BaudRatePrescaler_64) \|\| \`
189			`((PRESCALER) == SPI_BaudRatePrescaler_128) \|\| \`
190			`((PRESCALER) == SPI_BaudRatePrescaler_256))`
191			`/**`
192			`* @}`
193			`*/`
194
195			`/** @defgroup SPI_MSB_LSB_transmission`
196			`* @{`
197			`*/`
198
199			`#define SPI_FirstBit_MSB ((uint16_t)0x0000)`
200			`#define SPI_FirstBit_LSB ((uint16_t)0x0080)`
201			`#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) \|\| \`
202			`((BIT) == SPI_FirstBit_LSB))`
203			`/**`
204			`* @}`
205			`*/`
206
207			`/** @defgroup I2S_Mode`
208			`* @{`
209			`*/`
210
211			`#define I2S_Mode_SlaveTx ((uint16_t)0x0000)`
212			`#define I2S_Mode_SlaveRx ((uint16_t)0x0100)`
213			`#define I2S_Mode_MasterTx ((uint16_t)0x0200)`
214			`#define I2S_Mode_MasterRx ((uint16_t)0x0300)`
215			`#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) \|\| \`
216			`((MODE) == I2S_Mode_SlaveRx) \|\| \`
217			`((MODE) == I2S_Mode_MasterTx) \|\| \`
218			`((MODE) == I2S_Mode_MasterRx) )`
219			`/**`
220			`* @}`
221			`*/`
222
223			`/** @defgroup I2S_Standard`
224			`* @{`
225			`*/`
226
227			`#define I2S_Standard_Phillips ((uint16_t)0x0000)`
228			`#define I2S_Standard_MSB ((uint16_t)0x0010)`
229			`#define I2S_Standard_LSB ((uint16_t)0x0020)`
230			`#define I2S_Standard_PCMShort ((uint16_t)0x0030)`
231			`#define I2S_Standard_PCMLong ((uint16_t)0x00B0)`
232			`#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) \|\| \`
233			`((STANDARD) == I2S_Standard_MSB) \|\| \`
234			`((STANDARD) == I2S_Standard_LSB) \|\| \`
235			`((STANDARD) == I2S_Standard_PCMShort) \|\| \`
236			`((STANDARD) == I2S_Standard_PCMLong))`
237			`/**`
238			`* @}`
239			`*/`
240
241			`/** @defgroup I2S_Data_Format`
242			`* @{`
243			`*/`
244
245			`#define I2S_DataFormat_16b ((uint16_t)0x0000)`
246			`#define I2S_DataFormat_16bextended ((uint16_t)0x0001)`
247			`#define I2S_DataFormat_24b ((uint16_t)0x0003)`
248			`#define I2S_DataFormat_32b ((uint16_t)0x0005)`
249			`#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) \|\| \`
250			`((FORMAT) == I2S_DataFormat_16bextended) \|\| \`
251			`((FORMAT) == I2S_DataFormat_24b) \|\| \`
252			`((FORMAT) == I2S_DataFormat_32b))`
253			`/**`
254			`* @}`
255			`*/`
256
257			`/** @defgroup I2S_MCLK_Output`
258			`* @{`
259			`*/`
260
261			`#define I2S_MCLKOutput_Enable ((uint16_t)0x0200)`
262			`#define I2S_MCLKOutput_Disable ((uint16_t)0x0000)`
263			`#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) \|\| \`
264			`((OUTPUT) == I2S_MCLKOutput_Disable))`
265			`/**`
266			`* @}`
267			`*/`
268
269			`/** @defgroup I2S_Audio_Frequency`
270			`* @{`
271			`*/`
272
273			`#define I2S_AudioFreq_48k ((uint16_t)48000)`
274			`#define I2S_AudioFreq_44k ((uint16_t)44100)`
275			`#define I2S_AudioFreq_22k ((uint16_t)22050)`
276			`#define I2S_AudioFreq_16k ((uint16_t)16000)`
277			`#define I2S_AudioFreq_8k ((uint16_t)8000)`
278			`#define I2S_AudioFreq_Default ((uint16_t)2)`
279			`#define IS_I2S_AUDIO_FREQ(FREQ) (((FREQ) == I2S_AudioFreq_48k) \|\| \`
280			`((FREQ) == I2S_AudioFreq_44k) \|\| \`
281			`((FREQ) == I2S_AudioFreq_22k) \|\| \`
282			`((FREQ) == I2S_AudioFreq_16k) \|\| \`
283			`((FREQ) == I2S_AudioFreq_8k) \|\| \`
284			`((FREQ) == I2S_AudioFreq_Default))`
285			`/**`
286			`* @}`
287			`*/`
288
289			`/** @defgroup I2S_Clock_Polarity`
290			`* @{`
291			`*/`
292
293			`#define I2S_CPOL_Low ((uint16_t)0x0000)`
294			`#define I2S_CPOL_High ((uint16_t)0x0008)`
295			`#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) \|\| \`
296			`((CPOL) == I2S_CPOL_High))`
297			`/**`
298			`* @}`
299			`*/`
300
301			`/** @defgroup SPI_I2S_DMA_transfer_requests`
302			`* @{`
303			`*/`
304
305			`#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002)`
306			`#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001)`
307			`#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00))`
308			`/**`
309			`* @}`
310			`*/`
311
312			`/** @defgroup SPI_NSS_internal_software_mangement`
313			`* @{`
314			`*/`
315
316			`#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100)`
317			`#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF)`
318			`#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) \|\| \`
319			`((INTERNAL) == SPI_NSSInternalSoft_Reset))`
320			`/**`
321			`* @}`
322			`*/`
323
324			`/** @defgroup SPI_CRC_Transmit_Receive`
325			`* @{`
326			`*/`
327
328			`#define SPI_CRC_Tx ((uint8_t)0x00)`
329			`#define SPI_CRC_Rx ((uint8_t)0x01)`
330			`#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) \|\| ((CRC) == SPI_CRC_Rx))`
331			`/**`
332			`* @}`
333			`*/`
334
335			`/** @defgroup SPI_direction_transmit_receive`
336			`* @{`
337			`*/`
338
339			`#define SPI_Direction_Rx ((uint16_t)0xBFFF)`
340			`#define SPI_Direction_Tx ((uint16_t)0x4000)`
341			`#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) \|\| \`
342			`((DIRECTION) == SPI_Direction_Tx))`
343			`/**`
344			`* @}`
345			`*/`
346
347			`/** @defgroup SPI_I2S_interrupts_definition`
348			`* @{`
349			`*/`
350
351			`#define SPI_I2S_IT_TXE ((uint8_t)0x71)`
352			`#define SPI_I2S_IT_RXNE ((uint8_t)0x60)`
353			`#define SPI_I2S_IT_ERR ((uint8_t)0x50)`
354			`#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) \|\| \`
355			`((IT) == SPI_I2S_IT_RXNE) \|\| \`
356			`((IT) == SPI_I2S_IT_ERR))`
357			`#define SPI_I2S_IT_OVR ((uint8_t)0x56)`
358			`#define SPI_IT_MODF ((uint8_t)0x55)`
359			`#define SPI_IT_CRCERR ((uint8_t)0x54)`
360			`#define I2S_IT_UDR ((uint8_t)0x53)`
361			`#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))`
362			`#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) \|\| ((IT) == SPI_I2S_IT_TXE) \|\| \`
363			`((IT) == I2S_IT_UDR) \|\| ((IT) == SPI_IT_CRCERR) \|\| \`
364			`((IT) == SPI_IT_MODF) \|\| ((IT) == SPI_I2S_IT_OVR))`
365			`/**`
366			`* @}`
367			`*/`
368
369			`/** @defgroup SPI_I2S_flags_definition`
370			`* @{`
371			`*/`
372
373			`#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001)`
374			`#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002)`
375			`#define I2S_FLAG_CHSIDE ((uint16_t)0x0004)`
376			`#define I2S_FLAG_UDR ((uint16_t)0x0008)`
377			`#define SPI_FLAG_CRCERR ((uint16_t)0x0010)`
378			`#define SPI_FLAG_MODF ((uint16_t)0x0020)`
379			`#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040)`
380			`#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080)`
381			`#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))`
382			`#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) \|\| ((FLAG) == SPI_I2S_FLAG_OVR) \|\| \`
383			`((FLAG) == SPI_FLAG_MODF) \|\| ((FLAG) == SPI_FLAG_CRCERR) \|\| \`
384			`((FLAG) == I2S_FLAG_UDR) \|\| ((FLAG) == I2S_FLAG_CHSIDE) \|\| \`
385			`((FLAG) == SPI_I2S_FLAG_TXE) \|\| ((FLAG) == SPI_I2S_FLAG_RXNE))`
386			`/**`
387			`* @}`
388			`*/`
389
390			`/** @defgroup SPI_CRC_polynomial`
391			`* @{`
392			`*/`
393
394			`#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1)`
395			`/**`
396			`* @}`
397			`*/`
398
399			`/**`
400			`* @}`
401			`*/`
402
403			`/** @defgroup SPI_Exported_Macros`
404			`* @{`
405			`*/`
406
407			`/**`
408			`* @}`
409			`*/`
410
411			`/** @defgroup SPI_Exported_Functions`
412			`* @{`
413			`*/`
414
415			`void SPI_I2S_DeInit(SPI_TypeDef* SPIx);`
416			`void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);`
417			`void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);`
418			`void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);`
419			`void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);`
420			`void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);`
421			`void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);`
422			`void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);`
423			`void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);`
424			`void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);`
425			`uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);`
426			`void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);`
427			`void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);`
428			`void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);`
429			`void SPI_TransmitCRC(SPI_TypeDef* SPIx);`
430			`void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);`
431			`uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC);`
432			`uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx);`
433			`void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);`
434			`FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);`
435			`void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);`
436			`ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);`
437			`void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);`
438
439			`#endif /__STM32F10x_SPI_H /`
440			`/**`
441			`* @}`
442			`*/`
443
444			`/**`
445			`* @}`
446			`*/`
447
448			`/**`
449			`* @}`
450			`*/`
451
452			`/***************** (C) COPYRIGHT 2009 STMicroelectronics *END OF FILE**/`