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jeremybenn |
/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
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* File Name : stm32f10x_adc.c
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* Author : MCD Application Team
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* Date First Issued : 09/29/2006
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* Description : This file provides all the ADC firmware functions.
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********************************************************************************
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* History:
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* 04/02/2007: V0.2
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* 02/05/2007: V0.1
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* 09/29/2006: V0.01
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********************************************************************************
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_adc.h"
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#include "stm32f10x_rcc.h"
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* ADC ADON mask */
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#define CR2_ADON_Set ((u32)0x00000001)
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#define CR2_ADON_Reset ((u32)0xFFFFFFFE)
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/* ADC DMA mask */
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#define CR2_DMA_Set ((u16)0x0100)
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#define CR2_DMA_Reset ((u16)0xFEFF)
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/* ADC RSTCAL mask */
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#define CR2_RSTCAL_Set ((u16)0x0008)
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/* ADC CAL mask */
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#define CR2_CAL_Set ((u16)0x0004)
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/* ADC SWSTRT mask */
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#define CR2_SWSTRT_Set ((u32)0x00400000)
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/* ADC DISCNUM mask */
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#define CR1_DISCNUM_Reset ((u32)0xFFFF1FFF)
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/* ADC DISCEN mask */
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#define CR1_DISCEN_Set ((u32)0x00000800)
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#define CR1_DISCEN_Reset ((u32)0xFFFFF7FF)
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/* ADC EXTTRIG mask */
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#define CR2_EXTTRIG_Set ((u32)0x00100000)
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#define CR2_EXTTRIG_Reset ((u32)0xFFEFFFFF)
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/* ADC Software start mask */
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#define CR2_EXTTRIG_SWSTRT_Set ((u32)0x00500000)
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#define CR2_EXTTRIG_SWSTRT_Reset ((u32)0xFFAFFFFF)
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/* ADC JAUTO mask */
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#define CR1_JAUTO_Set ((u32)0x00000400)
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#define CR1_JAUTO_Reset ((u32)0xFFFFFBFF)
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/* ADC JDISCEN mask */
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#define CR1_JDISCEN_Set ((u32)0x00001000)
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#define CR1_JDISCEN_Reset ((u32)0xFFFFEFFF)
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/* ADC JEXTSEL mask */
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#define CR2_JEXTSEL_Reset ((u32)0xFFFF8FFF)
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/* ADC JEXTTRIG mask */
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#define CR2_JEXTTRIG_Set ((u32)0x00008000)
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#define CR2_JEXTTRIG_Reset ((u32)0xFFFF7FFF)
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/* ADC JSWSTRT mask */
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#define CR2_JSWSTRT_Set ((u32)0x00200000)
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/* ADC injected software start mask */
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#define CR2_JEXTTRIG_JSWSTRT_Set ((u32)0x00208000)
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#define CR2_JEXTTRIG_JSWSTRT_Reset ((u32)0xFFDF7FFF)
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/* ADC AWDCH mask */
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#define CR1_AWDCH_Reset ((u32)0xFFFFFFE0)
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/* ADC SQx mask */
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#define SQR3_SQ_Set ((u8)0x1F)
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#define SQR2_SQ_Set ((u8)0x1F)
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#define SQR1_SQ_Set ((u8)0x1F)
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/* ADC JSQx mask */
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#define JSQR_JSQ_Set ((u8)0x1F)
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/* ADC JL mask */
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#define JSQR_JL_Reset ((u32)0xFFCFFFFF)
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/* ADC SMPx mask */
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#define SMPR1_SMP_Set ((u8)0x07)
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#define SMPR2_SMP_Set ((u8)0x07)
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/* ADC Analog watchdog enable mode mask */
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#define CR1_AWDMode_Reset ((u32)0xFF3FFDFF)
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/* ADC TSPD mask */
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#define CR2_TSPD_Set ((u32)0x00800000)
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#define CR2_TSPD_Reset ((u32)0xFF7FFFFF)
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/* ADC JDRx registers= offset */
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#define JDR_Offset ((u8)0x28)
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/* ADC registers Masks */
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#define CR1_CLEAR_Mask ((u32)0xFFF0FEFF)
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#define CR2_CLEAR_Mask ((u32)0xFFF1F7FD)
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#define SQR1_CLEAR_Mask ((u32)0xFF0FFFFF)
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/*******************************************************************************
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* Function Name : ADC_DeInit
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* Description : Deinitializes the ADCx peripheral registers to their default
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* reset values.
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* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
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* Output : None
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* Return : None
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*******************************************************************************/
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void ADC_DeInit(ADC_TypeDef* ADCx)
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{
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switch (*(u32*)&ADCx)
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{
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case ADC1_BASE:
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/* Enable ADC1 reset state */
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
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/* Release ADC1 from reset state */
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
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break;
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case ADC2_BASE:
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/* Enable ADC2 reset state */
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
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/* Release ADC2 from reset state */
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
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break;
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default:
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break;
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}
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}
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/*******************************************************************************
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* Function Name : ADC_Init
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* Description : Initializes the ADCx according to the specified parameters
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* in the ADC_InitStruct.
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* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
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* - ADC_InitStruct: pointer to a ADC_InitTypeDef structure that
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* contains the configuration information for the specified
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* ADC peripheral.
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* Output : None
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* Return : None
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******************************************************************************/
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void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
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{
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u32 tmpreg1 = 0;
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u8 tmpreg2 = 0;
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/* Check the parameters */
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assert(IS_ADC_MODE(ADC_InitStruct->ADC_Mode));
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assert(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
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assert(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
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assert(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));
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assert(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
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assert(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel));
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/*---------------------------- ADCx CR1 Configuration -----------------*/
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/* Get the ADCx CR1 value */
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tmpreg1 = ADCx->CR1;
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/* Clear DUALMODE and SCAN bits */
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tmpreg1 &= CR1_CLEAR_Mask;
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/* Configure ADCx: Dual mode and scan conversion mode */
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/* Set DUALMODE bits according to ADC_Mode value */
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/* Set SCAN bit according to ADC_ScanConvMode value */
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tmpreg1 |= (u32)(ADC_InitStruct->ADC_Mode | ((u32)ADC_InitStruct->ADC_ScanConvMode << 8));
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/* Write to ADCx CR1 */
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ADCx->CR1 = tmpreg1;
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/*---------------------------- ADCx CR2 Configuration -----------------*/
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/* Get the ADCx CR2 value */
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tmpreg1 = ADCx->CR2;
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/* Clear CONT, ALIGN and EXTTRIG bits */
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tmpreg1 &= CR2_CLEAR_Mask;
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/* Configure ADCx: external trigger event and continuous conversion mode */
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/* Set ALIGN bit according to ADC_DataAlign value */
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/* Set EXTTRIG bits according to ADC_ExternalTrigConv value */
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/* Set CONT bit according to ADC_ContinuousConvMode value */
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tmpreg1 |= (u32)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv |
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((u32)ADC_InitStruct->ADC_ContinuousConvMode << 1));
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/* Write to ADCx CR2 */
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ADCx->CR2 = tmpreg1;
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/*---------------------------- ADCx SQR1 Configuration -----------------*/
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/* Get the ADCx SQR1 value */
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tmpreg1 = ADCx->SQR1;
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/* Clear L bits */
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tmpreg1 &= SQR1_CLEAR_Mask;
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/* Configure ADCx: regular channel sequence length */
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/* Set L bits according to ADC_NbrOfChannel value */
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tmpreg2 |= (ADC_InitStruct->ADC_NbrOfChannel - 1);
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tmpreg1 |= ((u32)tmpreg2 << 20);
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/* Write to ADCx SQR1 */
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ADCx->SQR1 = tmpreg1;
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}
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/*******************************************************************************
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* Function Name : ADC_StructInit
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* Description : Fills each ADC_InitStruct member with its default value.
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* Input : ADC_InitStruct : pointer to a ADC_InitTypeDef structure
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* which will be initialized.
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* Output : None
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* Return : None
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*******************************************************************************/
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void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
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{
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/* Reset ADC init structure parameters values */
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/* Initialize the ADC_Mode member */
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ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
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/* initialize the ADC_ScanConvMode member */
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ADC_InitStruct->ADC_ScanConvMode = DISABLE;
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/* Initialize the ADC_ContinuousConvMode member */
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ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
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/* Initialize the ADC_ExternalTrigConv member */
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ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
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/* Initialize the ADC_DataAlign member */
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ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
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/* Initialize the ADC_NbrOfChannel member */
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ADC_InitStruct->ADC_NbrOfChannel = 1;
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}
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/*******************************************************************************
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* Function Name : ADC_Cmd
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* Description : Enables or disables the specified ADC peripheral.
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* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
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* - NewState: new state of the ADCx peripheral. This parameter
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* can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
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{
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/* Check the parameters */
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assert(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Set the ADON bit to wake up the ADC from power down mode */
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ADCx->CR2 |= CR2_ADON_Set;
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}
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else
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{
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/* Disable the selected ADC peripheral */
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ADCx->CR2 &= CR2_ADON_Reset;
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}
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}
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/*******************************************************************************
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* Function Name : ADC_DMACmd
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* Description : Enables or disables the specified ADC DMA request.
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* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
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* - NewState: new state of the selected ADC DMA transfer.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
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{
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/* Check the parameters */
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assert(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the selected ADC DMA request */
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ADCx->CR2 |= CR2_DMA_Set;
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}
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else
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{
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| 289 |
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/* Disable the selected ADC DMA request */
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ADCx->CR2 &= CR2_DMA_Reset;
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}
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| 292 |
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}
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| 293 |
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| 294 |
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/*******************************************************************************
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| 295 |
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* Function Name : ADC_ITConfig
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| 296 |
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* Description : Enables or disables the specified ADC interrupts.
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* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
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* - ADC_IT: specifies the ADC interrupts sources to be enabled
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* or disabled.
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* This parameter can be any combination of the following values:
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* - ADC_IT_EOC: End of conversion interrupt mask
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* - ADC_IT_AWD: Analog watchdog interrupt mask
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* - ADC_IT_JEOC: End of injected conversion interrupt mask
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* - NewState: new state of the specified ADC interrupts.
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* This parameter can be: ENABLE or DISABLE.
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* Output : None
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* Return : None
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*******************************************************************************/
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| 309 |
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void ADC_ITConfig(ADC_TypeDef* ADCx, u16 ADC_IT, FunctionalState NewState)
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| 310 |
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{
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| 311 |
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u8 itmask = 0;
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| 313 |
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/* Check the parameters */
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assert(IS_FUNCTIONAL_STATE(NewState));
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assert(IS_ADC_IT(ADC_IT));
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/* Get the ADC IT index */
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itmask = (u8)ADC_IT;
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| 320 |
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if (NewState != DISABLE)
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{
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| 322 |
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/* Enable the selected ADC interrupts */
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ADCx->CR1 |= itmask;
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}
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| 325 |
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else
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| 326 |
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{
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|
|
/* Disable the selected ADC interrupts */
|
| 328 |
|
|
ADCx->CR1 &= (~(u32)itmask);
|
| 329 |
|
|
}
|
| 330 |
|
|
}
|
| 331 |
|
|
|
| 332 |
|
|
/*******************************************************************************
|
| 333 |
|
|
* Function Name : ADC_ResetCalibration
|
| 334 |
|
|
* Description : Resets the ADC calibration registers.
|
| 335 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 336 |
|
|
* Output : None
|
| 337 |
|
|
* Return : None
|
| 338 |
|
|
*******************************************************************************/
|
| 339 |
|
|
void ADC_ResetCalibration(ADC_TypeDef* ADCx)
|
| 340 |
|
|
{
|
| 341 |
|
|
/* Resets the selected ADC calibartion registers */
|
| 342 |
|
|
ADCx->CR2 |= CR2_RSTCAL_Set;
|
| 343 |
|
|
}
|
| 344 |
|
|
|
| 345 |
|
|
/*******************************************************************************
|
| 346 |
|
|
* Function Name : ADC_GetResetCalibrationStatus
|
| 347 |
|
|
* Description : Gets the ADC reset calibration registers status.
|
| 348 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 349 |
|
|
* Output : None
|
| 350 |
|
|
* Return : The new state of ADC Reset Calibration registers (SET or RESET).
|
| 351 |
|
|
*******************************************************************************/
|
| 352 |
|
|
FlagStatus ADC_GetResetCalibrationStatus(ADC_TypeDef* ADCx)
|
| 353 |
|
|
{
|
| 354 |
|
|
FlagStatus bitstatus = RESET;
|
| 355 |
|
|
|
| 356 |
|
|
/* Check the status of RSTCAL bit */
|
| 357 |
|
|
if ((ADCx->CR2 & CR2_RSTCAL_Set) != (u16)RESET)
|
| 358 |
|
|
{
|
| 359 |
|
|
/* RSTCAL bit is set */
|
| 360 |
|
|
bitstatus = SET;
|
| 361 |
|
|
}
|
| 362 |
|
|
else
|
| 363 |
|
|
{
|
| 364 |
|
|
/* RSTCAL bit is reset */
|
| 365 |
|
|
bitstatus = RESET;
|
| 366 |
|
|
}
|
| 367 |
|
|
/* Return the RSTCAL bit status */
|
| 368 |
|
|
return bitstatus;
|
| 369 |
|
|
}
|
| 370 |
|
|
|
| 371 |
|
|
/*******************************************************************************
|
| 372 |
|
|
* Function Name : ADC_StartCalibration
|
| 373 |
|
|
* Description : Starts the calibration process.
|
| 374 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 375 |
|
|
* Output : None
|
| 376 |
|
|
* Return : None
|
| 377 |
|
|
*******************************************************************************/
|
| 378 |
|
|
void ADC_StartCalibration(ADC_TypeDef* ADCx)
|
| 379 |
|
|
{
|
| 380 |
|
|
/* Enable the selected ADC calibration process */
|
| 381 |
|
|
ADCx->CR2 |= CR2_CAL_Set;
|
| 382 |
|
|
}
|
| 383 |
|
|
|
| 384 |
|
|
/*******************************************************************************
|
| 385 |
|
|
* Function Name : ADC_GetCalibrationStatus
|
| 386 |
|
|
* Description : Gets the ADC calibration status.
|
| 387 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 388 |
|
|
* Output : None
|
| 389 |
|
|
* Return : The new state of ADC calibration (SET or RESET).
|
| 390 |
|
|
*******************************************************************************/
|
| 391 |
|
|
FlagStatus ADC_GetCalibrationStatus(ADC_TypeDef* ADCx)
|
| 392 |
|
|
{
|
| 393 |
|
|
FlagStatus bitstatus = RESET;
|
| 394 |
|
|
|
| 395 |
|
|
/* Check the status of CAL bit */
|
| 396 |
|
|
if ((ADCx->CR2 & CR2_CAL_Set) != (u16)RESET)
|
| 397 |
|
|
{
|
| 398 |
|
|
/* CAL bit is set: calibration on going */
|
| 399 |
|
|
bitstatus = SET;
|
| 400 |
|
|
}
|
| 401 |
|
|
else
|
| 402 |
|
|
{
|
| 403 |
|
|
/* CAL bit is reset: end of calibration */
|
| 404 |
|
|
bitstatus = RESET;
|
| 405 |
|
|
}
|
| 406 |
|
|
/* Return the CAL bit status */
|
| 407 |
|
|
return bitstatus;
|
| 408 |
|
|
}
|
| 409 |
|
|
|
| 410 |
|
|
/*******************************************************************************
|
| 411 |
|
|
* Function Name : ADC_SoftwareStartConvCmd
|
| 412 |
|
|
* Description : Enables or disables the ADC software start conversion .
|
| 413 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 414 |
|
|
* - NewState: new state of the selected ADC software start conversion.
|
| 415 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
| 416 |
|
|
* Output : None
|
| 417 |
|
|
* Return : None
|
| 418 |
|
|
*******************************************************************************/
|
| 419 |
|
|
void ADC_SoftwareStartConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
| 420 |
|
|
{
|
| 421 |
|
|
/* Check the parameters */
|
| 422 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
| 423 |
|
|
|
| 424 |
|
|
if (NewState != DISABLE)
|
| 425 |
|
|
{
|
| 426 |
|
|
/* Enable the selected ADC conversion on external event */
|
| 427 |
|
|
/* Starts the selected ADC conversion */
|
| 428 |
|
|
ADCx->CR2 |= CR2_EXTTRIG_SWSTRT_Set;
|
| 429 |
|
|
}
|
| 430 |
|
|
else
|
| 431 |
|
|
{
|
| 432 |
|
|
/* Stops the selected ADC conversion */
|
| 433 |
|
|
/* Disable the selected ADC conversion on external event */
|
| 434 |
|
|
ADCx->CR2 &= CR2_EXTTRIG_SWSTRT_Reset;
|
| 435 |
|
|
}
|
| 436 |
|
|
}
|
| 437 |
|
|
|
| 438 |
|
|
/*******************************************************************************
|
| 439 |
|
|
* Function Name : ADC_GetSoftwareStartConvStatus
|
| 440 |
|
|
* Description : Gets the ADC Software start conversion Status.
|
| 441 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 442 |
|
|
* Output : None
|
| 443 |
|
|
* Return : The new state of ADC software start conversion (SET or RESET).
|
| 444 |
|
|
*******************************************************************************/
|
| 445 |
|
|
FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx)
|
| 446 |
|
|
{
|
| 447 |
|
|
FlagStatus bitstatus = RESET;
|
| 448 |
|
|
|
| 449 |
|
|
/* Check the status of SWSTRT bit */
|
| 450 |
|
|
if ((ADCx->CR2 & CR2_SWSTRT_Set) != (u32)RESET)
|
| 451 |
|
|
{
|
| 452 |
|
|
/* SWSTRT bit is set */
|
| 453 |
|
|
bitstatus = SET;
|
| 454 |
|
|
}
|
| 455 |
|
|
else
|
| 456 |
|
|
{
|
| 457 |
|
|
/* SWSTRT bit is reset */
|
| 458 |
|
|
bitstatus = RESET;
|
| 459 |
|
|
}
|
| 460 |
|
|
/* Return the SWSTRT bit status */
|
| 461 |
|
|
return bitstatus;
|
| 462 |
|
|
}
|
| 463 |
|
|
|
| 464 |
|
|
/*******************************************************************************
|
| 465 |
|
|
* Function Name : ADC_DiscModeChannelCountConfig
|
| 466 |
|
|
* Description : Configures the discontinuous mode for the selected ADC regular
|
| 467 |
|
|
* group channel.
|
| 468 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 469 |
|
|
* - Number: specifies the discontinuous mode regular channel
|
| 470 |
|
|
* count value. This mumber must be between 1 and 8.
|
| 471 |
|
|
* Output : None
|
| 472 |
|
|
* Return : None
|
| 473 |
|
|
*******************************************************************************/
|
| 474 |
|
|
void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, u8 Number)
|
| 475 |
|
|
{
|
| 476 |
|
|
u32 tmpreg1 = 0;
|
| 477 |
|
|
u8 tmpreg2 = 0;
|
| 478 |
|
|
|
| 479 |
|
|
/* Check the parameters */
|
| 480 |
|
|
assert(IS_ADC_REGULAR_DISC_NUMBER(Number));
|
| 481 |
|
|
|
| 482 |
|
|
/* Get the old register value */
|
| 483 |
|
|
tmpreg1 = ADCx->CR1;
|
| 484 |
|
|
/* Clear the old discontinuous mode channel count */
|
| 485 |
|
|
tmpreg1 &= CR1_DISCNUM_Reset;
|
| 486 |
|
|
/* Set the discontinuous mode channel count */
|
| 487 |
|
|
tmpreg2 = Number - 1;
|
| 488 |
|
|
tmpreg1 |= ((u32)tmpreg2 << 13);
|
| 489 |
|
|
/* Store the new register value */
|
| 490 |
|
|
ADCx->CR1 = tmpreg1;
|
| 491 |
|
|
}
|
| 492 |
|
|
|
| 493 |
|
|
/*******************************************************************************
|
| 494 |
|
|
* Function Name : ADC_DiscModeCmd
|
| 495 |
|
|
* Description : Enables or disables the discontinuous mode on regular group
|
| 496 |
|
|
* channel for the specified ADC
|
| 497 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 498 |
|
|
* - NewState: new state of the selected ADC discontinuous mode
|
| 499 |
|
|
* on regular group channel.
|
| 500 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
| 501 |
|
|
* Output : None
|
| 502 |
|
|
* Return : None
|
| 503 |
|
|
*******************************************************************************/
|
| 504 |
|
|
void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
| 505 |
|
|
{
|
| 506 |
|
|
/* Check the parameters */
|
| 507 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
| 508 |
|
|
|
| 509 |
|
|
if (NewState != DISABLE)
|
| 510 |
|
|
{
|
| 511 |
|
|
/* Enable the selected ADC regular discontinuous mode */
|
| 512 |
|
|
ADCx->CR1 |= CR1_DISCEN_Set;
|
| 513 |
|
|
}
|
| 514 |
|
|
else
|
| 515 |
|
|
{
|
| 516 |
|
|
/* Disable the selected ADC regular discontinuous mode */
|
| 517 |
|
|
ADCx->CR1 &= CR1_DISCEN_Reset;
|
| 518 |
|
|
}
|
| 519 |
|
|
}
|
| 520 |
|
|
|
| 521 |
|
|
/*******************************************************************************
|
| 522 |
|
|
* Function Name : ADC_RegularChannelConfig
|
| 523 |
|
|
* Description : Configures for the selected ADC regular channel its corresponding
|
| 524 |
|
|
* rank in the sequencer and its sample time.
|
| 525 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 526 |
|
|
* - ADC_Channel: the ADC channel to configure.
|
| 527 |
|
|
* This parameter can be one of the following values:
|
| 528 |
|
|
* - ADC_Channel_0: ADC Channel0 selected
|
| 529 |
|
|
* - ADC_Channel_1: ADC Channel1 selected
|
| 530 |
|
|
* - ADC_Channel_2: ADC Channel2 selected
|
| 531 |
|
|
* - ADC_Channel_3: ADC Channel3 selected
|
| 532 |
|
|
* - ADC_Channel_4: ADC Channel4 selected
|
| 533 |
|
|
* - ADC_Channel_5: ADC Channel5 selected
|
| 534 |
|
|
* - ADC_Channel_6: ADC Channel6 selected
|
| 535 |
|
|
* - ADC_Channel_7: ADC Channel7 selected
|
| 536 |
|
|
* - ADC_Channel_8: ADC Channel8 selected
|
| 537 |
|
|
* - ADC_Channel_9: ADC Channel9 selected
|
| 538 |
|
|
* - ADC_Channel_10: ADC Channel10 selected
|
| 539 |
|
|
* - ADC_Channel_11: ADC Channel11 selected
|
| 540 |
|
|
* - ADC_Channel_12: ADC Channel12 selected
|
| 541 |
|
|
* - ADC_Channel_13: ADC Channel13 selected
|
| 542 |
|
|
* - ADC_Channel_14: ADC Channel14 selected
|
| 543 |
|
|
* - ADC_Channel_15: ADC Channel15 selected
|
| 544 |
|
|
* - ADC_Channel_16: ADC Channel16 selected
|
| 545 |
|
|
* - ADC_Channel_17: ADC Channel17 selected
|
| 546 |
|
|
* - Rank: The rank in the regular group sequencer. This parameter
|
| 547 |
|
|
* must be between 1 to 16.
|
| 548 |
|
|
* - ADC_SampleTime: The sample time value to be set for the
|
| 549 |
|
|
* selected channel.
|
| 550 |
|
|
* This parameter can be one of the following values:
|
| 551 |
|
|
* - ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
|
| 552 |
|
|
* - ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
|
| 553 |
|
|
* - ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
|
| 554 |
|
|
* - ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles
|
| 555 |
|
|
* - ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles
|
| 556 |
|
|
* - ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles
|
| 557 |
|
|
* - ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles
|
| 558 |
|
|
* - ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles
|
| 559 |
|
|
* Output : None
|
| 560 |
|
|
* Return : None
|
| 561 |
|
|
*******************************************************************************/
|
| 562 |
|
|
void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel, u8 Rank, u8 ADC_SampleTime)
|
| 563 |
|
|
{
|
| 564 |
|
|
u32 tmpreg1 = 0, tmpreg2 = 0;
|
| 565 |
|
|
|
| 566 |
|
|
/* Check the parameters */
|
| 567 |
|
|
assert(IS_ADC_CHANNEL(ADC_Channel));
|
| 568 |
|
|
assert(IS_ADC_REGULAR_RANK(Rank));
|
| 569 |
|
|
assert(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
|
| 570 |
|
|
|
| 571 |
|
|
/* if ADC_Channel_10 ... ADC_Channel_17 is selected */
|
| 572 |
|
|
if (ADC_Channel > ADC_Channel_9)
|
| 573 |
|
|
{
|
| 574 |
|
|
/* Get the old register value */
|
| 575 |
|
|
tmpreg1 = ADCx->SMPR1;
|
| 576 |
|
|
/* Calculate the mask to clear */
|
| 577 |
|
|
tmpreg2 = (u32)SMPR1_SMP_Set << (3 * (ADC_Channel - 10));
|
| 578 |
|
|
/* Clear the old discontinuous mode channel count */
|
| 579 |
|
|
tmpreg1 &= ~tmpreg2;
|
| 580 |
|
|
/* Calculate the mask to set */
|
| 581 |
|
|
tmpreg2 = (u32)ADC_SampleTime << (3 * (ADC_Channel - 10));
|
| 582 |
|
|
/* Set the discontinuous mode channel count */
|
| 583 |
|
|
tmpreg1 |= tmpreg2;
|
| 584 |
|
|
/* Store the new register value */
|
| 585 |
|
|
ADCx->SMPR1 = tmpreg1;
|
| 586 |
|
|
}
|
| 587 |
|
|
else /* ADC_Channel include in ADC_Channel_[0..9] */
|
| 588 |
|
|
{
|
| 589 |
|
|
/* Get the old register value */
|
| 590 |
|
|
tmpreg1 = ADCx->SMPR2;
|
| 591 |
|
|
/* Calculate the mask to clear */
|
| 592 |
|
|
tmpreg2 = (u32)SMPR2_SMP_Set << (3 * ADC_Channel);
|
| 593 |
|
|
/* Clear the old discontinuous mode channel count */
|
| 594 |
|
|
tmpreg1 &= ~tmpreg2;
|
| 595 |
|
|
/* Calculate the mask to set */
|
| 596 |
|
|
tmpreg2 = (u32)ADC_SampleTime << (3 * ADC_Channel);
|
| 597 |
|
|
/* Set the discontinuous mode channel count */
|
| 598 |
|
|
tmpreg1 |= tmpreg2;
|
| 599 |
|
|
/* Store the new register value */
|
| 600 |
|
|
ADCx->SMPR2 = tmpreg1;
|
| 601 |
|
|
}
|
| 602 |
|
|
/* For Rank 1 to 6 */
|
| 603 |
|
|
if (Rank < 7)
|
| 604 |
|
|
{
|
| 605 |
|
|
/* Get the old register value */
|
| 606 |
|
|
tmpreg1 = ADCx->SQR3;
|
| 607 |
|
|
/* Calculate the mask to clear */
|
| 608 |
|
|
tmpreg2 = (u32)SQR3_SQ_Set << (5 * (Rank - 1));
|
| 609 |
|
|
/* Clear the old SQx bits for the selected rank */
|
| 610 |
|
|
tmpreg1 &= ~tmpreg2;
|
| 611 |
|
|
/* Calculate the mask to set */
|
| 612 |
|
|
tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 1));
|
| 613 |
|
|
/* Set the SQx bits for the selected rank */
|
| 614 |
|
|
tmpreg1 |= tmpreg2;
|
| 615 |
|
|
/* Store the new register value */
|
| 616 |
|
|
ADCx->SQR3 = tmpreg1;
|
| 617 |
|
|
}
|
| 618 |
|
|
/* For Rank 7 to 12 */
|
| 619 |
|
|
else if (Rank < 13)
|
| 620 |
|
|
{
|
| 621 |
|
|
/* Get the old register value */
|
| 622 |
|
|
tmpreg1 = ADCx->SQR2;
|
| 623 |
|
|
/* Calculate the mask to clear */
|
| 624 |
|
|
tmpreg2 = (u32)SQR2_SQ_Set << (5 * (Rank - 7));
|
| 625 |
|
|
/* Clear the old SQx bits for the selected rank */
|
| 626 |
|
|
tmpreg1 &= ~tmpreg2;
|
| 627 |
|
|
/* Calculate the mask to set */
|
| 628 |
|
|
tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 7));
|
| 629 |
|
|
/* Set the SQx bits for the selected rank */
|
| 630 |
|
|
tmpreg1 |= tmpreg2;
|
| 631 |
|
|
/* Store the new register value */
|
| 632 |
|
|
ADCx->SQR2 = tmpreg1;
|
| 633 |
|
|
}
|
| 634 |
|
|
/* For Rank 13 to 16 */
|
| 635 |
|
|
else
|
| 636 |
|
|
{
|
| 637 |
|
|
/* Get the old register value */
|
| 638 |
|
|
tmpreg1 = ADCx->SQR1;
|
| 639 |
|
|
/* Calculate the mask to clear */
|
| 640 |
|
|
tmpreg2 = (u32)SQR1_SQ_Set << (5 * (Rank - 13));
|
| 641 |
|
|
/* Clear the old SQx bits for the selected rank */
|
| 642 |
|
|
tmpreg1 &= ~tmpreg2;
|
| 643 |
|
|
/* Calculate the mask to set */
|
| 644 |
|
|
tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 13));
|
| 645 |
|
|
/* Set the SQx bits for the selected rank */
|
| 646 |
|
|
tmpreg1 |= tmpreg2;
|
| 647 |
|
|
/* Store the new register value */
|
| 648 |
|
|
ADCx->SQR1 = tmpreg1;
|
| 649 |
|
|
}
|
| 650 |
|
|
}
|
| 651 |
|
|
|
| 652 |
|
|
/*******************************************************************************
|
| 653 |
|
|
* Function Name : ADC_ExternalTrigConvCmd
|
| 654 |
|
|
* Description : Enables or disables the ADCx conversion through external trigger.
|
| 655 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 656 |
|
|
* - NewState: new state of the selected ADC external trigger
|
| 657 |
|
|
* start of conversion.
|
| 658 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
| 659 |
|
|
* Output : None
|
| 660 |
|
|
* Return : None
|
| 661 |
|
|
*******************************************************************************/
|
| 662 |
|
|
void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
| 663 |
|
|
{
|
| 664 |
|
|
/* Check the parameters */
|
| 665 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
| 666 |
|
|
|
| 667 |
|
|
if (NewState != DISABLE)
|
| 668 |
|
|
{
|
| 669 |
|
|
/* Enable the selected ADC conversion on external event */
|
| 670 |
|
|
ADCx->CR2 |= CR2_EXTTRIG_Set;
|
| 671 |
|
|
}
|
| 672 |
|
|
else
|
| 673 |
|
|
{
|
| 674 |
|
|
/* Disable the selected ADC conversion on external event */
|
| 675 |
|
|
ADCx->CR2 &= CR2_EXTTRIG_Reset;
|
| 676 |
|
|
}
|
| 677 |
|
|
}
|
| 678 |
|
|
|
| 679 |
|
|
/*******************************************************************************
|
| 680 |
|
|
* Function Name : ADC_GetConversionValue
|
| 681 |
|
|
* Description : Returns the last ADC conversion result data for regular channel.
|
| 682 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 683 |
|
|
* Output : None
|
| 684 |
|
|
* Return : The Data conversion value.
|
| 685 |
|
|
*******************************************************************************/
|
| 686 |
|
|
u16 ADC_GetConversionValue(ADC_TypeDef* ADCx)
|
| 687 |
|
|
{
|
| 688 |
|
|
/* Return the selected ADC conversion value */
|
| 689 |
|
|
return (u16) ADCx->DR;
|
| 690 |
|
|
}
|
| 691 |
|
|
|
| 692 |
|
|
/*******************************************************************************
|
| 693 |
|
|
* Function Name : ADC_GetDualModeConversionValue
|
| 694 |
|
|
* Description : Returns the last ADCs conversion result data in dual mode.
|
| 695 |
|
|
* Output : None
|
| 696 |
|
|
* Return : The Data conversion value.
|
| 697 |
|
|
*******************************************************************************/
|
| 698 |
|
|
u32 ADC_GetDualModeConversionValue(void)
|
| 699 |
|
|
{
|
| 700 |
|
|
/* Return the dual mode conversion value */
|
| 701 |
|
|
return ADC1->DR;
|
| 702 |
|
|
}
|
| 703 |
|
|
|
| 704 |
|
|
/*******************************************************************************
|
| 705 |
|
|
* Function Name : ADC_AutoInjectedConvCmd
|
| 706 |
|
|
* Description : Enables or disables the automatic injected group conversion
|
| 707 |
|
|
* after regular one.
|
| 708 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 709 |
|
|
* - NewState: new state of the selected ADC auto injected
|
| 710 |
|
|
* conversion
|
| 711 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
| 712 |
|
|
* Output : None
|
| 713 |
|
|
* Return : None
|
| 714 |
|
|
*******************************************************************************/
|
| 715 |
|
|
void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
| 716 |
|
|
{
|
| 717 |
|
|
/* Check the parameters */
|
| 718 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
| 719 |
|
|
|
| 720 |
|
|
if (NewState != DISABLE)
|
| 721 |
|
|
{
|
| 722 |
|
|
/* Enable the selected ADC automatic injected group conversion */
|
| 723 |
|
|
ADCx->CR1 |= CR1_JAUTO_Set;
|
| 724 |
|
|
}
|
| 725 |
|
|
else
|
| 726 |
|
|
{
|
| 727 |
|
|
/* Disable the selected ADC automatic injected group conversion */
|
| 728 |
|
|
ADCx->CR1 &= CR1_JAUTO_Reset;
|
| 729 |
|
|
}
|
| 730 |
|
|
}
|
| 731 |
|
|
|
| 732 |
|
|
/*******************************************************************************
|
| 733 |
|
|
* Function Name : ADC_InjectedDiscModeCmd
|
| 734 |
|
|
* Description : Enables or disables the discontinuous mode for injected group
|
| 735 |
|
|
* channel for the specified ADC
|
| 736 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 737 |
|
|
* - NewState: new state of the selected ADC discontinuous mode
|
| 738 |
|
|
* on injected group channel.
|
| 739 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
| 740 |
|
|
* Output : None
|
| 741 |
|
|
* Return : None
|
| 742 |
|
|
*******************************************************************************/
|
| 743 |
|
|
void ADC_InjectedDiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
| 744 |
|
|
{
|
| 745 |
|
|
/* Check the parameters */
|
| 746 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
| 747 |
|
|
|
| 748 |
|
|
if (NewState != DISABLE)
|
| 749 |
|
|
{
|
| 750 |
|
|
/* Enable the selected ADC injected discontinuous mode */
|
| 751 |
|
|
ADCx->CR1 |= CR1_JDISCEN_Set;
|
| 752 |
|
|
}
|
| 753 |
|
|
else
|
| 754 |
|
|
{
|
| 755 |
|
|
/* Disable the selected ADC injected discontinuous mode */
|
| 756 |
|
|
ADCx->CR1 &= CR1_JDISCEN_Reset;
|
| 757 |
|
|
}
|
| 758 |
|
|
}
|
| 759 |
|
|
|
| 760 |
|
|
/*******************************************************************************
|
| 761 |
|
|
* Function Name : ADC_ExternalTrigInjectedConvConfig
|
| 762 |
|
|
* Description : Configures the external trigger for injected channels conversion.
|
| 763 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 764 |
|
|
* - ADC_ExternalTrigInjecConv: specifies the ADC trigger to
|
| 765 |
|
|
* start injected conversion.
|
| 766 |
|
|
* This parameter can be one of the following values:
|
| 767 |
|
|
* - ADC_ExternalTrigInjecConv_T1_TRGO: Timer1 TRGO event
|
| 768 |
|
|
* selected
|
| 769 |
|
|
* - ADC_ExternalTrigInjecConv_T1_CC4: Timer1 capture
|
| 770 |
|
|
* compare4 selected
|
| 771 |
|
|
* - ADC_ExternalTrigInjecConv_T2_TRGO: Timer2 TRGO event
|
| 772 |
|
|
* selected
|
| 773 |
|
|
* - ADC_ExternalTrigInjecConv_T2_CC1: Timer2 capture
|
| 774 |
|
|
* compare1 selected
|
| 775 |
|
|
* - ADC_ExternalTrigInjecConv_T3_CC4: Timer3 capture
|
| 776 |
|
|
* compare4 selected
|
| 777 |
|
|
* - ADC_ExternalTrigInjecConv_T4_TRGO: Timer4 TRGO event
|
| 778 |
|
|
* selected
|
| 779 |
|
|
* - ADC_ExternalTrigInjecConv_Ext_Interrupt15: External
|
| 780 |
|
|
* interrupt 15 event selected
|
| 781 |
|
|
* - ADC_ExternalTrigInjecConv_None: Injected conversion
|
| 782 |
|
|
* started by software and not by external trigger
|
| 783 |
|
|
* Output : None
|
| 784 |
|
|
* Return : None
|
| 785 |
|
|
*******************************************************************************/
|
| 786 |
|
|
void ADC_ExternalTrigInjectedConvConfig(ADC_TypeDef* ADCx, u32 ADC_ExternalTrigInjecConv)
|
| 787 |
|
|
{
|
| 788 |
|
|
u32 tmpreg = 0;
|
| 789 |
|
|
|
| 790 |
|
|
/* Check the parameters */
|
| 791 |
|
|
assert(IS_ADC_EXT_INJEC_TRIG(ADC_ExternalTrigInjecConv));
|
| 792 |
|
|
|
| 793 |
|
|
/* Get the old register value */
|
| 794 |
|
|
tmpreg = ADCx->CR2;
|
| 795 |
|
|
/* Clear the old external event selection for injected group */
|
| 796 |
|
|
tmpreg &= CR2_JEXTSEL_Reset;
|
| 797 |
|
|
/* Set the external event selection for injected group */
|
| 798 |
|
|
tmpreg |= ADC_ExternalTrigInjecConv;
|
| 799 |
|
|
/* Store the new register value */
|
| 800 |
|
|
ADCx->CR2 = tmpreg;
|
| 801 |
|
|
}
|
| 802 |
|
|
|
| 803 |
|
|
/*******************************************************************************
|
| 804 |
|
|
* Function Name : ADC_ExternalTrigInjectedConvCmd
|
| 805 |
|
|
* Description : Enables or disables the ADCx injected channels conversion
|
| 806 |
|
|
* through external trigger
|
| 807 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 808 |
|
|
* - NewState: new state of the selected ADC external trigger
|
| 809 |
|
|
* start of injected conversion.
|
| 810 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
| 811 |
|
|
* Output : None
|
| 812 |
|
|
* Return : None
|
| 813 |
|
|
*******************************************************************************/
|
| 814 |
|
|
void ADC_ExternalTrigInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
| 815 |
|
|
{
|
| 816 |
|
|
/* Check the parameters */
|
| 817 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
| 818 |
|
|
|
| 819 |
|
|
if (NewState != DISABLE)
|
| 820 |
|
|
{
|
| 821 |
|
|
/* Enable the selected ADC external event selection for injected group */
|
| 822 |
|
|
ADCx->CR2 |= CR2_JEXTTRIG_Set;
|
| 823 |
|
|
}
|
| 824 |
|
|
else
|
| 825 |
|
|
{
|
| 826 |
|
|
/* Disable the selected ADC external event selection for injected group */
|
| 827 |
|
|
ADCx->CR2 &= CR2_JEXTTRIG_Reset;
|
| 828 |
|
|
}
|
| 829 |
|
|
}
|
| 830 |
|
|
|
| 831 |
|
|
/*******************************************************************************
|
| 832 |
|
|
* Function Name : ADC_SoftwareStartInjectedConvCmd
|
| 833 |
|
|
* Description : Enables or disables the start of the injected channels conversion.
|
| 834 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 835 |
|
|
* - NewState: new state of the selected ADC software start
|
| 836 |
|
|
* injected conversion.
|
| 837 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
| 838 |
|
|
* Output : None
|
| 839 |
|
|
* Return : None
|
| 840 |
|
|
*******************************************************************************/
|
| 841 |
|
|
void ADC_SoftwareStartInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
|
| 842 |
|
|
{
|
| 843 |
|
|
/* Check the parameters */
|
| 844 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
| 845 |
|
|
|
| 846 |
|
|
if (NewState != DISABLE)
|
| 847 |
|
|
{
|
| 848 |
|
|
/* Enable the selected ADC external event selection for injected group */
|
| 849 |
|
|
/* Starts the selected ADC injected conversion */
|
| 850 |
|
|
ADCx->CR2 |= CR2_JEXTTRIG_JSWSTRT_Set;
|
| 851 |
|
|
}
|
| 852 |
|
|
else
|
| 853 |
|
|
{
|
| 854 |
|
|
/* Stops the selected ADC injected conversion */
|
| 855 |
|
|
/* Disable the selected ADC external event selection for injected group */
|
| 856 |
|
|
ADCx->CR2 &= CR2_JEXTTRIG_JSWSTRT_Reset;
|
| 857 |
|
|
}
|
| 858 |
|
|
}
|
| 859 |
|
|
|
| 860 |
|
|
/*******************************************************************************
|
| 861 |
|
|
* Function Name : ADC_GetSoftwareStartInjectedConvCmdStatus
|
| 862 |
|
|
* Description : Gets the ADC Software start injected conversion Status.
|
| 863 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 864 |
|
|
* Output : None
|
| 865 |
|
|
* Return : The new state of ADC software start injected conversion (SET or RESET).
|
| 866 |
|
|
*******************************************************************************/
|
| 867 |
|
|
FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef* ADCx)
|
| 868 |
|
|
{
|
| 869 |
|
|
FlagStatus bitstatus = RESET;
|
| 870 |
|
|
|
| 871 |
|
|
/* Check the status of JSWSTRT bit */
|
| 872 |
|
|
if ((ADCx->CR2 & CR2_JSWSTRT_Set) != (u32)RESET)
|
| 873 |
|
|
{
|
| 874 |
|
|
/* JSWSTRT bit is set */
|
| 875 |
|
|
bitstatus = SET;
|
| 876 |
|
|
}
|
| 877 |
|
|
else
|
| 878 |
|
|
{
|
| 879 |
|
|
/* JSWSTRT bit is reset */
|
| 880 |
|
|
bitstatus = RESET;
|
| 881 |
|
|
}
|
| 882 |
|
|
/* Return the JSWSTRT bit status */
|
| 883 |
|
|
return bitstatus;
|
| 884 |
|
|
}
|
| 885 |
|
|
|
| 886 |
|
|
/*******************************************************************************
|
| 887 |
|
|
* Function Name : ADC_InjectedChannelConfig
|
| 888 |
|
|
* Description : Configures for the selected ADC injected channel its corresponding
|
| 889 |
|
|
* rank in the sequencer and its sample time.
|
| 890 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 891 |
|
|
* - ADC_Channel: the ADC channel to configure.
|
| 892 |
|
|
* This parameter can be one of the following values:
|
| 893 |
|
|
* - ADC_Channel_0: ADC Channel0 selected
|
| 894 |
|
|
* - ADC_Channel_1: ADC Channel1 selected
|
| 895 |
|
|
* - ADC_Channel_2: ADC Channel2 selected
|
| 896 |
|
|
* - ADC_Channel_3: ADC Channel3 selected
|
| 897 |
|
|
* - ADC_Channel_4: ADC Channel4 selected
|
| 898 |
|
|
* - ADC_Channel_5: ADC Channel5 selected
|
| 899 |
|
|
* - ADC_Channel_6: ADC Channel6 selected
|
| 900 |
|
|
* - ADC_Channel_7: ADC Channel7 selected
|
| 901 |
|
|
* - ADC_Channel_8: ADC Channel8 selected
|
| 902 |
|
|
* - ADC_Channel_9: ADC Channel9 selected
|
| 903 |
|
|
* - ADC_Channel_10: ADC Channel10 selected
|
| 904 |
|
|
* - ADC_Channel_11: ADC Channel11 selected
|
| 905 |
|
|
* - ADC_Channel_12: ADC Channel12 selected
|
| 906 |
|
|
* - ADC_Channel_13: ADC Channel13 selected
|
| 907 |
|
|
* - ADC_Channel_14: ADC Channel14 selected
|
| 908 |
|
|
* - ADC_Channel_15: ADC Channel15 selected
|
| 909 |
|
|
* - ADC_Channel_16: ADC Channel16 selected
|
| 910 |
|
|
* - ADC_Channel_17: ADC Channel17 selected
|
| 911 |
|
|
* - Rank: The rank in the injected group sequencer. This parameter
|
| 912 |
|
|
* must be between 1 to 4.
|
| 913 |
|
|
* - ADC_SampleTime: The sample time value to be set for the
|
| 914 |
|
|
* selected channel.
|
| 915 |
|
|
* This parameter can be one of the following values:
|
| 916 |
|
|
* - ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
|
| 917 |
|
|
* - ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
|
| 918 |
|
|
* - ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
|
| 919 |
|
|
* - ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles
|
| 920 |
|
|
* - ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles
|
| 921 |
|
|
* - ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles
|
| 922 |
|
|
* - ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles
|
| 923 |
|
|
* - ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles
|
| 924 |
|
|
* Output : None
|
| 925 |
|
|
* Return : None
|
| 926 |
|
|
*******************************************************************************/
|
| 927 |
|
|
void ADC_InjectedChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel, u8 Rank, u8 ADC_SampleTime)
|
| 928 |
|
|
{
|
| 929 |
|
|
u32 tmpreg1 = 0, tmpreg2 = 0;
|
| 930 |
|
|
u8 tmpreg3 = 0;
|
| 931 |
|
|
|
| 932 |
|
|
/* Check the parameters */
|
| 933 |
|
|
assert(IS_ADC_CHANNEL(ADC_Channel));
|
| 934 |
|
|
assert(IS_ADC_INJECTED_RANK(Rank));
|
| 935 |
|
|
assert(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
|
| 936 |
|
|
|
| 937 |
|
|
/* if ADC_Channel_10 ... ADC_Channel_17 is selected */
|
| 938 |
|
|
if (ADC_Channel > ADC_Channel_9)
|
| 939 |
|
|
{
|
| 940 |
|
|
/* Get the old register value */
|
| 941 |
|
|
tmpreg1 = ADCx->SMPR1;
|
| 942 |
|
|
/* Calculate the mask to clear */
|
| 943 |
|
|
tmpreg2 = (u32)SMPR1_SMP_Set << (3*(ADC_Channel - 10));
|
| 944 |
|
|
/* Clear the old discontinuous mode channel count */
|
| 945 |
|
|
tmpreg1 &= ~tmpreg2;
|
| 946 |
|
|
/* Calculate the mask to set */
|
| 947 |
|
|
tmpreg2 = (u32)ADC_SampleTime << (3*(ADC_Channel - 10));
|
| 948 |
|
|
/* Set the discontinuous mode channel count */
|
| 949 |
|
|
tmpreg1 |= tmpreg2;
|
| 950 |
|
|
/* Store the new register value */
|
| 951 |
|
|
ADCx->SMPR1 = tmpreg1;
|
| 952 |
|
|
}
|
| 953 |
|
|
else /* ADC_Channel include in ADC_Channel_[0..9] */
|
| 954 |
|
|
{
|
| 955 |
|
|
/* Get the old register value */
|
| 956 |
|
|
tmpreg1 = ADCx->SMPR2;
|
| 957 |
|
|
/* Calculate the mask to clear */
|
| 958 |
|
|
tmpreg2 = (u32)SMPR2_SMP_Set << (3 * ADC_Channel);
|
| 959 |
|
|
/* Clear the old discontinuous mode channel count */
|
| 960 |
|
|
tmpreg1 &= ~tmpreg2;
|
| 961 |
|
|
/* Calculate the mask to set */
|
| 962 |
|
|
tmpreg2 = (u32)ADC_SampleTime << (3 * ADC_Channel);
|
| 963 |
|
|
/* Set the discontinuous mode channel count */
|
| 964 |
|
|
tmpreg1 |= tmpreg2;
|
| 965 |
|
|
/* Store the new register value */
|
| 966 |
|
|
ADCx->SMPR2 = tmpreg1;
|
| 967 |
|
|
}
|
| 968 |
|
|
|
| 969 |
|
|
/* Rank configuration */
|
| 970 |
|
|
/* Get the old register value */
|
| 971 |
|
|
tmpreg1 = ADCx->JSQR;
|
| 972 |
|
|
/* Get JL value: Number = JL+1 */
|
| 973 |
|
|
tmpreg3 = (u8)((tmpreg1 & (u32)~JSQR_JL_Reset)>> 20);
|
| 974 |
|
|
/* Calculate the mask to clear: ((Rank-1)+(4-JL-1)) */
|
| 975 |
|
|
tmpreg2 = (u32)JSQR_JSQ_Set << (5 * ((Rank + 3) - (tmpreg3 + 1)));
|
| 976 |
|
|
/* Clear the old JSQx bits for the selected rank */
|
| 977 |
|
|
tmpreg1 &= ~tmpreg2;
|
| 978 |
|
|
/* Calculate the mask to set: ((Rank-1)+(4-JL-1)) */
|
| 979 |
|
|
tmpreg2 = (u32)ADC_Channel << (5 * ((Rank + 3) - (tmpreg3 + 1)));
|
| 980 |
|
|
/* Set the JSQx bits for the selected rank */
|
| 981 |
|
|
tmpreg1 |= tmpreg2;
|
| 982 |
|
|
/* Store the new register value */
|
| 983 |
|
|
ADCx->JSQR = tmpreg1;
|
| 984 |
|
|
}
|
| 985 |
|
|
|
| 986 |
|
|
/*******************************************************************************
|
| 987 |
|
|
* Function Name : ADC_InjectedSequencerLengthConfig
|
| 988 |
|
|
* Description : Configures the sequencer for injected channels
|
| 989 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 990 |
|
|
* - Length: The sequencer length.
|
| 991 |
|
|
* This parameter must be a number between 1 to 4.
|
| 992 |
|
|
* Output : None
|
| 993 |
|
|
* Return : None
|
| 994 |
|
|
*******************************************************************************/
|
| 995 |
|
|
void ADC_InjectedSequencerLengthConfig(ADC_TypeDef* ADCx, u8 Length)
|
| 996 |
|
|
{
|
| 997 |
|
|
u32 tmpreg1 = 0;
|
| 998 |
|
|
u8 tmpreg2 = 0;
|
| 999 |
|
|
|
| 1000 |
|
|
/* Check the parameters */
|
| 1001 |
|
|
assert(IS_ADC_INJECTED_LENGTH(Length));
|
| 1002 |
|
|
|
| 1003 |
|
|
/* Get the old register value */
|
| 1004 |
|
|
tmpreg1 = ADCx->JSQR;
|
| 1005 |
|
|
/* Clear the old injected sequnence lenght JL bits */
|
| 1006 |
|
|
tmpreg1 &= JSQR_JL_Reset;
|
| 1007 |
|
|
/* Set the injected sequnence lenght JL bits */
|
| 1008 |
|
|
tmpreg2 = Length - 1;
|
| 1009 |
|
|
tmpreg1 |= (u32)tmpreg2 << 20;
|
| 1010 |
|
|
/* Store the new register value */
|
| 1011 |
|
|
ADCx->JSQR = tmpreg1;
|
| 1012 |
|
|
}
|
| 1013 |
|
|
|
| 1014 |
|
|
/*******************************************************************************
|
| 1015 |
|
|
* Function Name : ADC_SetInjectedOffset
|
| 1016 |
|
|
* Description : Set the injected channels conversion value offset
|
| 1017 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 1018 |
|
|
* - ADC_InjectedChannel: the ADC injected channel to set its
|
| 1019 |
|
|
* offset.
|
| 1020 |
|
|
* This parameter can be one of the following values:
|
| 1021 |
|
|
* - ADC_InjectedChannel_1: Injected Channel1 selected
|
| 1022 |
|
|
* - ADC_InjectedChannel_2: Injected Channel2 selected
|
| 1023 |
|
|
* - ADC_InjectedChannel_3: Injected Channel3 selected
|
| 1024 |
|
|
* - ADC_InjectedChannel_4: Injected Channel4 selected
|
| 1025 |
|
|
* Output : None
|
| 1026 |
|
|
* Return : None
|
| 1027 |
|
|
*******************************************************************************/
|
| 1028 |
|
|
void ADC_SetInjectedOffset(ADC_TypeDef* ADCx, u8 ADC_InjectedChannel, u16 Offset)
|
| 1029 |
|
|
{
|
| 1030 |
|
|
/* Check the parameters */
|
| 1031 |
|
|
assert(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
|
| 1032 |
|
|
assert(IS_ADC_OFFSET(Offset));
|
| 1033 |
|
|
|
| 1034 |
|
|
/* Set the selected injected channel data offset */
|
| 1035 |
|
|
*((u32 *)((*(u32*)&ADCx) + ADC_InjectedChannel)) = (u32)Offset;
|
| 1036 |
|
|
}
|
| 1037 |
|
|
|
| 1038 |
|
|
/*******************************************************************************
|
| 1039 |
|
|
* Function Name : ADC_GetInjectedConversionValue
|
| 1040 |
|
|
* Description : Returns the ADC conversion result data for the selected
|
| 1041 |
|
|
* injected channel
|
| 1042 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 1043 |
|
|
* - ADC_InjectedChannel: the converted ADC injected channel.
|
| 1044 |
|
|
* This parameter can be one of the following values:
|
| 1045 |
|
|
* - ADC_InjectedChannel_1: Injected Channel1 selected
|
| 1046 |
|
|
* - ADC_InjectedChannel_2: Injected Channel2 selected
|
| 1047 |
|
|
* - ADC_InjectedChannel_3: Injected Channel3 selected
|
| 1048 |
|
|
* - ADC_InjectedChannel_4: Injected Channel4 selected
|
| 1049 |
|
|
* Output : None
|
| 1050 |
|
|
* Return : The Data conversion value.
|
| 1051 |
|
|
*******************************************************************************/
|
| 1052 |
|
|
u16 ADC_GetInjectedConversionValue(ADC_TypeDef* ADCx, u8 ADC_InjectedChannel)
|
| 1053 |
|
|
{
|
| 1054 |
|
|
/* Check the parameters */
|
| 1055 |
|
|
assert(IS_ADC_INJECTED_CHANNEL(ADC_InjectedChannel));
|
| 1056 |
|
|
|
| 1057 |
|
|
/* Returns the selected injected channel conversion data value */
|
| 1058 |
|
|
return (u16) (*(u32*) (((*(u32*)&ADCx) + ADC_InjectedChannel + JDR_Offset)));
|
| 1059 |
|
|
}
|
| 1060 |
|
|
|
| 1061 |
|
|
/*******************************************************************************
|
| 1062 |
|
|
* Function Name : ADC_AnalogWatchdogCmd
|
| 1063 |
|
|
* Description : Enables or disables the analog watchdog on single/all regular
|
| 1064 |
|
|
* or injected channels
|
| 1065 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 1066 |
|
|
* - ADC_AnalogWatchdog: the ADC analog watchdog configuration.
|
| 1067 |
|
|
* This parameter can be one of the following values:
|
| 1068 |
|
|
* - ADC_AnalogWatchdog_SingleRegEnable: Analog watchdog on
|
| 1069 |
|
|
* a single regular channel
|
| 1070 |
|
|
* - ADC_AnalogWatchdog_SingleInjecEnable: Analog watchdog on
|
| 1071 |
|
|
* a single injected channel
|
| 1072 |
|
|
* - ADC_AnalogWatchdog_SingleRegOrInjecEnable: Analog
|
| 1073 |
|
|
* watchdog on a single regular or injected channel
|
| 1074 |
|
|
* - ADC_AnalogWatchdog_AllRegEnable: Analog watchdog on
|
| 1075 |
|
|
* all regular channel
|
| 1076 |
|
|
* - ADC_AnalogWatchdog_AllInjecEnable: Analog watchdog on
|
| 1077 |
|
|
* all injected channel
|
| 1078 |
|
|
* - ADC_AnalogWatchdog_AllRegAllInjecEnable: Analog watchdog
|
| 1079 |
|
|
* on all regular and injected channels
|
| 1080 |
|
|
* - ADC_AnalogWatchdog_None: No channel guarded by the
|
| 1081 |
|
|
* analog watchdog
|
| 1082 |
|
|
* Output : None
|
| 1083 |
|
|
* Return : None
|
| 1084 |
|
|
*******************************************************************************/
|
| 1085 |
|
|
void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, u32 ADC_AnalogWatchdog)
|
| 1086 |
|
|
{
|
| 1087 |
|
|
u32 tmpreg = 0;
|
| 1088 |
|
|
|
| 1089 |
|
|
/* Check the parameters */
|
| 1090 |
|
|
assert(IS_ADC_ANALOG_WATCHDOG(ADC_AnalogWatchdog));
|
| 1091 |
|
|
|
| 1092 |
|
|
/* Get the old register value */
|
| 1093 |
|
|
tmpreg = ADCx->CR1;
|
| 1094 |
|
|
/* Clear AWDEN, AWDENJ and AWDSGL bits */
|
| 1095 |
|
|
tmpreg &= CR1_AWDMode_Reset;
|
| 1096 |
|
|
/* Set the analog watchdog enable mode */
|
| 1097 |
|
|
tmpreg |= ADC_AnalogWatchdog;
|
| 1098 |
|
|
/* Store the new register value */
|
| 1099 |
|
|
ADCx->CR1 = tmpreg;
|
| 1100 |
|
|
}
|
| 1101 |
|
|
|
| 1102 |
|
|
/*******************************************************************************
|
| 1103 |
|
|
* Function Name : ADC_AnalogWatchdogThresholdsConfig
|
| 1104 |
|
|
* Description : Configures the High and low thresholds of the analog watchdog.
|
| 1105 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 1106 |
|
|
* - HighThreshold: the ADC analog watchdog High threshold value.
|
| 1107 |
|
|
* This parameter must be a 12bit value.
|
| 1108 |
|
|
* - LowThreshold: the ADC analog watchdog Low threshold value.
|
| 1109 |
|
|
* This parameter must be a 12bit value.
|
| 1110 |
|
|
* Output : None
|
| 1111 |
|
|
* Return : None
|
| 1112 |
|
|
*******************************************************************************/
|
| 1113 |
|
|
void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, u16 HighThreshold,
|
| 1114 |
|
|
u16 LowThreshold)
|
| 1115 |
|
|
{
|
| 1116 |
|
|
/* Check the parameters */
|
| 1117 |
|
|
assert(IS_ADC_THRESHOLD(HighThreshold));
|
| 1118 |
|
|
assert(IS_ADC_THRESHOLD(LowThreshold));
|
| 1119 |
|
|
|
| 1120 |
|
|
/* Set the ADCx high threshold */
|
| 1121 |
|
|
ADCx->HTR = HighThreshold;
|
| 1122 |
|
|
/* Set the ADCx low threshold */
|
| 1123 |
|
|
ADCx->LTR = LowThreshold;
|
| 1124 |
|
|
}
|
| 1125 |
|
|
|
| 1126 |
|
|
/*******************************************************************************
|
| 1127 |
|
|
* Function Name : ADC_AnalogWatchdogSingleChannelConfig
|
| 1128 |
|
|
* Description : Configures the analog watchdog guarded single channel
|
| 1129 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 1130 |
|
|
* - ADC_Channel: the ADC channel to configure for the analog
|
| 1131 |
|
|
* watchdog.
|
| 1132 |
|
|
* This parameter can be one of the following values:
|
| 1133 |
|
|
* - ADC_Channel_0: ADC Channel0 selected
|
| 1134 |
|
|
* - ADC_Channel_1: ADC Channel1 selected
|
| 1135 |
|
|
* - ADC_Channel_2: ADC Channel2 selected
|
| 1136 |
|
|
* - ADC_Channel_3: ADC Channel3 selected
|
| 1137 |
|
|
* - ADC_Channel_4: ADC Channel4 selected
|
| 1138 |
|
|
* - ADC_Channel_5: ADC Channel5 selected
|
| 1139 |
|
|
* - ADC_Channel_6: ADC Channel6 selected
|
| 1140 |
|
|
* - ADC_Channel_7: ADC Channel7 selected
|
| 1141 |
|
|
* - ADC_Channel_8: ADC Channel8 selected
|
| 1142 |
|
|
* - ADC_Channel_9: ADC Channel9 selected
|
| 1143 |
|
|
* - ADC_Channel_10: ADC Channel10 selected
|
| 1144 |
|
|
* - ADC_Channel_11: ADC Channel11 selected
|
| 1145 |
|
|
* - ADC_Channel_12: ADC Channel12 selected
|
| 1146 |
|
|
* - ADC_Channel_13: ADC Channel13 selected
|
| 1147 |
|
|
* - ADC_Channel_14: ADC Channel14 selected
|
| 1148 |
|
|
* - ADC_Channel_15: ADC Channel15 selected
|
| 1149 |
|
|
* - ADC_Channel_16: ADC Channel16 selected
|
| 1150 |
|
|
* - ADC_Channel_17: ADC Channel17 selected
|
| 1151 |
|
|
* Output : None
|
| 1152 |
|
|
* Return : None
|
| 1153 |
|
|
*******************************************************************************/
|
| 1154 |
|
|
void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel)
|
| 1155 |
|
|
{
|
| 1156 |
|
|
u32 tmpreg = 0;
|
| 1157 |
|
|
|
| 1158 |
|
|
/* Check the parameters */
|
| 1159 |
|
|
assert(IS_ADC_CHANNEL(ADC_Channel));
|
| 1160 |
|
|
|
| 1161 |
|
|
/* Get the old register value */
|
| 1162 |
|
|
tmpreg = ADCx->CR1;
|
| 1163 |
|
|
/* Clear the Analog watchdog channel select bits */
|
| 1164 |
|
|
tmpreg &= CR1_AWDCH_Reset;
|
| 1165 |
|
|
/* Set the Analog watchdog channel */
|
| 1166 |
|
|
tmpreg |= ADC_Channel;
|
| 1167 |
|
|
/* Store the new register value */
|
| 1168 |
|
|
ADCx->CR1 = tmpreg;
|
| 1169 |
|
|
}
|
| 1170 |
|
|
|
| 1171 |
|
|
/*******************************************************************************
|
| 1172 |
|
|
* Function Name : ADC_TempSensorCmd
|
| 1173 |
|
|
* Description : Enables or disables the temperature sensor.
|
| 1174 |
|
|
* Input : - NewState: new state of the temperature sensor.
|
| 1175 |
|
|
* This parameter can be: ENABLE or DISABLE.
|
| 1176 |
|
|
* Output : None
|
| 1177 |
|
|
* Return : None
|
| 1178 |
|
|
*******************************************************************************/
|
| 1179 |
|
|
void ADC_TempSensorCmd(FunctionalState NewState)
|
| 1180 |
|
|
{
|
| 1181 |
|
|
/* Check the parameters */
|
| 1182 |
|
|
assert(IS_FUNCTIONAL_STATE(NewState));
|
| 1183 |
|
|
|
| 1184 |
|
|
if (NewState != DISABLE)
|
| 1185 |
|
|
{
|
| 1186 |
|
|
/* Enable the temperature sensor */
|
| 1187 |
|
|
ADC1->CR2 |= CR2_TSPD_Set;
|
| 1188 |
|
|
}
|
| 1189 |
|
|
else
|
| 1190 |
|
|
{
|
| 1191 |
|
|
/* Disable the temperature sensor */
|
| 1192 |
|
|
ADC1->CR2 &= CR2_TSPD_Reset;
|
| 1193 |
|
|
}
|
| 1194 |
|
|
}
|
| 1195 |
|
|
|
| 1196 |
|
|
/*******************************************************************************
|
| 1197 |
|
|
* Function Name : ADC_GetFlagStatus
|
| 1198 |
|
|
* Description : Checks whether the specified ADC flag is set or not.
|
| 1199 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 1200 |
|
|
* - ADC_FLAG: specifies the flag to check.
|
| 1201 |
|
|
* This parameter can be one of the following values:
|
| 1202 |
|
|
* - ADC_FLAG_AWD: Analog watchdog flag
|
| 1203 |
|
|
* - ADC_FLAG_EOC: End of conversion flag
|
| 1204 |
|
|
* - ADC_FLAG_JEOC: End of injected group conversion flag
|
| 1205 |
|
|
* - ADC_FLAG_JSTRT: Start of injected group conversion flag
|
| 1206 |
|
|
* - ADC_FLAG_STRT: Start of regular group conversion flag
|
| 1207 |
|
|
* Output : None
|
| 1208 |
|
|
* Return : The new state of ADC_FLAG (SET or RESET).
|
| 1209 |
|
|
*******************************************************************************/
|
| 1210 |
|
|
FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, u8 ADC_FLAG)
|
| 1211 |
|
|
{
|
| 1212 |
|
|
FlagStatus bitstatus = RESET;
|
| 1213 |
|
|
|
| 1214 |
|
|
/* Check the parameters */
|
| 1215 |
|
|
assert(IS_ADC_GET_FLAG(ADC_FLAG));
|
| 1216 |
|
|
|
| 1217 |
|
|
/* Check the status of the specified ADC flag */
|
| 1218 |
|
|
if ((ADCx->SR & ADC_FLAG) != (u8)RESET)
|
| 1219 |
|
|
{
|
| 1220 |
|
|
/* ADC_FLAG is set */
|
| 1221 |
|
|
bitstatus = SET;
|
| 1222 |
|
|
}
|
| 1223 |
|
|
else
|
| 1224 |
|
|
{
|
| 1225 |
|
|
/* ADC_FLAG is reset */
|
| 1226 |
|
|
bitstatus = RESET;
|
| 1227 |
|
|
}
|
| 1228 |
|
|
/* Return the ADC_FLAG status */
|
| 1229 |
|
|
return bitstatus;
|
| 1230 |
|
|
}
|
| 1231 |
|
|
|
| 1232 |
|
|
/*******************************************************************************
|
| 1233 |
|
|
* Function Name : ADC_ClearFlag
|
| 1234 |
|
|
* Description : Clears the ADCx's pending flags.
|
| 1235 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 1236 |
|
|
* - ADC_FLAG: specifies the flag to clear.
|
| 1237 |
|
|
* This parameter can be any combination of the following values:
|
| 1238 |
|
|
* - ADC_FLAG_AWD: Analog watchdog flag
|
| 1239 |
|
|
* - ADC_FLAG_EOC: End of conversion flag
|
| 1240 |
|
|
* - ADC_FLAG_JEOC: End of injected group conversion flag
|
| 1241 |
|
|
* - ADC_FLAG_JSTRT: Start of injected group conversion flag
|
| 1242 |
|
|
* - ADC_FLAG_STRT: Start of regular group conversion flag
|
| 1243 |
|
|
* Output : None
|
| 1244 |
|
|
* Return : None
|
| 1245 |
|
|
*******************************************************************************/
|
| 1246 |
|
|
void ADC_ClearFlag(ADC_TypeDef* ADCx, u8 ADC_FLAG)
|
| 1247 |
|
|
{
|
| 1248 |
|
|
/* Check the parameters */
|
| 1249 |
|
|
assert(IS_ADC_CLEAR_FLAG(ADC_FLAG));
|
| 1250 |
|
|
|
| 1251 |
|
|
/* Clear the selected ADC flags */
|
| 1252 |
|
|
ADCx->SR &= ~(u32)ADC_FLAG;
|
| 1253 |
|
|
}
|
| 1254 |
|
|
|
| 1255 |
|
|
/*******************************************************************************
|
| 1256 |
|
|
* Function Name : ADC_GetITStatus
|
| 1257 |
|
|
* Description : Checks whether the specified ADC interrupt has occurred or not.
|
| 1258 |
|
|
* Input : - ADCx: where x can be 1 or 2 to select the ADC peripheral.
|
| 1259 |
|
|
* - ADC_IT: specifies the ADC interrupt source to check.
|
| 1260 |
|
|
* This parameter can be one of the following values:
|
| 1261 |
|
|
* - ADC_IT_EOC: End of conversion interrupt mask
|
| 1262 |
|
|
* - ADC_IT_AWD: Analog watchdog interrupt mask
|
| 1263 |
|
|
* - ADC_IT_JEOC: End of injected conversion interrupt mask
|
| 1264 |
|
|
* Output : None
|
| 1265 |
|
|
* Return : The new state of ADC_IT (SET or RESET).
|
| 1266 |
|
|
*******************************************************************************/
|
| 1267 |
|
|
ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, u16 ADC_IT)
|
| 1268 |
|
|
{
|
| 1269 |
|
|
ITStatus bitstatus = RESET;
|
| 1270 |
|
|
u8 itmask = 0, enablestatus;
|
| 1271 |
|
|
|
| 1272 |
|
|
/* Check the parameters */
|
| 1273 |
|
|
assert(IS_ADC_GET_IT(ADC_IT));
|
| 1274 |
|
|
|
| 1275 |
|
|
/* Get the ADC IT index */
|
| 1276 |
|
|
itmask = (u8)(ADC_IT >> 8);
|
| 1277 |
|
|
|
| 1278 |
|
|
/* Get the ADC_IT enable bit status */
|
| 1279 |
|
|
enablestatus = (ADCx->CR1 & (u8)ADC_IT) ;
|
| 1280 |
|
|
|
| 1281 |
|
|
/* Check the status of the specified ADC interrupt */
|
| 1282 |
|
|
if (((ADCx->SR & itmask) != (u8)RESET) && enablestatus)
|
| 1283 |
|
|
{
|
| 1284 |
|
|
/* ADC_IT is set */
|
| 1285 |
|
|
bitstatus = SET;
|
| 1286 |
|
|
}
|
| 1287 |
|
|
else
|
| 1288 |
|
|
{
|
| 1289 |
|
|
/* ADC_IT is reset */
|
| 1290 |
|
|
bitstatus = RESET;
|
| 1291 |
|
|
}
|
| 1292 |
|
|
/* Return the ADC_IT status */
|
| 1293 |
|
|
return bitstatus;
|
| 1294 |
|
|
}
|
| 1295 |
|
|
|
| 1296 |
|
|
/*******************************************************************************
|
| 1297 |
|
|
* Function Name : ADC_ClearITPendingBit
|
| 1298 |
|
|
* Description : Clears the ADC’s interrupt pending bits.
|
| 1299 |
|
|
* Input : - ADC_IT: specifies the ADC interrupt pending bit to clear.
|
| 1300 |
|
|
* This parameter can be any combination of the following values:
|
| 1301 |
|
|
* - ADC_IT_EOC: End of conversion interrupt mask
|
| 1302 |
|
|
* - ADC_IT_AWD: Analog watchdog interrupt mask
|
| 1303 |
|
|
* - ADC_IT_JEOC: End of injected conversion interrupt mask
|
| 1304 |
|
|
* Output : None
|
| 1305 |
|
|
* Return : None
|
| 1306 |
|
|
*******************************************************************************/
|
| 1307 |
|
|
void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, u16 ADC_IT)
|
| 1308 |
|
|
{
|
| 1309 |
|
|
u8 itmask = 0;
|
| 1310 |
|
|
|
| 1311 |
|
|
/* Check the parameters */
|
| 1312 |
|
|
assert(IS_ADC_IT(ADC_IT));
|
| 1313 |
|
|
|
| 1314 |
|
|
/* Get the ADC IT index */
|
| 1315 |
|
|
itmask = (u8)(ADC_IT >> 8);
|
| 1316 |
|
|
|
| 1317 |
|
|
/* Clear the selected ADC interrupt pending bits */
|
| 1318 |
|
|
ADCx->SR &= ~(u32)itmask;
|
| 1319 |
|
|
}
|
| 1320 |
|
|
|
| 1321 |
|
|
/******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****/
|