1 |
588 |
jeremybenn |
/** ###################################################################
|
2 |
|
|
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
|
3 |
|
|
** Filename : Cpu.C
|
4 |
|
|
** Project : RTOSDemo
|
5 |
|
|
** Processor : MC9S12DP256BCPV
|
6 |
|
|
** Beantype : MC9S12DP256_112
|
7 |
|
|
** Version : Bean 01.148, Driver 01.09, CPU db: 2.87.283
|
8 |
|
|
** Compiler : Metrowerks HC12 C Compiler
|
9 |
|
|
** Date/Time : 16/06/2005, 19:18
|
10 |
|
|
** Abstract :
|
11 |
|
|
** This bean "MC9S12DP256_112" implements properties, methods,
|
12 |
|
|
** and events of the CPU.
|
13 |
|
|
** Settings :
|
14 |
|
|
**
|
15 |
|
|
** Contents :
|
16 |
|
|
** EnableInt - void Cpu_EnableInt(void);
|
17 |
|
|
** DisableInt - void Cpu_DisableInt(void);
|
18 |
|
|
**
|
19 |
|
|
** (c) Copyright UNIS, spol. s r.o. 1997-2002
|
20 |
|
|
** UNIS, spol. s r.o.
|
21 |
|
|
** Jundrovska 33
|
22 |
|
|
** 624 00 Brno
|
23 |
|
|
** Czech Republic
|
24 |
|
|
** http : www.processorexpert.com
|
25 |
|
|
** mail : info@processorexpert.com
|
26 |
|
|
** ###################################################################*/
|
27 |
|
|
|
28 |
|
|
|
29 |
|
|
#include "Cpu.h"
|
30 |
|
|
#include "TickTimer.h"
|
31 |
|
|
#include "Byte1.h"
|
32 |
|
|
|
33 |
|
|
extern void near _EntryPoint(void); /* Startup routine */
|
34 |
|
|
extern void near vPortTickInterrupt( void );
|
35 |
|
|
extern void near vPortYield( void );
|
36 |
|
|
extern void near vCOM0_ISR( void );
|
37 |
|
|
|
38 |
|
|
typedef void (*near tIsrFunc)(void);
|
39 |
|
|
const tIsrFunc _vect[] @0xFF80 = { /* Interrupt table */
|
40 |
|
|
Cpu_Interrupt, /* 0 Default (unused) interrupt */
|
41 |
|
|
Cpu_Interrupt, /* 1 Default (unused) interrupt */
|
42 |
|
|
Cpu_Interrupt, /* 2 Default (unused) interrupt */
|
43 |
|
|
Cpu_Interrupt, /* 3 Default (unused) interrupt */
|
44 |
|
|
Cpu_Interrupt, /* 4 Default (unused) interrupt */
|
45 |
|
|
Cpu_Interrupt, /* 5 Default (unused) interrupt */
|
46 |
|
|
Cpu_Interrupt, /* 6 Default (unused) interrupt */
|
47 |
|
|
Cpu_Interrupt, /* 7 Default (unused) interrupt */
|
48 |
|
|
Cpu_Interrupt, /* 8 Default (unused) interrupt */
|
49 |
|
|
Cpu_Interrupt, /* 9 Default (unused) interrupt */
|
50 |
|
|
Cpu_Interrupt, /* 10 Default (unused) interrupt */
|
51 |
|
|
Cpu_Interrupt, /* 11 Default (unused) interrupt */
|
52 |
|
|
Cpu_Interrupt, /* 12 Default (unused) interrupt */
|
53 |
|
|
Cpu_Interrupt, /* 13 Default (unused) interrupt */
|
54 |
|
|
Cpu_Interrupt, /* 14 Default (unused) interrupt */
|
55 |
|
|
Cpu_Interrupt, /* 15 Default (unused) interrupt */
|
56 |
|
|
Cpu_Interrupt, /* 16 Default (unused) interrupt */
|
57 |
|
|
Cpu_Interrupt, /* 17 Default (unused) interrupt */
|
58 |
|
|
Cpu_Interrupt, /* 18 Default (unused) interrupt */
|
59 |
|
|
Cpu_Interrupt, /* 19 Default (unused) interrupt */
|
60 |
|
|
Cpu_Interrupt, /* 20 Default (unused) interrupt */
|
61 |
|
|
Cpu_Interrupt, /* 21 Default (unused) interrupt */
|
62 |
|
|
Cpu_Interrupt, /* 22 Default (unused) interrupt */
|
63 |
|
|
Cpu_Interrupt, /* 23 Default (unused) interrupt */
|
64 |
|
|
Cpu_Interrupt, /* 24 Default (unused) interrupt */
|
65 |
|
|
Cpu_Interrupt, /* 25 Default (unused) interrupt */
|
66 |
|
|
Cpu_Interrupt, /* 26 Default (unused) interrupt */
|
67 |
|
|
Cpu_Interrupt, /* 27 Default (unused) interrupt */
|
68 |
|
|
Cpu_Interrupt, /* 28 Default (unused) interrupt */
|
69 |
|
|
Cpu_Interrupt, /* 29 Default (unused) interrupt */
|
70 |
|
|
Cpu_Interrupt, /* 30 Default (unused) interrupt */
|
71 |
|
|
Cpu_Interrupt, /* 31 Default (unused) interrupt */
|
72 |
|
|
Cpu_Interrupt, /* 32 Default (unused) interrupt */
|
73 |
|
|
Cpu_Interrupt, /* 33 Default (unused) interrupt */
|
74 |
|
|
Cpu_Interrupt, /* 34 Default (unused) interrupt */
|
75 |
|
|
Cpu_Interrupt, /* 35 Default (unused) interrupt */
|
76 |
|
|
Cpu_Interrupt, /* 36 Default (unused) interrupt */
|
77 |
|
|
Cpu_Interrupt, /* 37 Default (unused) interrupt */
|
78 |
|
|
Cpu_Interrupt, /* 38 Default (unused) interrupt */
|
79 |
|
|
Cpu_Interrupt, /* 39 Default (unused) interrupt */
|
80 |
|
|
Cpu_Interrupt, /* 40 Default (unused) interrupt */
|
81 |
|
|
Cpu_Interrupt, /* 41 Default (unused) interrupt */
|
82 |
|
|
Cpu_Interrupt, /* 42 Default (unused) interrupt */
|
83 |
|
|
vCOM0_ISR,
|
84 |
|
|
Cpu_Interrupt, /* 44 Default (unused) interrupt */
|
85 |
|
|
Cpu_Interrupt, /* 45 Default (unused) interrupt */
|
86 |
|
|
Cpu_Interrupt, /* 46 Default (unused) interrupt */
|
87 |
|
|
Cpu_Interrupt, /* 47 Default (unused) interrupt */
|
88 |
|
|
Cpu_Interrupt, /* 48 Default (unused) interrupt */
|
89 |
|
|
Cpu_Interrupt, /* 49 Default (unused) interrupt */
|
90 |
|
|
Cpu_Interrupt, /* 50 Default (unused) interrupt */
|
91 |
|
|
Cpu_Interrupt, /* 51 Default (unused) interrupt */
|
92 |
|
|
Cpu_Interrupt, /* 52 Default (unused) interrupt */
|
93 |
|
|
Cpu_Interrupt, /* 53 Default (unused) interrupt */
|
94 |
|
|
Cpu_Interrupt, /* 54 Default (unused) interrupt */
|
95 |
|
|
vPortTickInterrupt,
|
96 |
|
|
Cpu_Interrupt, /* 56 Default (unused) interrupt */
|
97 |
|
|
Cpu_Interrupt, /* 57 Default (unused) interrupt */
|
98 |
|
|
Cpu_Interrupt, /* 58 Default (unused) interrupt */
|
99 |
|
|
vPortYield, /* 59 Default (unused) interrupt */
|
100 |
|
|
Cpu_Interrupt, /* 60 Default (unused) interrupt */
|
101 |
|
|
Cpu_Interrupt, /* 61 Default (unused) interrupt */
|
102 |
|
|
Cpu_Interrupt, /* 62 Default (unused) interrupt */
|
103 |
|
|
_EntryPoint /* Reset vector */
|
104 |
|
|
};
|
105 |
|
|
/*
|
106 |
|
|
** ###################################################################
|
107 |
|
|
**
|
108 |
|
|
** This file was created by UNIS Processor Expert 03.33 for
|
109 |
|
|
** the Motorola HCS12 series of microcontrollers.
|
110 |
|
|
**
|
111 |
|
|
** ###################################################################
|
112 |
|
|
*/
|