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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [HCS12_CodeWarrior_banked/] [CODE/] [Cpu.C] - Blame information for rev 621

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1 588 jeremybenn
/** ###################################################################
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**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
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**     Filename  : Cpu.C
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**     Project   : RTOSDemo
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**     Processor : MC9S12DP256BCPV
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**     Beantype  : MC9S12DP256_112
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**     Version   : Bean 01.148, Driver 01.09, CPU db: 2.87.283
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**     Compiler  : Metrowerks HC12 C Compiler
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**     Date/Time : 18/06/2005, 16:21
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**     Abstract  :
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**         This bean "MC9S12DP256_112" implements properties, methods,
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**         and events of the CPU.
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**     Settings  :
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**
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**     Contents  :
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**         EnableInt  - void Cpu_EnableInt(void);
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**         DisableInt - void Cpu_DisableInt(void);
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**
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**     (c) Copyright UNIS, spol. s r.o. 1997-2002
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**     UNIS, spol. s r.o.
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**     Jundrovska 33
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**     624 00 Brno
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**     Czech Republic
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**     http      : www.processorexpert.com
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**     mail      : info@processorexpert.com
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** ###################################################################*/
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/* MODULE Cpu. */
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#include "TickTimer.h"
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#include "Byte1.h"
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#include "COM0.h"
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#include "PE_Types.h"
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#include "PE_Error.h"
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#include "PE_Const.h"
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#include "IO_Map.h"
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#include "PE_Timer.h"
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#include "Events.h"
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#include "Cpu.h"
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#define CGM_DELAY  3071UL
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/* Global variables */
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volatile byte CCR_reg;                 /* Current CCR reegister */
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byte CpuMode = HIGH_SPEED;             /* Current speed mode */
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/*
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** ===================================================================
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**     Method      :  Cpu_Interrupt (bean MC9S12DP256_112)
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**
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**     Description :
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**         This method is internal. It is used by Processor Expert
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**         only.
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** ===================================================================
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*/
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#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
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__interrupt void Cpu_Interrupt(void)
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{
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}
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#pragma CODE_SEG DEFAULT               /* Change code section to DEFAULT. */
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/*
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** ===================================================================
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**     Method      :  Cpu_DisableInt (bean MC9S12DP256_112)
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**
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**     Description :
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**         Disable maskable interrupts
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**     Parameters  : None
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**     Returns     : Nothing
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** ===================================================================
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*/
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/*
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void Cpu_DisableInt(void)
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**      This method is implemented as macro in the header module. **
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*/
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/*
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** ===================================================================
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**     Method      :  Cpu_EnableInt (bean MC9S12DP256_112)
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**
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**     Description :
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**         Enable maskable interrupts
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**     Parameters  : None
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**     Returns     : Nothing
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** ===================================================================
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*/
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/*
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void Cpu_EnableInt(void)
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**      This method is implemented as macro in the header module. **
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*/
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/*
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** ===================================================================
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**     Method      :  _EntryPoint (bean MC9S12DP256_112)
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**
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**     Description :
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**         This method is internal. It is used by Processor Expert
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**         only.
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** ===================================================================
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*/
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extern void _Startup(void);            /* Forward declaration of external startup function declared in file Start12.c */
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#define INITRG_ADR  0x0011             /* Register map position register */
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#pragma NO_FRAME
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#pragma NO_EXIT
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void _EntryPoint(void)
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{
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  /*** ### MC9S12DP256_112 "Cpu" init code ... ***/
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  /*** PE initialization code after reset ***/
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  /* Initialization of the registers INITRG, INITRM, INITEE is done to protect them to be written accidentally later by the application */
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  *(byte*)INITRG_ADR = 0;              /* Set the register map position */
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  asm nop;                             /* nop instruction */
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  INITRM=1;                            /* Set the RAM map position */
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  INITEE=1;                            /* Set the EEPROM map position */
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  /* MISC: ??=0,??=0,??=0,??=0,EXSTR1=0,EXSTR0=0,ROMHM=0,ROMON=1 */
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  MISC=1;
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  /* System clock initialization */
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  CLKSEL=0;
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  CLKSEL_PLLSEL = 0;                   /* Select clock source from XTAL */
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  PLLCTL_PLLON = 0;                    /* Disable the PLL */
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  SYNR = 24;                           /* Set the multiplier register */
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  REFDV = 15;                          /* Set the divider register */
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  PLLCTL = 192;
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  PLLCTL_PLLON = 1;                    /* Enable the PLL */
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  while(!CRGFLG_LOCK);                 /* Wait */
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  CLKSEL_PLLSEL = 1;                   /* Select clock source from PLL */
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  /*** End of PE initialization code after reset ***/
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  __asm   jmp _Startup;                /* Jump to C startup code */
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}
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/*
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** ===================================================================
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**     Method      :  PE_low_level_init (bean MC9S12DP256_112)
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**
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**     Description :
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**         This method is internal. It is used by Processor Expert
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**         only.
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** ===================================================================
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*/
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void PE_low_level_init(void)
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{
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  /* Common initialization of the CPU registers */
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/* TSCR1: TEN=0,TSWAI=0,TSFRZ=1 */
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  output( TSCR1, input( TSCR1 ) & ~192 | 32 );
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/* TCTL2: OM0=0,OL0=0 */
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  output( TCTL2, input( TCTL2 ) & ~3 );
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/* TCTL1: OM7=0,OL7=0 */
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  output( TCTL1, input( TCTL1 ) & ~192 );
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/* TIE: C0I=0 */
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  output( TIE, input( TIE ) & ~1 );
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/* TTOV: TOV0=0 */
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  output( TTOV, input( TTOV ) & ~1 );
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/* TSCR2: TOI=0,TCRE=1 */
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  output( TSCR2, input( TSCR2 ) & ~128 | 8 );
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/* TIOS: IOS7=1,IOS0=1 */
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  output( TIOS, input( TIOS ) | 129 );
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/* PWMCTL: PSWAI=0,PFRZ=0 */
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  output( PWMCTL, input( PWMCTL ) & ~12 );
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/* PWMSDN: PWMIF=0,PWMIE=0,PWMRSTRT=0,PWMLVL=0,??=0,PWM7IN=0,PWM7INL=0,PWM7ENA=0 */
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  output( PWMSDN, 0 );
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/* ICSYS: SH37=0,SH26=0,SH15=0,SH04=0,TFMOD=0,PACMX=0,BUFEN=0,LATQ=0 */
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  output( ICSYS, 0 );
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/* MCCTL: MODMC=1 */
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  output( MCCTL, input( MCCTL ) | 64 );
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  /* ### MC9S12DP256_112 "Cpu" init code ... */
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  /* ### TimerInt "TickTimer" init code ... */
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  TickTimer_Init();
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  /* ### ByteIO "Byte1" init code ... */
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  PORTB = 255;                         /* Prepare value for output */
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  DDRB = 255;                          /* Set direction to output */
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  /* ### Asynchro serial "COM0" init code ... */
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  DDRS &= ~1;
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  PTS |= 2;
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  DDRS |= 2;
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  COM0_Init();
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 /* Common peripheral initialization - ENABLE */
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/* TSCR1: TEN=1 */
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  output( TSCR1, input( TSCR1 ) | 128 );
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  INTCR_IRQEN = 0;                     /* Disable the IRQ interrupt. IRQ interrupt is enabled after CPU reset by default. */
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  __DI();                              /* Disable interrupts */
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}
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/* END Cpu. */
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/*
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** ###################################################################
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**
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**     This file was created by UNIS Processor Expert 03.33 for
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**     the Motorola HCS12 series of microcontrollers.
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**
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** ###################################################################
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*/

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