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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [HCS12_GCC_banked/] [asm-m68hcs12/] [interrupts-dp256.h] - Blame information for rev 867

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1 588 jeremybenn
/* Interrupt Vectors defined
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   Copyright (C) 2004 Robotronics, Inc.
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   Author Jefferson Smith, Robotronics
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This file is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published by the
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Free Software Foundation; either version 2, or (at your option) any
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later version.
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In addition to the permissions in the GNU General Public License, the
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Free Software Foundation gives you unlimited permission to link the
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compiled version of this file with other programs, and to distribute
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those programs without any restriction coming from the use of this
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file.  (The General Public License restrictions do apply in other
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respects; for example, they cover modification of the file, and
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distribution when not linked into another program.)
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This file is distributed in the hope that it will be useful, but
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WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING.  If not, write to
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the Free Software Foundation, 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA.  */
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#ifndef _M68HC12_ASM_INTERRUPTS_DP256_H
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#define _M68HC12_ASM_INTERRUPTS_DP256_H
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/** Interrupt vectors as a struct.  */
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struct interrupt_vectors
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{
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  interrupt_t res0_handler;        /* 0x80 */
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  interrupt_t res1_handler;        /* 0x82 */
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  interrupt_t res2_handler;        /* 0x84 */
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  interrupt_t res3_handler;        /* 0x86 */
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  interrupt_t res4_handler;        /* 0x88 */
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  interrupt_t res5_handler;        /* 0x8a */
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  interrupt_t pwm_shutdown_handler; /* 0x8c */
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  interrupt_t ptpif_handler;
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  /** Controller Area Networking */
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  interrupt_t can4_tx_handler;
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  interrupt_t can4_rx_handler;
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  interrupt_t can4_err_handler;
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  interrupt_t can4_wake_handler;
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  interrupt_t can3_tx_handler;
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  interrupt_t can3_rx_handler;
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  interrupt_t can3_err_handler;
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  interrupt_t can3_wake_handler;
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  interrupt_t can2_tx_handler;
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  interrupt_t can2_rx_handler;
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  interrupt_t can2_err_handler;
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  interrupt_t can2_wake_handler;
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  interrupt_t can1_tx_handler;
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  interrupt_t can1_rx_handler;
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  interrupt_t can1_err_handler;
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  interrupt_t can1_wake_handler;
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  interrupt_t can0_tx_handler;
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  interrupt_t can0_rx_handler;
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  interrupt_t can0_err_handler;
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  interrupt_t can0_wake_handler;
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  interrupt_t flash_handler;
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  interrupt_t eeprom_handler;
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  interrupt_t spi2_handler;
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  interrupt_t spi1_handler;
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  interrupt_t iic_handler;
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  interrupt_t bdlc_handler;
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  interrupt_t selfclk_mode_handler;
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  interrupt_t pll_lock_handler;
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  interrupt_t accb_overflow_handler;
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  interrupt_t mccnt_underflow_handler;
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  interrupt_t pthif_handler;
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  interrupt_t ptjif_handler;
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  interrupt_t atd1_handler;
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  interrupt_t atd0_handler;
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  interrupt_t sci1_handler;
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  interrupt_t sci0_handler;
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  interrupt_t spi0_handler;
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  /** Timer and Accumulator */
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  interrupt_t acca_input_handler;
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  interrupt_t acca_overflow_handler;
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  interrupt_t timer_overflow_handler;
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  /** Input capture / Output compare Timers */
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  interrupt_t tc7_handler;
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  interrupt_t tc6_handler;
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  interrupt_t tc5_handler;
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  interrupt_t tc4_handler;
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  interrupt_t tc3_handler;
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  interrupt_t tc2_handler;
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  interrupt_t tc1_handler;
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  interrupt_t tc0_handler;
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  /** External Interrupts */
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  interrupt_t rtii_handler;
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  interrupt_t irq_handler;
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  interrupt_t xirq_handler;
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  /** Software Interrupt  */
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  interrupt_t swi_handler;
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  /** Illegal Instruction Reset  */
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  interrupt_t illegal_handler;
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  /** COP Timeout Reset  */
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  interrupt_t cop_fail_handler;
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  /** Clock Monitor Fail Reset  */
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  interrupt_t cop_clock_handler;
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  /** Start or Reset vector  */
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  interrupt_t reset_handler;
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};
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typedef struct interrupt_vectors interrupt_vectors_t;
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/** Interrupt vector id. */
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enum interrupt_vector_id
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{
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  RES0_VECTOR = 0,
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  RES1_VECTOR,
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  RES2_VECTOR,
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  RES3_VECTOR,
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  RES4_VECTOR,
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  RES5_VECTOR,
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  PWM_SHUTDOWN_VECTOR,
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  PTPIF_VECTOR,
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  CAN4_TX_VECTOR,
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  CAN4_RX_VECTOR,
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  CAN4_ERR_VECTOR,
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  CAN4_WAKE_VECTOR,
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  CAN3_TX_VECTOR,
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  CAN3_RX_VECTOR,
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  CAN3_ERR_VECTOR,
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  CAN3_WAKE_VECTOR,
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  CAN2_TX_VECTOR,
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  CAN2_RX_VECTOR,
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  CAN2_ERR_VECTOR,
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  CAN2_WAKE_VECTOR,
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  CAN1_TX_VECTOR,
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  CAN1_RX_VECTOR,
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  CAN1_ERR_VECTOR,
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  CAN1_WAKE_VECTOR,
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  CAN0_TX_VECTOR,
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  CAN0_RX_VECTOR,
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  CAN0_ERR_VECTOR,
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  CAN0_WAKE_VECTOR,
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  FLASH_VECTOR,
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  EEPROM_VECTOR,
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  SPI2_VECTOR,
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  SPI1_VECTOR,
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  IIC_VECTOR,
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  BDLC_VECTOR,
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  SELFCLK_MODE_VECTOR,
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  PLL_LOCK_VECTOR,
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  ACCB_OVERFLOW_VECTOR,
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  MCCNT_UNDERFLOW_VECTOR,
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  PTHIF_VECTOR,
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  PTJIF_VECTOR,
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  ATD1_VECTOR,
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  ATD0_VECTOR,
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  SCI1_VECTOR,
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  SCI0_VECTOR,
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  SPI0_VECTOR,
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  ACCA_INPUT_VECTOR,
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  ACCA_OVERFLOW_VECTOR,
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  TIMER_OVERFLOW_VECTOR,
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  TC7_VECTOR,
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  TC6_VECTOR,
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  TC5_VECTOR,
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  TC4_VECTOR,
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  TC3_VECTOR,
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  TC2_VECTOR,
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  TC1_VECTOR,
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  TC0_VECTOR,
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  RTI_VECTOR,
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  IRQ_VECTOR,
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  XIRQ_VECTOR,
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  SWI_VECTOR,
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  ILLEGAL_OPCODE_VECTOR,
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  COP_FAIL_VECTOR,
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  COP_CLOCK_VECTOR,
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  RESET_VECTOR,
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  MAX_VECTORS
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};
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typedef enum interrupt_vector_id interrupt_vector_id;
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/** some backwards-compatible equivalents from HC11 */
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#define SCI_VECTOR           SCI0_VECTOR
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#define SPI_VECTOR           SPI0_VECTOR
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#define ACC_INPUT_VECTOR     ACCA_INPUT_VECTOR
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#define ACC_OVERFLOW_VECTOR  ACCA_OVERFLOW_VECTOR
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#endif  /* _M68HC12_ASM_INTERRUPTS_DP256_H */

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