OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [HCS12_GCC_banked/] [ldscript-rtos.x] - Blame information for rev 773

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 588 jeremybenn
/* Linker script for MC689S12DP256 Flash
2
   rom banks.
3
 
4
   Author Jefferson L Smith; Robotronics, Inc.  2006
5
 */
6
OUTPUT_FORMAT("elf32-m68hc12", "elf32-m68hc12",
7
              "elf32-m68hc12")
8
OUTPUT_ARCH(m68hc12)
9
ENTRY(_start)
10
 
11
/* Get memory banks definition from some user configuration file.
12
   This file must be located in some linker directory (search path
13
   with -L). See fixed memory banks emulation script.  */
14
INCLUDE memory.x;
15
 
16
SECTIONS
17
{
18
  /* Concatenate .page0 sections.  Put them in the page0 memory bank
19
     unless we are creating a relocatable file.  */
20
  .page0 :
21
  {
22
    *(.page0)
23
  }  > page0
24
 
25
  /* PPAGE memory banks */
26
 
27
  .bank0 :
28
  {
29
    *(.bank0)
30
    . = ALIGN(2);
31
  } > bank0  =0xff
32
  .bank1 :
33
  {
34
    *(.bank1)
35
    . = ALIGN(2);
36
  } > bank1  =0xff
37
  .bank2 :
38
  {
39
    *(.bank2)
40
    . = ALIGN(2);
41
  } > bank2  =0xff
42
  .bank3 :
43
  {
44
    *(.bank3)
45
    . = ALIGN(2);
46
  } > bank3  =0xff
47
  .bank4 :
48
  {
49
    *(.bank4)
50
    . = ALIGN(2);
51
  } > bank4  =0xff
52
  .bank5 :
53
  {
54
    *(.bank5)
55
    . = ALIGN(2);
56
  } > bank5  =0xff
57
  .bank6 :
58
  {
59
    *(.bank6)
60
    . = ALIGN(2);
61
  } > bank6  =0xff
62
  .bank7 :
63
  {
64
    *(.bank7)
65
    . = ALIGN(2);
66
  } > bank7  =0xff
67
  .bank8 :
68
  {
69
    *(.bank8)
70
    . = ALIGN(2);
71
  } > bank8  =0xff
72
  .bank9 :
73
  {
74
    *(.bank9)
75
    . = ALIGN(2);
76
  } > bank9  =0xff
77
  .bank10 :
78
  {
79
    *(.bank10)
80
    . = ALIGN(2);
81
  } > bank10  =0xff
82
  .bank11 :
83
  {
84
    *(.bank11)
85
    . = ALIGN(2);
86
  } > bank11  =0xff
87
  .bank12 :
88
  {
89
    *(.bank12)
90
    . = ALIGN(2);
91
  } > bank12  =0xff
92
  .bank13 :
93
  {
94
    *(.bank13)
95
    . = ALIGN(2);
96
  } > bank13  =0xff
97
 
98
  /* Start of text section.  */
99
  .text :
100
  {
101
    /* Put startup code at beginning so that _start keeps same address.  */
102
    /* Startup code.  */
103
    KEEP (*(.install0)) /* Section should setup the stack pointer.  */
104
    KEEP (*(.install1)) /* Place holder for applications.  */
105
    KEEP (*(.install2)) /* Optional installation of data sections in RAM.  */
106
    KEEP (*(.install3)) /* Place holder for applications.  */
107
    KEEP (*(.install4)) /* Section that calls the main.  */
108
    *(.init)
109
    *(.text)
110
    *(.text.*)
111
    *(.text_c)
112
    /* .gnu.warning sections are handled specially by elf32.em.  */
113
    *(.gnu.warning)
114
    *(.gnu.linkonce.t.*)
115
    *(.tramp)
116
    *(.tramp.*)
117
    /* Finish code.  */
118
    KEEP (*(.fini0))    /* Beginning of finish code (_exit symbol).  */
119
    KEEP (*(.fini1))    /* Place holder for applications.  */
120
    KEEP (*(.fini2))    /* C++ destructors.  */
121
    KEEP (*(.fini3))    /* Place holder for applications.  */
122
    KEEP (*(.fini4))    /* Runtime exit.  */
123
    _etext = .;
124
    PROVIDE (etext = .);
125
    . = ALIGN(2);
126
  }  > text AT>bank14  =0xff
127
 
128
  .text_h :
129
  {
130
    *(.text_h)           /* Bootloader; high Flash area unbanked */
131
    . = ALIGN(2);
132
  }  > text_h AT>bank15  =0xff
133
  .rodata :
134
  {
135
    *(.rodata)
136
    *(.rodata.*)
137
    *(.gnu.linkonce.r*)
138
    . = ALIGN(2);
139
  }  > text_h AT>bank15  =0xff
140
  .eh_frame :
141
  {
142
    KEEP (*(.eh_frame))
143
    . = ALIGN(2);
144
  }  > text_h AT>bank15  =0xff
145
 
146
  /* Constructor and destructor tables are in ROM.  */
147
  .ctors :
148
  {
149
     PROVIDE (__CTOR_LIST__ = .);
150
    KEEP (*(.ctors))
151
     PROVIDE(__CTOR_END__ = .);
152
     . = ALIGN(2);
153
  }  > text_h AT>bank15  =0xff
154
  .dtors :
155
  {
156
     PROVIDE(__DTOR_LIST__ = .);
157
    KEEP (*(.dtors))
158
     PROVIDE(__DTOR_END__ = .);
159
     . = ALIGN(2);
160
  }  > text_h AT>bank15  =0xff
161
 
162
  /* Start of the data section image in ROM.  */
163
  __data_image = .;
164
  PROVIDE (__data_image = .);
165
 
166
  /* All read-only sections that normally go in PROM must be above.
167
     We construct the DATA image section in PROM at end of all these
168
     read-only sections.  The data image must be copied at init time.
169
     Refer to GNU ld, Section 3.6.8.2 Output Section LMA.  */
170
  .data :
171
  {
172
    __data_section_start = .;
173
    PROVIDE (__data_section_start = .);
174
    *(.sdata)
175
    *(.data)
176
    *(.data.*)
177
    *(.data1)
178
    *(.gnu.linkonce.d.*)
179
    CONSTRUCTORS
180
    _edata  =  .;
181
    PROVIDE (edata = .);
182
    . = ALIGN(2);
183
  }  > data AT>bank15  =0xff
184
  __data_section_size = SIZEOF(.data);
185
  __data_image_end = __data_image + __data_section_size;
186
  PROVIDE (__data_section_size = SIZEOF(.data));
187
  /* .install  :
188
  {
189
    . = _data_image_end;
190
  }  > text */
191
  /* Relocation for some bss and data sections.  */
192
  .softregs   :
193
  {
194
    __softregs_section_start = .;
195
    *(.softregs)
196
    __softregs_section_end = .;
197
  }  > data
198
  __softregs_section_size = SIZEOF(.softregs);
199
  .bss   :
200
  {
201
    __bss_start = .;
202
    *(.sbss)
203
    *(.scommon)
204
    *(.dynbss)
205
    *(.bss)
206
    *(.bss.*)
207
    *(.gnu.linkonce.b.*)
208
    *(COMMON)
209
    PROVIDE (_end = .);
210
  }  > data
211
  __bss_size = SIZEOF(.bss);
212
  PROVIDE (__bss_size = SIZEOF(.bss));
213
  .eeprom   :
214
  {
215
    *(.eeprom)
216
    *(.eeprom.*)
217
    . = ALIGN(2);
218
  }  > eeprom  =0xff
219
 
220
  /* If the 'vectors_addr' symbol is defined, it indicates the start address
221
     of interrupt vectors.  This depends on the 9S12 operating mode:
222
                Addr
223
     Hardware location  LMA 0x10ff80, mirror 0xff80
224
     Called by dbug12   LMA 0x10ef80, mirror 0xef80
225
     Ram called by dbug12       0x3e00
226
     The default vectors address is (LMA) 0x10ff80.  This can be overriden
227
     with the '-defsym vectors_addr=0x...' ld option.
228
  */
229
  PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0x10ff80);
230
  .vectors DEFINED (vectors_addr) ? vectors_addr : 0x10ff80 :
231
  {
232
    KEEP (*(.vectors))
233
  }
234
  /* Stabs debugging sections.  */
235
  .stab          0 : { *(.stab) }
236
  .stabstr       0 : { *(.stabstr) }
237
  .stab.excl     0 : { *(.stab.excl) }
238
  .stab.exclstr  0 : { *(.stab.exclstr) }
239
  .stab.index    0 : { *(.stab.index) }
240
  .stab.indexstr 0 : { *(.stab.indexstr) }
241
  .comment       0 : { *(.comment) }
242
  /* DWARF debug sections.
243
     Symbols in the DWARF debugging sections are relative to the beginning
244
     of the section so we begin them at 0.
245
     Treatment of DWARF debug section must be at end of the linker
246
     script to avoid problems when there are undefined symbols. It's necessary
247
     to avoid that the DWARF section is relocated before such undefined
248
     symbols are found.  */
249
  /* DWARF 1 */
250
  .debug         0 : { *(.debug) }
251
  .line          0 : { *(.line) }
252
  /* GNU DWARF 1 extensions */
253
  .debug_srcinfo 0 : { *(.debug_srcinfo) }
254
  .debug_sfnames 0 : { *(.debug_sfnames) }
255
  /* DWARF 1.1 and DWARF 2 */
256
  .debug_aranges  0 : { *(.debug_aranges) }
257
  .debug_pubnames 0 : { *(.debug_pubnames) }
258
  /* DWARF 2 */
259
  .debug_info     0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
260
  .debug_abbrev   0 : { *(.debug_abbrev) }
261
  .debug_line     0 : { *(.debug_line) }
262
  .debug_frame    0 : { *(.debug_frame) }
263
  .debug_str      0 : { *(.debug_str) }
264
  .debug_loc      0 : { *(.debug_loc) }
265
  .debug_macinfo  0 : { *(.debug_macinfo) }
266
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.