URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [MB91460_Softune/] [SRC/] [utility/] [taskutility.h] - Blame information for rev 584

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#ifndef TASK_UTILITY_H
#define TASK_UTILITY_H
 
/* Start the task that writes the tace information to the UART. */
void vUtilityStartTraceTask( unsigned portBASE_TYPE uxPriority );
 
#endif
 

Line No.	Rev	Author	Line
1	584	jeremybenn	`#ifndef TASK_UTILITY_H`
2			`#define TASK_UTILITY_H`
3
4			`/* Start the task that writes the tace information to the UART. */`
5			`void vUtilityStartTraceTask( unsigned portBASE_TYPE uxPriority );`
6
7			`#endif`
8

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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [MB91460_Softune/] [SRC/] [utility/] [taskutility.h] - Blame information for rev 584