OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [MSP430X_MSP430F5438_IAR/] [MSP-EXP430F5438_HAL/] [hal_board.c] - Blame information for rev 584

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 584 jeremybenn
/**
2
 * @file  hal_board.c
3
 *
4
 * Copyright 2010 Texas Instruments, Inc.
5
******************************************************************************/
6
#include "msp430.h"
7
#include "hal_MSP-EXP430F5438.h"
8
 
9
/**********************************************************************//**
10
 * @brief  Initializes ACLK, MCLK, SMCLK outputs on P11.0, P11.1,
11
 *         and P11.2, respectively.
12
 *
13
 * @param  none
14
 *
15
 * @return none
16
 *************************************************************************/
17
void halBoardOutputSystemClock(void) //outputs clock to testpoints
18
{
19
  CLK_PORT_DIR |= 0x07;
20
  CLK_PORT_SEL |= 0x07;
21
}
22
 
23
/**********************************************************************//**
24
 * @brief  Stops the output of ACLK, MCLK, SMCLK on P11.0, P11.1, and P11.2.
25
 *
26
 * @param  none
27
 *
28
 * @return none
29
 *************************************************************************/
30
void halBoardStopOutputSystemClock(void)
31
{
32
  CLK_PORT_OUT &= ~0x07;
33
  CLK_PORT_DIR |= 0x07;
34
  CLK_PORT_SEL &= ~0x07;
35
}
36
 
37
/**********************************************************************//**
38
 * @brief  Initializes all GPIO configurations.
39
 *
40
 * @param  none
41
 *
42
 * @return none
43
 *************************************************************************/
44
void halBoardInit(void)
45
{
46
  //Tie unused ports
47
  PAOUT  = 0;
48
  PADIR  = 0xFFFF;
49
  PASEL  = 0;
50
  PBOUT  = 0;
51
  PBDIR  = 0xFFFF;
52
  PBSEL  = 0;
53
  PCOUT  = 0;
54
  PCDIR  = 0xFFFF;
55
  PCSEL  = 0;
56
  PDOUT  = 0;
57
  PDDIR  = 0xFFFF;
58
  PDSEL  = 0x0003;
59
  PEOUT  = 0;
60
  PEDIR  = 0xFEFF;                          // P10.0 to USB RST pin,
61
                                            // ...if enabled with J5
62
  PESEL  = 0;
63
  P11OUT = 0;
64
  P11DIR = 0xFF;
65
  PJOUT  = 0;
66
  PJDIR  = 0xFF;
67
  P11SEL = 0;
68
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.