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jeremybenn |
###################################-*-asm*-
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#
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# Copyright (c) 2001 Xilinx, Inc. All rights reserved.
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#
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# Xilinx, Inc. CONFIDENTIAL
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#
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# XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A
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# COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS
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# ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR
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# STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION
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# IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE
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# FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION.
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# XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO
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# THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO
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# ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE
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# FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY
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# AND FITNESS FOR A PARTICULAR PURPOSE.
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#
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# crt0.s
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#
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# C RunTime:
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# Used for initialization of small data
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# anchors and stack for programs compiled using
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# Xilinx Gnu Tools. This routine also intializes the
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# exception and interrupt handlers
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#
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# $Id: crt0.s 2 2011-07-17 20:13:17Z filepang@gmail.com $
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#
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#######################################
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/* Vector map (Interrupts, Exceptions, Breakpoints) */
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# # 0x00 # Jump to Start
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# # 0x04 # nop
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# # 0x08 # Imm instr for soft exception address [Hi halfword]
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# # 0x0c # Jump to sof Exception handler [Lo halfword]
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# # 0x10 # Imm instr for interrupt address [Hi halfword]
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# # 0x14 # Jump to interrupt handler [Lo halfword]
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# # 0x18 # nop - Reserved for breakpoint vector
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# # 0x1C # nop - Reserved for breakpoint vector
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# # 0x20 # Imm instr for hw exception address [Hi halfword]
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# # 0x24 # Jump instr to hw exception handler [Lo halfword]
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.globl _start
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/* Set the exception and interrupt address vectors */
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/* to jump to the appropriate handlers */
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.align 2
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.ent _start
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_start:
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bri _start1 # 0x00
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nop # 0x04
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nop # 0x08 # Reserve space for software exception vector
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nop # 0x0c
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nop # 0x10 # Reserve space for interrupt vector
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nop # 0x14
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nop # 0x18 # Reserve space for breakpoint vector
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nop # 0x1c
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nop # 0x18 # Reserve space for hw exception vector
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nop # 0x1c
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_start1:
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/* Set the Small Data Anchors and the Stack pointer */
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la r13, r0, _SDA_BASE_
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la r2, r0, _SDA2_BASE_
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la r1, r0, _stack-16 # 16 bytes (4 words are needed by
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# crt for args and link reg )
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/* Set the opcodes brai and imm for handlers */
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la r6,r0,0xb8080000 # [opcode for brai ]
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swi r6,r0,0x4 # [brai opcode for reset]
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swi r6,r0,0xc # [brai opcode for exception]
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swi r6,r0,0x14 # [brai opcode for interrupt]
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swi r6,r0,0x24 # [brai opcode for hw exceptions]
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la r6,r0,0xb0000000 # [opcode for imm ]
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swi r6,r0,0x0 # [imm opcode for reset]
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swi r6,r0,0x8 # [imm opcode for exception]
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swi r6,r0,0x10 # [imm opocde for interrupt]
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swi r6,r0,0x20 # [imm opocde for hw exceptions]
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/* Set Reset vector */
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la r6,r0,_start1
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sw r6,r1,r0
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lhu r7,r1,r0
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shi r7,r0, 0x2 # [imm for reset]
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shi r6,r0, 0x6 # [lower half for reset]
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/* Set Software Exception Handler */
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la r6,r0,_exception_handler
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sw r6,r1,r0
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lhu r7,r1,r0
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shi r7,r0, 0xa # [imm for exception]
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shi r6,r0, 0xe # [lower half for exception ]
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/* Set Interrupt Handler */
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la r6,r0,_interrupt_handler
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sw r6,r1,r0
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lhu r7,r1,r0
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shi r7,r0, 0x12 # [imm for exception]
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shi r6,r0, 0x16 # [lower half for intterupt ]
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/* Set HW Exception Handler */
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la r6,r0,_hw_exception_handler
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sw r6,r1,r0
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lhu r7,r1,r0
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shi r7,r0, 0x22 # [imm for exception]
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shi r6,r0, 0x26 # [lower half for hw exception]
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/* initialize bss sections */
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brlid r15,_crtinit
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nop
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/* Adjust the stack pointer */
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addi r1,r1,16
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/* Fall through to exit */
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.end _start
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/* Use this exit function */
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.globl exit # exit library call
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.ent exit
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exit:
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bri exit
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.end exit
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