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584 |
jeremybenn |
/*
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FreeRTOS V6.1.1 - Copyright (C) 2011 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* If you are: *
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* *
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* + New to FreeRTOS, *
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* + Wanting to learn FreeRTOS or multitasking in general quickly *
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* + Looking for basic training, *
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* + Wanting to improve your FreeRTOS skills and productivity *
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* *
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* then take a look at the FreeRTOS books - available as PDF or paperback *
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* *
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* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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* http://www.FreeRTOS.org/Documentation *
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* *
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* A pdf reference manual is also available. Both are usually delivered *
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* to your inbox within 20 minutes to two hours when purchased between 8am *
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* and 8pm GMT (although please allow up to 24 hours in case of *
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* exceptional circumstances). Thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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***NOTE*** The exception to the GPL is included to allow you to distribute
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a combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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/*
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* Creates all the demo application tasks, then starts the scheduler. The WEB
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* documentation provides more details of the standard demo application tasks.
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*
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* In addition to the standard tasks, main() creates two "Register Check"
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* tasks. These tasks write known values into every general purpose register,
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* then check each register to ensure it still contains the expected (written)
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* value. The register check tasks operate at the idle priority so will get
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* repeatedly preempted. A register being found to contain an incorrect value
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* following such a preemption would be indicative of an error in the context
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* switch mechanism.
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*
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* Main.c also creates a task called "Check". This only executes every three
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* seconds but has the highest priority so is guaranteed to get processor time.
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* Its main function is to check that all the other tasks are still operational.
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* Each task (other than the "flash" tasks) maintains a unique count that is
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* incremented each time the task successfully completes its function. Should
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* any error occur within such a task the count is permanently halted. The
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* check task inspects the count of each task to ensure it has changed since
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* the last time the check task executed. If all the count variables have
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* changed all the tasks are still executing error free, and the check task
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* toggles the onboard LED. Should any task contain an error at any time
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* the LED toggle rate will change from 3 seconds to 500ms.
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*
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*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Demo application includes. */
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#include "partest.h"
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#include "flash.h"
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#include "comtest2.h"
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#include "integer.h"
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#include "semtest.h"
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#include "BlockQ.h"
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#include "dynamic.h"
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#include "PollQ.h"
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/* Hardware library includes. */
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#include <xintc.h>
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/* The rate at which the 'check' LED will flash when no errors have been
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detected. */
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#define mainNO_ERROR_CHECK_PERIOD 3000
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/* The rate at which the 'check' LED will flash when an error has been
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detected in one of the demo tasks. */
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#define mainERROR_CHECK_PERIOD 500
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/* Demo application task priorities. */
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#define mainLED_TASK_PRIORITY ( tskIDLE_PRIORITY + 2 )
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#define mainCHECK_TASK_PRIORITY ( tskIDLE_PRIORITY + 3 )
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#define mainSEM_TEST_PRIORITY ( tskIDLE_PRIORITY + 1 )
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#define mainCOM_TEST_PRIORITY ( tskIDLE_PRIORITY + 2 )
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#define mainBLOCK_Q_PRIORITY ( tskIDLE_PRIORITY + 2 )
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#define mainQUEUE_POLL_PRIORITY ( tskIDLE_PRIORITY + 2 )
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/* Software cannot influence the BAUD rate used by the simple UART
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implementation. */
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#define mainBAUD_RATE 0
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/* The LED flashed by the 'check' task to indicate the system status. */
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#define mainCHECK_TASK_LED 3
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/* The first LED flashed by the COM port test tasks. LED mainCOM_TEST_LED + 1
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will also be used. */
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#define mainCOM_TEST_LED 4
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/* The register test task does not make any function calls so does not require
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much stack at all. */
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#define mainTINY_STACK 70
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/*
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* The task that executes at the highest priority and calls
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* prvCheckOtherTasksAreStillRunning(). See the description at the top
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* of the file.
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*/
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static void vErrorChecks( void *pvParameters );
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/*
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* Checks that all the demo application tasks are still executing without error
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* - as described at the top of the file.
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*/
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static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void );
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/*
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* The register test task as described at the top of this file.
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*/
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static void vRegisterTest( void *pvParameters );
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/*
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* Perform any necessary hardware configuration.
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*/
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static void prvSetupHardware( void );
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/* Set to pdFAIL should an error be discovered in the register test tasks. */
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static unsigned long ulRegisterTestStatus = pdPASS;
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const unsigned long *pulStatusAddr = &ulRegisterTestStatus;
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/*-----------------------------------------------------------*/
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/*
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* Create all the demo tasks - then start the scheduler.
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*/
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int main (void)
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{
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/* When re-starting a debug session (rather than cold booting) we want
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to ensure the installed interrupt handlers do not execute until after the
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scheduler has been started. */
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portDISABLE_INTERRUPTS();
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prvSetupHardware();
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/* Start the standard demo application tasks. */
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vStartLEDFlashTasks( mainLED_TASK_PRIORITY );
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vAltStartComTestTasks( mainCOM_TEST_PRIORITY, mainBAUD_RATE, mainCOM_TEST_LED );
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vStartIntegerMathTasks( tskIDLE_PRIORITY );
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vStartSemaphoreTasks( mainSEM_TEST_PRIORITY );
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vStartBlockingQueueTasks( mainBLOCK_Q_PRIORITY );
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vStartDynamicPriorityTasks();
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vStartPolledQueueTasks( mainQUEUE_POLL_PRIORITY );
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/* Create two register check tasks - using a different parameter for each.
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The parameter is used to generate the known values written to the registers. */
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#if configUSE_PREEMPTION == 1
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xTaskCreate( vRegisterTest, "Reg1", mainTINY_STACK, ( void * ) 10, tskIDLE_PRIORITY, NULL );
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xTaskCreate( vRegisterTest, "Reg2", mainTINY_STACK, ( void * ) 20, tskIDLE_PRIORITY, NULL );
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#endif
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/* Create the 'check' task that is defined in this file. */
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xTaskCreate( vErrorChecks, "Check", configMINIMAL_STACK_SIZE, NULL, mainCHECK_TASK_PRIORITY, NULL );
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/* Finally start the scheduler. */
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vTaskStartScheduler();
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/* Should not get here as the processor is now under control of the
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scheduler! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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static void vErrorChecks( void *pvParameters )
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{
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portTickType xDelayPeriod = mainNO_ERROR_CHECK_PERIOD;
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/* The parameters are not used. */
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( void ) pvParameters;
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/* Cycle for ever, delaying then checking all the other tasks are still
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operating without error. The delay period used will depend on whether
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or not an error has been discovered in one of the demo tasks. */
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for( ;; )
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{
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vTaskDelay( xDelayPeriod );
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if( !prvCheckOtherTasksAreStillRunning() )
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{
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/* An error has been found. Shorten the delay period to make
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the LED flash faster. */
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xDelayPeriod = mainERROR_CHECK_PERIOD;
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}
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vParTestToggleLED( mainCHECK_TASK_LED );
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}
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}
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/*-----------------------------------------------------------*/
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static portBASE_TYPE prvCheckOtherTasksAreStillRunning( void )
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{
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static portBASE_TYPE xAllTestsPass = pdTRUE;
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/* Return pdFALSE if any demo application task set has encountered
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an error. */
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if( xAreIntegerMathsTaskStillRunning() != pdTRUE )
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{
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xAllTestsPass = pdFALSE;
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}
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if( xAreComTestTasksStillRunning() != pdTRUE )
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{
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xAllTestsPass = pdFALSE;
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}
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if( xAreSemaphoreTasksStillRunning() != pdTRUE )
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{
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xAllTestsPass = pdFALSE;
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}
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if( xAreBlockingQueuesStillRunning() != pdTRUE )
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{
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xAllTestsPass = pdFAIL;
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}
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if( xAreDynamicPriorityTasksStillRunning() != pdTRUE )
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{
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xAllTestsPass = ( long ) pdFAIL;
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}
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if( xArePollingQueuesStillRunning() != pdTRUE )
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{
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xAllTestsPass = ( long ) pdFAIL;
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}
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/* Mutual exclusion on this variable is not necessary as we only read it. */
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if( ulRegisterTestStatus != pdPASS )
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{
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xAllTestsPass = pdFALSE;
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}
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return xAllTestsPass;
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}
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/*-----------------------------------------------------------*/
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static void prvSetupHardware( void )
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{
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/* Ensure the interrupt controller is enabled in order that subsequent
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code can successfully configure the peripherals. */
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XIntc_mMasterEnable( XPAR_OPB_INTC_0_BASEADDR );
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/* Initialise the GPIO used for the LED's. */
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vParTestInitialise();
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}
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/*-----------------------------------------------------------*/
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static void vRegisterTest( void *pvParameters )
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{
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for( ;; )
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{
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/* Fill the registers with their register number plus the offset
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(added) value. The added value is passed in as a parameter so
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is contained in r5. */
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asm volatile ( "addi r3, r5, 3 \n\t" \
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"addi r4, r5, 4 \n\t" \
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"addi r6, r5, 6 \n\t" \
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"addi r7, r5, 7 \n\t" \
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"addi r8, r5, 8 \n\t" \
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"addi r9, r5, 9 \n\t" \
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"addi r10, r5, 10 \n\t" \
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"addi r11, r5, 11 \n\t" \
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"addi r12, r5, 12 \n\t" \
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"addi r16, r5, 16 \n\t" \
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"addi r17, r5, 17 \n\t" \
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"addi r18, r5, 18 \n\t" \
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"addi r19, r5, 19 \n\t" \
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"addi r20, r5, 20 \n\t" \
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"addi r21, r5, 21 \n\t" \
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"addi r22, r5, 22 \n\t" \
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"addi r23, r5, 23 \n\t" \
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"addi r24, r5, 24 \n\t" \
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"addi r25, r5, 25 \n\t" \
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"addi r26, r5, 26 \n\t" \
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"addi r27, r5, 27 \n\t" \
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"addi r28, r5, 28 \n\t" \
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"addi r29, r5, 29 \n\t" \
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"addi r30, r5, 30 \n\t" \
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"addi r31, r5, 31 \n\t"
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);
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/* Now read back the register values to ensure they are as we expect.
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This task will get preempted frequently so other tasks are likely to
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have executed since the register values were written. */
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/* r3 should contain r5 + 3. Subtract 3 to leave r3 equal to r5. */
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asm volatile ( "addi r3, r3, -3 " );
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/* Compare r3 and r5. If they are not equal then either r3 or r5
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contains the wrong value and *pulStatusAddr is to pdFAIL. */
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asm volatile ( "cmp r3, r3, r5 \n\t" \
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"beqi r3, 12 \n\t" \
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"lwi r3, r0, pulStatusAddr \n\t" \
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"sw r0, r0, r3 \n\t"
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| 328 |
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);
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| 329 |
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| 330 |
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/* Repeat for all the other registers. */
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asm volatile ( "addi r4, r4, -4 \n\t" \
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|
|
"cmp r4, r4, r5 \n\t" \
|
| 333 |
|
|
"beqi r4, 12 \n\t" \
|
| 334 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 335 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 336 |
|
|
"addi r6, r6, -6 \n\t" \
|
| 337 |
|
|
"cmp r6, r6, r5 \n\t" \
|
| 338 |
|
|
"beqi r6, 12 \n\t" \
|
| 339 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 340 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 341 |
|
|
"addi r7, r7, -7 \n\t" \
|
| 342 |
|
|
"cmp r7, r7, r5 \n\t" \
|
| 343 |
|
|
"beqi r7, 12 \n\t" \
|
| 344 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 345 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 346 |
|
|
"addi r8, r8, -8 \n\t" \
|
| 347 |
|
|
"cmp r8, r8, r5 \n\t" \
|
| 348 |
|
|
"beqi r8, 12 \n\t" \
|
| 349 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 350 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 351 |
|
|
"addi r9, r9, -9 \n\t" \
|
| 352 |
|
|
"cmp r9, r9, r5 \n\t" \
|
| 353 |
|
|
"beqi r9, 12 \n\t" \
|
| 354 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 355 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 356 |
|
|
"addi r10, r10, -10 \n\t" \
|
| 357 |
|
|
"cmp r10, r10, r5 \n\t" \
|
| 358 |
|
|
"beqi r10, 12 \n\t" \
|
| 359 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 360 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 361 |
|
|
"addi r11, r11, -11 \n\t" \
|
| 362 |
|
|
"cmp r11, r11, r5 \n\t" \
|
| 363 |
|
|
"beqi r11, 12 \n\t" \
|
| 364 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 365 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 366 |
|
|
"addi r12, r12, -12 \n\t" \
|
| 367 |
|
|
"cmp r12, r12, r5 \n\t" \
|
| 368 |
|
|
"beqi r12, 12 \n\t" \
|
| 369 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 370 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 371 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 372 |
|
|
"addi r16, r16, -16 \n\t" \
|
| 373 |
|
|
"cmp r16, r16, r5 \n\t" \
|
| 374 |
|
|
"beqi r16, 12 \n\t" \
|
| 375 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 376 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 377 |
|
|
"addi r17, r17, -17 \n\t" \
|
| 378 |
|
|
"cmp r17, r17, r5 \n\t" \
|
| 379 |
|
|
"beqi r17, 12 \n\t" \
|
| 380 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 381 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 382 |
|
|
"addi r18, r18, -18 \n\t" \
|
| 383 |
|
|
"cmp r18, r18, r5 \n\t" \
|
| 384 |
|
|
"beqi r18, 12 \n\t" \
|
| 385 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 386 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 387 |
|
|
"addi r19, r19, -19 \n\t" \
|
| 388 |
|
|
"cmp r19, r19, r5 \n\t" \
|
| 389 |
|
|
"beqi r19, 12 \n\t" \
|
| 390 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 391 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 392 |
|
|
"addi r20, r20, -20 \n\t" \
|
| 393 |
|
|
"cmp r20, r20, r5 \n\t" \
|
| 394 |
|
|
"beqi r20, 12 \n\t" \
|
| 395 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 396 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 397 |
|
|
"addi r21, r21, -21 \n\t" \
|
| 398 |
|
|
"cmp r21, r21, r5 \n\t" \
|
| 399 |
|
|
"beqi r21, 12 \n\t" \
|
| 400 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 401 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 402 |
|
|
"addi r22, r22, -22 \n\t" \
|
| 403 |
|
|
"cmp r22, r22, r5 \n\t" \
|
| 404 |
|
|
"beqi r22, 12 \n\t" \
|
| 405 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 406 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 407 |
|
|
"addi r23, r23, -23 \n\t" \
|
| 408 |
|
|
"cmp r23, r23, r5 \n\t" \
|
| 409 |
|
|
"beqi r23, 12 \n\t" \
|
| 410 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 411 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 412 |
|
|
"addi r24, r24, -24 \n\t" \
|
| 413 |
|
|
"cmp r24, r24, r5 \n\t" \
|
| 414 |
|
|
"beqi r24, 12 \n\t" \
|
| 415 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 416 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 417 |
|
|
"addi r25, r25, -25 \n\t" \
|
| 418 |
|
|
"cmp r25, r25, r5 \n\t" \
|
| 419 |
|
|
"beqi r25, 12 \n\t" \
|
| 420 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 421 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 422 |
|
|
"addi r26, r26, -26 \n\t" \
|
| 423 |
|
|
"cmp r26, r26, r5 \n\t" \
|
| 424 |
|
|
"beqi r26, 12 \n\t" \
|
| 425 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 426 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 427 |
|
|
"addi r27, r27, -27 \n\t" \
|
| 428 |
|
|
"cmp r27, r27, r5 \n\t" \
|
| 429 |
|
|
"beqi r27, 12 \n\t" \
|
| 430 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 431 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 432 |
|
|
"addi r28, r28, -28 \n\t" \
|
| 433 |
|
|
"cmp r28, r28, r5 \n\t" \
|
| 434 |
|
|
"beqi r28, 12 \n\t" \
|
| 435 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 436 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 437 |
|
|
"addi r29, r29, -29 \n\t" \
|
| 438 |
|
|
"cmp r29, r29, r5 \n\t" \
|
| 439 |
|
|
"beqi r29, 12 \n\t" \
|
| 440 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 441 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 442 |
|
|
"addi r30, r30, -30 \n\t" \
|
| 443 |
|
|
"cmp r30, r30, r5 \n\t" \
|
| 444 |
|
|
"beqi r30, 12 \n\t" \
|
| 445 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 446 |
|
|
"sw r0, r0, r3 \n\t" \
|
| 447 |
|
|
"addi r31, r31, -31 \n\t" \
|
| 448 |
|
|
"cmp r31, r31, r5 \n\t" \
|
| 449 |
|
|
"beqi r31, 12 \n\t" \
|
| 450 |
|
|
"lwi r3, r0, pulStatusAddr \n\t" \
|
| 451 |
|
|
"sw r0, r0, r3 \n\t"
|
| 452 |
|
|
);
|
| 453 |
|
|
}
|
| 454 |
|
|
}
|
| 455 |
|
|
|
| 456 |
|
|
|
| 457 |
|
|
|
