OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [OpenRISC_SIM_GCC/] [arch/] [link.ld] - Blame information for rev 623

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 584 jeremybenn
MEMORY
2
{
3 623 filepang
        vectors : ORIGIN = 0x00000000, LENGTH = 0x00001000
4
        ram     : ORIGIN = 0x00001000, LENGTH = 0x00080000 - 0x00001000
5 584 jeremybenn
}
6
 
7
SECTIONS
8
{
9
        .vectors :
10
        {
11
                _vec_start = .;
12
                *(.vectors)
13
                _vec_end = .;
14
        } > vectors
15
 
16
        .text ALIGN(4) :
17
        {
18
                *(.text)
19
        } > ram
20
 
21
        .rodata ALIGN(4) :
22
        {
23
                *(.rodata)
24
                *(.rodata.*)
25
        } > ram
26
 
27
        .icm ALIGN(4) :
28
        {
29
                _icm_start = .;
30
                *(.icm)
31
                _icm_end = .;
32
        } > ram
33
 
34
        .data ALIGN(4) :
35
        {
36
                _dst_beg = .;
37
                *(.data)
38
                _dst_end = .;
39
        } > ram
40
 
41
        .bss ALIGN(4) :
42
        {
43
                _bss_beg = .;
44
                *(.bss)
45
                _bss_end = .;
46
        } > ram
47
 
48
        PROVIDE(_stack_top = 0x00080000);
49
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.