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Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [OpenRISC_SIM_GCC/] [arch/] [reset.S] - Blame information for rev 620

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Line No. Rev Author Line
1 584 jeremybenn
/* Support file for c based tests */
2
#include "spr_defs.h"
3
#include "board.h"
4
#include "mc.h"
5
 
6
        .global         _stack_top
7
        .section        .vectors, "ax"
8
 
9
        .org    0x100
10
_reset_vector:
11
        l.nop
12
        l.nop
13
        l.addi  r2,r0,0x0
14
        l.addi  r3,r0,0x0
15
        l.addi  r4,r0,0x0
16
        l.addi  r5,r0,0x0
17
        l.addi  r6,r0,0x0
18
        l.addi  r7,r0,0x0
19
        l.addi  r8,r0,0x0
20
        l.addi  r9,r0,0x0
21
        l.addi  r10,r0,0x0
22
        l.addi  r11,r0,0x0
23
        l.addi  r12,r0,0x0
24
        l.addi  r13,r0,0x0
25
        l.addi  r14,r0,0x0
26
        l.addi  r15,r0,0x0
27
        l.addi  r16,r0,0x0
28
        l.addi  r17,r0,0x0
29
        l.addi  r18,r0,0x0
30
        l.addi  r19,r0,0x0
31
        l.addi  r20,r0,0x0
32
        l.addi  r21,r0,0x0
33
        l.addi  r22,r0,0x0
34
        l.addi  r23,r0,0x0
35
        l.addi  r24,r0,0x0
36
        l.addi  r25,r0,0x0
37
        l.addi  r26,r0,0x0
38
        l.addi  r27,r0,0x0
39
        l.addi  r28,r0,0x0
40
        l.addi  r29,r0,0x0
41
        l.addi  r30,r0,0x0
42
        l.addi  r31,r0,0x0
43
 
44
        l.movhi r3,hi(_start)
45
        l.ori   r3,r3,lo(_start)
46
        l.jr    r3
47
        l.nop
48
 
49
.org 0x200
50
 
51
_except_200:
52
        l.nop
53
    l.addi  r1,r1,-116                          // free 29 words of stack (stack is r1)
54
    l.sw    0x18(r1),r9                         // save register r9(return addr) to stack
55
    l.jal   store_regs                          // save registers r3-r31 (except r9) to stack (r9 is changed here)
56
    l.nop
57
 
58
    l.movhi r9,hi(end_except)           // set return addr to end_except instruction
59
    l.ori   r9,r9,lo(end_except)        // set return addr to end_except instruction
60
        l.j     buserr_except
61
        l.nop
62
 
63
.org 0x300
64
 
65
_except_300:
66
        l.nop
67
    l.addi  r1,r1,-116                          // free 29 words of stack (stack is r1)
68
    l.sw    0x18(r1),r9                         // save register r9(return addr) to stack
69
    l.jal   store_regs                          // save registers r3-r31 (except r9) to stack (r9 is changed here)
70
    l.nop
71
 
72
    l.movhi r9,hi(end_except)           // set return addr to end_except instruction
73
    l.ori   r9,r9,lo(end_except)        // set return addr to end_except instruction
74
        l.j     dpf_except
75
        l.nop
76
 
77
.org 0x400
78
 
79
_except_400:
80
        l.nop
81
    l.addi  r1,r1,-116                          // free 29 words of stack (stack is r1)
82
    l.sw    0x18(r1),r9                         // save register r9(return addr) to stack
83
    l.jal   store_regs                          // save registers r3-r31 (except r9) to stack (r9 is changed here)
84
    l.nop
85
 
86
    l.movhi r9,hi(end_except)           // set return addr to end_except instruction
87
    l.ori   r9,r9,lo(end_except)        // set return addr to end_except instruction
88
        l.j     ipf_except
89
        l.nop
90
 
91
.org 0x500
92
 
93
_except_500:
94
        l.nop
95
        l.j     vTickHandler
96
        l.nop
97
 
98
.org 0x600
99
 
100
_except_600:
101
        l.nop
102
    l.addi  r1,r1,-116                          // free 29 words of stack (stack is r1)
103
    l.sw    0x18(r1),r9                         // save register r9(return addr) to stack
104
    l.jal   store_regs                          // save registers r3-r31 (except r9) to stack (r9 is changed here)
105
    l.nop
106
 
107
    l.movhi r9,hi(end_except)           // set return addr to end_except instruction
108
    l.ori   r9,r9,lo(end_except)        // set return addr to end_except instruction
109
        l.j     align_except
110
        l.nop
111
 
112
.org 0x700
113
 
114
_except_700:
115
        l.nop
116
    l.addi  r1,r1,-116                          // free 29 words of stack (stack is r1)
117
    l.sw    0x18(r1),r9                         // save register r9(return addr) to stack
118
    l.jal   store_regs                          // save registers r3-r31 (except r9) to stack (r9 is changed here)
119
    l.nop
120
 
121
    l.movhi r9,hi(end_except)           //set return addr to end_except instruction
122
    l.ori   r9,r9,lo(end_except)        //set return addr to end_except instruction
123
        l.j     illegal_except
124
        l.nop
125
 
126
.org 0x800
127
 
128
_except_800:
129
        l.nop
130
    l.addi  r1,r1,-116                  //free 29 words of stack (stack is r1)
131
    l.sw    0x18(r1),r9                 //save register r9(return addr) to stack
132
    l.jal   store_regs                  //save registers r3-r31 (except r9) to stack (r9 is changed here)
133
    l.nop
134
 
135
    l.movhi r9,hi(end_except)           //set return addr to end_except instruction
136
    l.ori   r9,r9,lo(end_except)        //set return addr to end_except instruction
137
    l.j ext_except                          //jmp to C interrupt handler (returns later to end_except)
138
    l.nop
139
 
140
 
141
.org 0x900
142
 
143
_except_900:
144
        l.nop
145
    l.addi  r1,r1,-116                  //free 29 words of stack (stack is r1)
146
    l.sw    0x18(r1),r9                 //save register r9(return addr) to stack
147
    l.jal   store_regs                  //save registers r3-r31 (except r9) to stack (r9 is changed here)
148
    l.nop
149
 
150
    l.movhi r9,hi(end_except)           //set return addr to end_except instruction
151
    l.ori   r9,r9,lo(end_except)        //set return addr to end_except instruction
152
        l.j     dtlbmiss_except
153
        l.nop
154
 
155
.org 0xa00
156
 
157
_except_a00:
158
        l.nop
159
    l.addi  r1,r1,-116                  //free 29 words of stack (stack is r1)
160
    l.sw    0x18(r1),r9                 //save register r9(return addr) to stack
161
    l.jal   store_regs                  //save registers r3-r31 (except r9) to stack (r9 is changed here)
162
    l.nop
163
 
164
    l.movhi r9,hi(end_except)           //set return addr to end_except instruction
165
    l.ori   r9,r9,lo(end_except)        //set return addr to end_except instruction
166
        l.j     itlbmiss_except
167
        l.nop
168
 
169
.org 0xb00
170
 
171
_except_b00:
172
        l.nop
173
    l.addi  r1,r1,-116                  //free 29 words of stack (stack is r1)
174
    l.sw    0x18(r1),r9                 //save register r9(return addr) to stack
175
    l.jal   store_regs                  //save registers r3-r31 (except r9) to stack (r9 is changed here)
176
    l.nop
177
 
178
    l.movhi r9,hi(end_except)           //set return addr to end_except instruction
179
    l.ori   r9,r9,lo(end_except)        //set return addr to end_except instruction
180
        l.j     range_except
181
        l.nop
182
 
183
.org 0xc00
184
 
185
_except_c00:
186
        .global         PortCC
187
        l.nop
188
        l.sfeqi r11, 0x0FCC
189
        l.bnf   1f
190
        l.nop
191
        l.j PortCC
192
        l.nop
193
 
194
1:
195
        l.addi  r1, r1, 4                       //FIXME
196
    l.addi  r1,r1,-116                  //free 29 words of stack (stack is r1), FIXME comment
197
        l.sw    -0x8(r1), r11
198
        l.lwz   r11, 112(r1)
199
    l.sw    0x18(r1),r9                 //save register r9(return addr) to stack
200
    l.jal   store_regs                  //save registers r3-r31 (except r9) to stack (r9 is changed here)
201
    l.nop
202
 
203
        l.lwz   r3, -0x8(r1)
204
    l.movhi r9,hi(end_except)           //set return addr to end_except instruction
205
    l.ori   r9,r9,lo(end_except)        //set return addr to end_except instruction
206
        l.j     syscall_except
207
        l.nop
208
 
209
.org 0xd00
210
 
211
_except_d00:
212
        l.nop
213
    l.addi  r1,r1,-116                  //free 29 words of stack (stack is r1)
214
    l.sw    0x18(r1),r9                 //save register r9(return addr) to stack
215
    l.jal   store_regs                  //save registers r3-r31 (except r9) to stack (r9 is changed here)
216
    l.nop
217
 
218
    l.movhi r9,hi(end_except)           //set return addr to end_except instruction
219
    l.ori   r9,r9,lo(end_except)        //set return addr to end_except instruction
220
        l.j     res1_except
221
        l.nop
222
 
223
.org 0xe00
224
 
225
_except_e00:
226
        l.nop
227
    l.addi  r1,r1,-116                  //free 29 words of stack (stack is r1)
228
    l.sw    0x18(r1),r9                 //save register r9(return addr) to stack
229
    l.jal   store_regs                  //save registers r3-r31 (except r9) to stack (r9 is changed here)
230
    l.nop
231
 
232
    l.movhi r9,hi(end_except)           //set return addr to end_except instruction
233
    l.ori   r9,r9,lo(end_except)        //set return addr to end_except instruction
234
        l.j     trap_except
235
        l.nop
236
 
237
.org 0xf00
238
 
239
_except_f00:
240
        l.nop
241
    l.addi  r1,r1,-116                  //free 29 words of stack (stack is r1)
242
    l.sw    0x18(r1),r9                 //save register r9(return addr) to stack
243
    l.jal   store_regs                  //save registers r3-r31 (except r9) to stack (r9 is changed here)
244
    l.nop
245
 
246
    l.movhi r9,hi(end_except)           //set return addr to end_except instruction
247
    l.ori   r9,r9,lo(end_except)        //set return addr to end_except instruction
248
        l.j     res2_except
249
        l.nop
250
 
251
store_regs:             //save registers r3-r31 (except r9) to stack
252
        l.sw    0x00(r1),r3
253
        l.sw    0x04(r1),r4
254
        l.sw    0x08(r1),r5
255
        l.sw    0x0c(r1),r6
256
        l.sw    0x10(r1),r7
257
        l.sw    0x14(r1),r8
258
        l.sw    0x1c(r1),r10
259
        l.sw    0x20(r1),r11
260
        l.sw    0x24(r1),r12
261
        l.sw    0x28(r1),r13
262
        l.sw    0x2c(r1),r14
263
        l.sw    0x30(r1),r15
264
        l.sw    0x34(r1),r16
265
        l.sw    0x38(r1),r17
266
        l.sw    0x3c(r1),r18
267
        l.sw    0x40(r1),r19
268
        l.sw    0x44(r1),r20
269
        l.sw    0x48(r1),r21
270
        l.sw    0x4c(r1),r22
271
        l.sw    0x50(r1),r23
272
        l.sw    0x54(r1),r24
273
        l.sw    0x58(r1),r25
274
        l.sw    0x5c(r1),r26
275
        l.sw    0x60(r1),r27
276
        l.sw    0x64(r1),r28
277
        l.sw    0x68(r1),r29
278
        l.sw    0x6c(r1),r30
279
        l.sw    0x70(r1),r31
280
        l.jr    r9
281
        l.nop
282
 
283
end_except:             //load back registers from stack r3-r31
284
        l.lwz   r3,0x00(r1)
285
        l.lwz   r4,0x04(r1)
286
        l.lwz   r5,0x08(r1)
287
        l.lwz   r6,0x0c(r1)
288
        l.lwz   r7,0x10(r1)
289
        l.lwz   r8,0x14(r1)
290
        l.lwz   r9,0x18(r1)
291
        l.lwz   r10,0x1c(r1)
292
        l.lwz   r11,0x20(r1)
293
        l.lwz   r12,0x24(r1)
294
        l.lwz   r13,0x28(r1)
295
        l.lwz   r14,0x2c(r1)
296
        l.lwz   r15,0x30(r1)
297
        l.lwz   r16,0x34(r1)
298
        l.lwz   r17,0x38(r1)
299
        l.lwz   r18,0x3c(r1)
300
        l.lwz   r19,0x40(r1)
301
        l.lwz   r20,0x44(r1)
302
        l.lwz   r21,0x48(r1)
303
        l.lwz   r22,0x4c(r1)
304
        l.lwz   r23,0x50(r1)
305
        l.lwz   r24,0x54(r1)
306
        l.lwz   r25,0x58(r1)
307
        l.lwz   r26,0x5c(r1)
308
        l.lwz   r27,0x60(r1)
309
        l.lwz   r28,0x64(r1)
310
        l.lwz   r29,0x68(r1)
311
        l.lwz   r30,0x6c(r1)
312
        l.lwz   r31,0x70(r1)
313
        l.addi  r1,r1,116                               //free stack places
314
        l.rfe                                                   //recover SR register and prior PC (jumps back to program)
315
        l.nop
316
 
317
 
318
        .section .text
319
 
320
_start:
321
.if IC | DC
322
        /* Flush IC and/or DC */
323
        l.addi  r10,r0,0
324
        l.addi  r11,r0,0
325
        l.addi  r12,r0,0
326
.if IC
327
        l.addi  r11,r0,IC_SIZE
328
.endif
329
.if DC
330
        l.addi  r12,r0,DC_SIZE
331
.endif
332
        l.sfleu r12,r11
333
        l.bf    loop
334
        l.nop
335
        l.add   r11,r0,r12
336
loop:
337
.if IC
338
        l.mtspr r0,r10,SPR_ICBIR
339
.endif
340
.if DC
341
        l.mtspr r0,r10,SPR_DCBIR
342
.endif
343
        l.sfne  r10,r11
344
        l.bf    loop
345
        l.addi  r10,r10,16
346
 
347
        /* Enable IC and/or DC */
348
        l.addi  r10,r0,(SPR_SR_SM)
349
.if IC
350
        l.ori   r10,r10,(SPR_SR_ICE)
351
.endif
352
.if DC
353
        l.ori   r10,r10,(SPR_SR_DCE)
354
.endif
355
        l.mtspr r0,r10,SPR_SR
356
        l.nop
357
        l.nop
358
        l.nop
359
        l.nop
360
        l.nop
361
.endif
362
 
363
        /* Set stack pointer */
364
        l.movhi r1, hi(_stack_top)
365
        l.ori   r1, r1, lo(_stack_top)
366
 
367
        /* clear BSS */
368
        l.movhi r2, hi(_bss_beg)
369
        l.ori   r2, r2, lo(_bss_beg)
370
        l.movhi r3, hi(_bss_end)
371
        l.ori   r3, r2, lo(_bss_end)
372
1:
373
        l.sfeq  r2, r3
374
        l.bf    __main
375
        l.noP
376
 
377
        l.sw    0x0(r2), r0
378
        l.addi  r2, r2, 0x4
379
        l.j             1b
380
        l.nop
381
 
382
        /* Jump to main */
383
__main:
384
        l.movhi r2,hi(_main)
385
        l.ori   r2,r2,lo(_main)
386
        l.jr    r2
387
        l.nop

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